git.sur5r.net Git - freertos/blob - FreeRTOS/Demo/RX100-RSK_IAR/reg_test.s

   1 /*\r
   2     FreeRTOS V7.5.2 - Copyright (C) 2013 Real Time Engineers Ltd.\r
   3 \r
   4     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
   5 \r
   6     ***************************************************************************\r
   7      *                                                                       *\r
   8      *    FreeRTOS provides completely free yet professionally developed,    *\r
   9      *    robust, strictly quality controlled, supported, and cross          *\r
  10      *    platform software that has become a de facto standard.             *\r
  11      *                                                                       *\r
  12      *    Help yourself get started quickly and support the FreeRTOS         *\r
  13      *    project by purchasing a FreeRTOS tutorial book, reference          *\r
  14      *    manual, or both from: http://www.FreeRTOS.org/Documentation        *\r
  15      *                                                                       *\r
  16      *    Thank you!                                                         *\r
  17      *                                                                       *\r
  18     ***************************************************************************\r
  19 \r
  20     This file is part of the FreeRTOS distribution.\r
  21 \r
  22     FreeRTOS is free software; you can redistribute it and/or modify it under\r
  23     the terms of the GNU General Public License (version 2) as published by the\r
  24     Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
  25 \r
  26     >>! NOTE: The modification to the GPL is included to allow you to distribute\r
  27     >>! a combined work that includes FreeRTOS without being obliged to provide\r
  28     >>! the source code for proprietary components outside of the FreeRTOS\r
  29     >>! kernel.\r
  30 \r
  31     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
  32     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
  33     FOR A PARTICULAR PURPOSE.  Full license text is available from the following\r
  34     link: http://www.freertos.org/a00114.html\r
  35 \r
  36     1 tab == 4 spaces!\r
  37 \r
  38     ***************************************************************************\r
  39      *                                                                       *\r
  40      *    Having a problem?  Start by reading the FAQ "My application does   *\r
  41      *    not run, what could be wrong?"                                     *\r
  42      *                                                                       *\r
  43      *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
  44      *                                                                       *\r
  45     ***************************************************************************\r
  46 \r
  47     http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
  48     license and Real Time Engineers Ltd. contact details.\r
  49 \r
  50     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
  51     including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
  52     compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
  53 \r
  54     http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
  55     Integrity Systems to sell under the OpenRTOS brand.  Low cost OpenRTOS\r
  56     licenses offer ticketed support, indemnification and middleware.\r
  57 \r
  58     http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
  59     engineered and independently SIL3 certified version for use in safety and\r
  60     mission critical applications that require provable dependability.\r
  61 \r
  62     1 tab == 4 spaces!\r
  63 */\r
  64 \r
  65         PUBLIC _vRegTest1Implementation\r
  66         PUBLIC _vRegTest2Implementation\r
  67 \r
  68         EXTERN _ulRegTest1CycleCount\r
  69         EXTERN _ulRegTest2CycleCount\r
  70 \r
  71         RSEG CODE:CODE(4)\r
  72 \r
  73 _vRegTest1Implementation:\r
  74 \r
  75                 /* Set each register to a known value. */\r
  76                 MOV.L   #0x33333333, R15\r
  77                 MVTACHI R15\r
  78                 MOV.L   #0x44444444, R15\r
  79                 MVTACLO R15\r
  80                 MOV.L   #1, R1\r
  81                 MOV.L   #2, R2\r
  82                 MOV.L   #3, R3\r
  83                 MOV.L   #4, R4\r
  84                 MOV.L   #5, R5\r
  85                 MOV.L   #6, R6\r
  86                 MOV.L   #7, R7\r
  87                 MOV.L   #8, R8\r
  88                 MOV.L   #9, R9\r
  89                 MOV.L   #10, R10\r
  90                 MOV.L   #11, R11\r
  91                 MOV.L   #12, R12\r
  92                 MOV.L   #13, R13\r
  93                 MOV.L   #14, R14\r
  94                 MOV.L   #15, R15\r
  95 \r
  96         /* Loop, checking each iteration that each register still contains the\r
  97         expected value. */\r
  98         TestLoop1:\r
  99 \r
 100                 /* Push the registers that are going to get clobbered. */\r
 101                 PUSHM   R14-R15\r
 102 \r
 103                 /* Increment the loop counter to show this task is still getting CPU\r
 104                 time. */\r
 105                 MOV.L   #_ulRegTest1CycleCount, R14\r
 106                 MOV.L   [ R14 ], R15\r
 107                 ADD             #1, R15\r
 108                 MOV.L   R15, [ R14 ]\r
 109 \r
 110                 /* Yield to extend the text coverage.  Set the bit in the ITU SWINTR\r
 111                 register. */\r
 112                 MOV.L   #1, R14\r
 113                 MOV.L   #0872E0H, R15\r
 114                 MOV.B   R14, [R15]\r
 115                 NOP\r
 116                 NOP\r
 117 \r
 118                 /* Check the accumulator value. */\r
 119                 MVFACHI R15\r
 120                 CMP             #0x33333333, R15\r
 121                 BNE             RegTest2Error\r
 122                 MVFACMI R15\r
 123                 CMP             #0x33334444, R15\r
 124                 BNE             RegTest2Error\r
 125 \r
 126                 /* Restore the clobbered registers. */\r
 127                 POPM    R14-R15\r
 128 \r
 129                 /* Now compare each register to ensure it still contains the value that\r
 130                 was set before this loop was entered. */\r
 131                 CMP             #1, R1\r
 132                 BNE             RegTest1Error\r
 133                 CMP             #2, R2\r
 134                 BNE             RegTest1Error\r
 135                 CMP             #3, R3\r
 136                 BNE             RegTest1Error\r
 137                 CMP             #4, R4\r
 138                 BNE             RegTest1Error\r
 139                 CMP             #5, R5\r
 140                 BNE             RegTest1Error\r
 141                 CMP             #6, R6\r
 142                 BNE             RegTest1Error\r
 143                 CMP             #7, R7\r
 144                 BNE             RegTest1Error\r
 145                 CMP             #8, R8\r
 146                 BNE             RegTest1Error\r
 147                 CMP             #9, R9\r
 148                 BNE             RegTest1Error\r
 149                 CMP             #10, R10\r
 150                 BNE             RegTest1Error\r
 151                 CMP             #11, R11\r
 152                 BNE             RegTest1Error\r
 153                 CMP             #12, R12\r
 154                 BNE             RegTest1Error\r
 155                 CMP             #13, R13\r
 156                 BNE             RegTest1Error\r
 157                 CMP             #14, R14\r
 158                 BNE             RegTest1Error\r
 159                 CMP             #15, R15\r
 160                 BNE             RegTest1Error\r
 161 \r
 162                 /* All comparisons passed, start a new iteration of this loop. */\r
 163                 BRA             TestLoop1\r
 164 \r
 165         /* A compare failed, just loop here so the loop counter stops\r
 166         incrementing causing the check timer to indicate the error. */\r
 167         RegTest1Error:\r
 168                 BRA RegTest1Error\r
 169 \r
 170 /*-----------------------------------------------------------*/\r
 171 \r
 172 _vRegTest2Implementation:\r
 173 \r
 174                 /* Set each register to a known value. */\r
 175                 MOV.L   #0x11111111, R15\r
 176                 MVTACHI R15\r
 177                 MOV.L   #0x22222222, R15\r
 178                 MVTACLO R15\r
 179                 MOV.L   #100, R1\r
 180                 MOV.L   #200, R2\r
 181                 MOV.L   #300, R3\r
 182                 MOV.L   #400, R4\r
 183                 MOV.L   #500, R5\r
 184                 MOV.L   #600, R6\r
 185                 MOV.L   #700, R7\r
 186                 MOV.L   #800, R8\r
 187                 MOV.L   #900, R9\r
 188                 MOV.L   #1000, R10\r
 189                 MOV.L   #1001, R11\r
 190                 MOV.L   #1002, R12\r
 191                 MOV.L   #1003, R13\r
 192                 MOV.L   #1004, R14\r
 193                 MOV.L   #1005, R15\r
 194 \r
 195         /* Loop, checking each iteration that each register still contains the\r
 196         expected value. */\r
 197         TestLoop2:\r
 198 \r
 199                 /* Push the registers that are going to get clobbered. */\r
 200                 PUSHM   R14-R15\r
 201 \r
 202                 /* Increment the loop counter to show this task is still getting CPU\r
 203                 time. */\r
 204                 MOV.L   #_ulRegTest2CycleCount, R14\r
 205                 MOV.L   [ R14 ], R15\r
 206                 ADD             #1, R15\r
 207                 MOV.L   R15, [ R14 ]\r
 208 \r
 209                 /* Check the accumulator value. */\r
 210                 MVFACHI R15\r
 211                 CMP             #0x11111111, R15\r
 212                 BNE             RegTest2Error\r
 213                 MVFACMI R15\r
 214                 CMP             #0x11112222, R15\r
 215                 BNE             RegTest2Error\r
 216 \r
 217                 /* Restore the clobbered registers. */\r
 218                 POPM    R14-R15\r
 219 \r
 220                 /* Now compare each register to ensure it still contains the value that\r
 221                 was set before this loop was entered. */\r
 222                 CMP             #100, R1\r
 223                 BNE             RegTest2Error\r
 224                 CMP             #200, R2\r
 225                 BNE             RegTest2Error\r
 226                 CMP             #300, R3\r
 227                 BNE             RegTest2Error\r
 228                 CMP             #400, R4\r
 229                 BNE             RegTest2Error\r
 230                 CMP             #500, R5\r
 231                 BNE             RegTest2Error\r
 232                 CMP             #600, R6\r
 233                 BNE             RegTest2Error\r
 234                 CMP             #700, R7\r
 235                 BNE             RegTest2Error\r
 236                 CMP             #800, R8\r
 237                 BNE             RegTest2Error\r
 238                 CMP             #900, R9\r
 239                 BNE             RegTest2Error\r
 240                 CMP             #1000, R10\r
 241                 BNE             RegTest2Error\r
 242                 CMP             #1001, R11\r
 243                 BNE             RegTest2Error\r
 244                 CMP             #1002, R12\r
 245                 BNE             RegTest2Error\r
 246                 CMP             #1003, R13\r
 247                 BNE             RegTest2Error\r
 248                 CMP             #1004, R14\r
 249                 BNE             RegTest2Error\r
 250                 CMP             #1005, R15\r
 251                 BNE             RegTest2Error\r
 252 \r
 253                 /* All comparisons passed, start a new iteration of this loop. */\r
 254                 BRA             TestLoop2\r
 255 \r
 256         /* A compare failed, just loop here so the loop counter stops\r
 257         incrementing causing the check timer to indicate the error. */\r
 258         RegTest2Error:\r
 259                 BRA RegTest2Error\r
 260 \r
 261 /*-----------------------------------------------------------*/\r
 262 \r
 263                 END\r
 264 \r