2 FreeRTOS V8.1.1 - Copyright (C) 2014 Real Time Engineers Ltd.
\r
5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
\r
7 ***************************************************************************
\r
9 * FreeRTOS provides completely free yet professionally developed, *
\r
10 * robust, strictly quality controlled, supported, and cross *
\r
11 * platform software that has become a de facto standard. *
\r
13 * Help yourself get started quickly and support the FreeRTOS *
\r
14 * project by purchasing a FreeRTOS tutorial book, reference *
\r
15 * manual, or both from: http://www.FreeRTOS.org/Documentation *
\r
19 ***************************************************************************
\r
21 This file is part of the FreeRTOS distribution.
\r
23 FreeRTOS is free software; you can redistribute it and/or modify it under
\r
24 the terms of the GNU General Public License (version 2) as published by the
\r
25 Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
\r
27 >>! NOTE: The modification to the GPL is included to allow you to !<<
\r
28 >>! distribute a combined work that includes FreeRTOS without being !<<
\r
29 >>! obliged to provide the source code for proprietary components !<<
\r
30 >>! outside of the FreeRTOS kernel. !<<
\r
32 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
\r
33 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
\r
34 FOR A PARTICULAR PURPOSE. Full license text is available from the following
\r
35 link: http://www.freertos.org/a00114.html
\r
39 ***************************************************************************
\r
41 * Having a problem? Start by reading the FAQ "My application does *
\r
42 * not run, what could be wrong?" *
\r
44 * http://www.FreeRTOS.org/FAQHelp.html *
\r
46 ***************************************************************************
\r
48 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
\r
49 license and Real Time Engineers Ltd. contact details.
\r
51 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
\r
52 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
\r
53 compatible FAT file system, and our tiny thread aware UDP/IP stack.
\r
55 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
\r
56 Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
\r
57 licenses offer ticketed support, indemnification and middleware.
\r
59 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
\r
60 engineered and independently SIL3 certified version for use in safety and
\r
61 mission critical applications that require provable dependability.
\r
67 * This file contains the non-portable and therefore RX62N specific parts of
\r
68 * the IntQueue standard demo task - namely the configuration of the timers
\r
69 * that generate the interrupts and the interrupt entry points.
\r
72 /* Scheduler includes. */
\r
73 #include "FreeRTOS.h"
\r
76 /* Demo includes. */
\r
77 #include "IntQueueTimer.h"
\r
78 #include "IntQueue.h"
\r
80 /* Hardware specifics. */
\r
81 #include "iodefine.h"
\r
83 #define tmrTIMER_0_1_FREQUENCY ( 2000UL )
\r
84 #define tmrTIMER_2_3_FREQUENCY ( 2001UL )
\r
86 /* Handlers for the two timers used. See the documentation page
\r
87 for this port on http://www.FreeRTOS.org for more information on writing
\r
88 interrupt handlers. */
\r
89 void vT0_1_ISR_Handler( void ) __attribute((interrupt));
\r
90 void vT2_3_ISR_Handler( void ) __attribute((interrupt));
\r
92 void vInitialiseTimerForIntQueueTest( void )
\r
94 /* Ensure interrupts do not start until full configuration is complete. */
\r
95 portENTER_CRITICAL();
\r
97 /* Cascade two 8bit timer channels to generate the interrupts.
\r
98 8bit timer unit 1 (TMR0 and TMR1) and 8bit timer unit 2 (TMR2 and TMR3 are
\r
99 utilised for this test. */
\r
101 /* Enable the timers. */
\r
102 SYSTEM.MSTPCRA.BIT.MSTPA5 = 0;
\r
103 SYSTEM.MSTPCRA.BIT.MSTPA4 = 0;
\r
105 /* Enable compare match A interrupt request. */
\r
106 TMR0.TCR.BIT.CMIEA = 1;
\r
107 TMR2.TCR.BIT.CMIEA = 1;
\r
109 /* Clear the timer on compare match A. */
\r
110 TMR0.TCR.BIT.CCLR = 1;
\r
111 TMR2.TCR.BIT.CCLR = 1;
\r
113 /* Set the compare match value. */
\r
114 TMR01.TCORA = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / tmrTIMER_0_1_FREQUENCY ) -1 ) / 8 );
\r
115 TMR23.TCORA = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / tmrTIMER_0_1_FREQUENCY ) -1 ) / 8 );
\r
117 /* 16 bit operation ( count from timer 1,2 ). */
\r
118 TMR0.TCCR.BIT.CSS = 3;
\r
119 TMR2.TCCR.BIT.CSS = 3;
\r
121 /* Use PCLK as the input. */
\r
122 TMR1.TCCR.BIT.CSS = 1;
\r
123 TMR3.TCCR.BIT.CSS = 1;
\r
125 /* Divide PCLK by 8. */
\r
126 TMR1.TCCR.BIT.CKS = 2;
\r
127 TMR3.TCCR.BIT.CKS = 2;
\r
129 /* Enable TMR 0, 2 interrupts. */
\r
130 IEN( TMR0, CMIA0 ) = 1;
\r
131 IEN( TMR2, CMIA2 ) = 1;
\r
133 /* Set the timer interrupts to be above the kernel. The interrupts are
\r
134 assigned different priorities so they nest with each other. */
\r
135 IPR( TMR0, CMIA0 ) = configMAX_SYSCALL_INTERRUPT_PRIORITY - 1;
\r
136 IPR( TMR2, CMIA2 ) = ( configMAX_SYSCALL_INTERRUPT_PRIORITY - 2 );
\r
138 portEXIT_CRITICAL();
\r
140 /* Ensure the interrupts are clear as they are edge detected. */
\r
141 IR( TMR0, CMIA0 ) = 0;
\r
142 IR( TMR2, CMIA2 ) = 0;
\r
144 /*-----------------------------------------------------------*/
\r
146 void vT0_1_ISR_Handler( void )
\r
148 /* Re-enabled interrupts. */
\r
149 __asm volatile( "SETPSW I" );
\r
151 /* Call the handler that is part of the common code - this is where the
\r
152 non-portable code ends and the actual test is performed. */
\r
153 portYIELD_FROM_ISR( xFirstTimerHandler() );
\r
155 /*-----------------------------------------------------------*/
\r
157 void vT2_3_ISR_Handler( void )
\r
159 /* Re-enabled interrupts. */
\r
160 __asm volatile( "SETPSW I" );
\r
162 /* Call the handler that is part of the common code - this is where the
\r
163 non-portable code ends and the actual test is performed. */
\r
164 portYIELD_FROM_ISR( xSecondTimerHandler() );
\r
166 /*-----------------------------------------------------------*/
\r