2 FreeRTOS V7.1.1 - Copyright (C) 2012 Real Time Engineers Ltd.
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5 ***************************************************************************
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7 * FreeRTOS tutorial books are available in pdf and paperback. *
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8 * Complete, revised, and edited pdf reference manuals are also *
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11 * Purchasing FreeRTOS documentation will not only help you, by *
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12 * ensuring you get running as quickly as possible and with an *
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13 * in-depth knowledge of how to use FreeRTOS, it will also help *
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14 * the FreeRTOS project to continue with its mission of providing *
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15 * professional grade, cross platform, de facto standard solutions *
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16 * for microcontrollers - completely free of charge! *
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18 * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
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20 * Thank you for using FreeRTOS, and thank you for your support! *
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22 ***************************************************************************
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25 This file is part of the FreeRTOS distribution.
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27 FreeRTOS is free software; you can redistribute it and/or modify it under
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28 the terms of the GNU General Public License (version 2) as published by the
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29 Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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30 >>>NOTE<<< The modification to the GPL is included to allow you to
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31 distribute a combined work that includes FreeRTOS without being obliged to
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32 provide the source code for proprietary components outside of the FreeRTOS
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33 kernel. FreeRTOS is distributed in the hope that it will be useful, but
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34 WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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35 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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36 more details. You should have received a copy of the GNU General Public
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37 License and the FreeRTOS license exception along with FreeRTOS; if not it
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38 can be viewed here: http://www.freertos.org/a00114.html and also obtained
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39 by writing to Richard Barry, contact details for whom are available on the
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44 ***************************************************************************
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46 * Having a problem? Start by reading the FAQ "My application does *
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47 * not run, what could be wrong? *
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49 * http://www.FreeRTOS.org/FAQHelp.html *
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51 ***************************************************************************
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54 http://www.FreeRTOS.org - Documentation, training, latest information,
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55 license and contact details.
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57 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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58 including FreeRTOS+Trace - an indispensable productivity tool.
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60 Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell
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61 the code with commercial support, indemnification, and middleware, under
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62 the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also
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63 provide a safety engineered and independently SIL3 certified version under
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64 the SafeRTOS brand: http://www.SafeRTOS.com.
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68 * This file contains the non-portable and therefore RX62N specific parts of
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69 * the IntQueue standard demo task - namely the configuration of the timers
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70 * that generate the interrupts and the interrupt entry points.
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73 /* Scheduler includes. */
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74 #include "FreeRTOS.h"
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77 /* Demo includes. */
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78 #include "IntQueueTimer.h"
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79 #include "IntQueue.h"
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81 /* Hardware specifics. */
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82 #include "iodefine.h"
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84 #define tmrTIMER_0_1_FREQUENCY ( 2000UL )
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85 #define tmrTIMER_2_3_FREQUENCY ( 2001UL )
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87 /* Handlers for the two timers used. See the documentation page
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88 for this port on http://www.FreeRTOS.org for more information on writing
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89 interrupt handlers. */
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90 void vT0_1_ISR_Handler( void ) __attribute((interrupt));
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91 void vT2_3_ISR_Handler( void ) __attribute((interrupt));
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93 void vInitialiseTimerForIntQueueTest( void )
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95 /* Ensure interrupts do not start until full configuration is complete. */
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96 portENTER_CRITICAL();
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98 /* Cascade two 8bit timer channels to generate the interrupts.
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99 8bit timer unit 1 (TMR0 and TMR1) and 8bit timer unit 2 (TMR2 and TMR3 are
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100 utilised for this test. */
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102 /* Enable the timers. */
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103 SYSTEM.MSTPCRA.BIT.MSTPA5 = 0;
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104 SYSTEM.MSTPCRA.BIT.MSTPA4 = 0;
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106 /* Enable compare match A interrupt request. */
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107 TMR0.TCR.BIT.CMIEA = 1;
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108 TMR2.TCR.BIT.CMIEA = 1;
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110 /* Clear the timer on compare match A. */
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111 TMR0.TCR.BIT.CCLR = 1;
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112 TMR2.TCR.BIT.CCLR = 1;
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114 /* Set the compare match value. */
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115 TMR01.TCORA = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / tmrTIMER_0_1_FREQUENCY ) -1 ) / 8 );
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116 TMR23.TCORA = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / tmrTIMER_0_1_FREQUENCY ) -1 ) / 8 );
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118 /* 16 bit operation ( count from timer 1,2 ). */
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119 TMR0.TCCR.BIT.CSS = 3;
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120 TMR2.TCCR.BIT.CSS = 3;
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122 /* Use PCLK as the input. */
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123 TMR1.TCCR.BIT.CSS = 1;
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124 TMR3.TCCR.BIT.CSS = 1;
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126 /* Divide PCLK by 8. */
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127 TMR1.TCCR.BIT.CKS = 2;
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128 TMR3.TCCR.BIT.CKS = 2;
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130 /* Enable TMR 0, 2 interrupts. */
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131 IEN( TMR0, CMIA0 ) = 1;
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132 IEN( TMR2, CMIA2 ) = 1;
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134 /* Set the timer interrupts to be above the kernel. The interrupts are
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135 assigned different priorities so they nest with each other. */
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136 IPR( TMR0, CMIA0 ) = configMAX_SYSCALL_INTERRUPT_PRIORITY - 1;
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137 IPR( TMR2, CMIA2 ) = ( configMAX_SYSCALL_INTERRUPT_PRIORITY - 2 );
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139 portEXIT_CRITICAL();
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141 /* Ensure the interrupts are clear as they are edge detected. */
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142 IR( TMR0, CMIA0 ) = 0;
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143 IR( TMR2, CMIA2 ) = 0;
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145 /*-----------------------------------------------------------*/
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147 void vT0_1_ISR_Handler( void )
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149 /* Re-enabled interrupts. */
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150 __asm volatile( "SETPSW I" );
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152 /* Call the handler that is part of the common code - this is where the
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153 non-portable code ends and the actual test is performed. */
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154 portYIELD_FROM_ISR( xFirstTimerHandler() );
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156 /*-----------------------------------------------------------*/
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158 void vT2_3_ISR_Handler( void )
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160 /* Re-enabled interrupts. */
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161 __asm volatile( "SETPSW I" );
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163 /* Call the handler that is part of the common code - this is where the
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164 non-portable code ends and the actual test is performed. */
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165 portYIELD_FROM_ISR( xSecondTimerHandler() );
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167 /*-----------------------------------------------------------*/
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