2 FreeRTOS V8.0.0:rc1 - Copyright (C) 2014 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 ***************************************************************************
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9 * FreeRTOS provides completely free yet professionally developed, *
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10 * robust, strictly quality controlled, supported, and cross *
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11 * platform software that has become a de facto standard. *
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13 * Help yourself get started quickly and support the FreeRTOS *
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14 * project by purchasing a FreeRTOS tutorial book, reference *
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15 * manual, or both from: http://www.FreeRTOS.org/Documentation *
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19 ***************************************************************************
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21 This file is part of the FreeRTOS distribution.
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23 FreeRTOS is free software; you can redistribute it and/or modify it under
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24 the terms of the GNU General Public License (version 2) as published by the
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25 Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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27 >>! NOTE: The modification to the GPL is included to allow you to distribute
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28 >>! a combined work that includes FreeRTOS without being obliged to provide
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29 >>! the source code for proprietary components outside of the FreeRTOS
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32 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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33 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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34 FOR A PARTICULAR PURPOSE. Full license text is available from the following
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35 link: http://www.freertos.org/a00114.html
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39 ***************************************************************************
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41 * Having a problem? Start by reading the FAQ "My application does *
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42 * not run, what could be wrong?" *
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44 * http://www.FreeRTOS.org/FAQHelp.html *
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46 ***************************************************************************
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48 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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49 license and Real Time Engineers Ltd. contact details.
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51 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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52 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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53 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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55 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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56 Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
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57 licenses offer ticketed support, indemnification and middleware.
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59 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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60 engineered and independently SIL3 certified version for use in safety and
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61 mission critical applications that require provable dependability.
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67 * This file contains the non-portable and therefore RX62N specific parts of
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68 * the IntQueue standard demo task - namely the configuration of the timers
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69 * that generate the interrupts and the interrupt entry points.
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72 /* Scheduler includes. */
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73 #include "FreeRTOS.h"
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76 /* Demo includes. */
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77 #include "IntQueueTimer.h"
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78 #include "IntQueue.h"
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80 #define tmrTIMER_0_1_FREQUENCY ( 2000UL )
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81 #define tmrTIMER_2_3_FREQUENCY ( 2001UL )
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83 void vInitialiseTimerForIntQueueTest( void )
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85 /* Ensure interrupts do not start until full configuration is complete. */
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86 portENTER_CRITICAL();
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88 /* Cascade two 8bit timer channels to generate the interrupts.
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89 8bit timer unit 1 (TMR0 and TMR1) and 8bit timer unit 2 (TMR2 and TMR3 are
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90 utilised for this test. */
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92 /* Enable the timers. */
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93 SYSTEM.MSTPCRA.BIT.MSTPA5 = 0;
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94 SYSTEM.MSTPCRA.BIT.MSTPA4 = 0;
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96 /* Enable compare match A interrupt request. */
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97 TMR0.TCR.BIT.CMIEA = 1;
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98 TMR2.TCR.BIT.CMIEA = 1;
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100 /* Clear the timer on compare match A. */
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101 TMR0.TCR.BIT.CCLR = 1;
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102 TMR2.TCR.BIT.CCLR = 1;
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104 /* Set the compare match value. */
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105 TMR01.TCORA = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / tmrTIMER_0_1_FREQUENCY ) -1 ) / 8 );
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106 TMR23.TCORA = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / tmrTIMER_0_1_FREQUENCY ) -1 ) / 8 );
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108 /* 16 bit operation ( count from timer 1,2 ). */
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109 TMR0.TCCR.BIT.CSS = 3;
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110 TMR2.TCCR.BIT.CSS = 3;
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112 /* Use PCLK as the input. */
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113 TMR1.TCCR.BIT.CSS = 1;
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114 TMR3.TCCR.BIT.CSS = 1;
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116 /* Divide PCLK by 8. */
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117 TMR1.TCCR.BIT.CKS = 2;
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118 TMR3.TCCR.BIT.CKS = 2;
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120 /* Enable TMR 0, 2 interrupts. */
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121 IEN( TMR0, CMIA0 ) = 1;
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122 IEN( TMR2, CMIA2 ) = 1;
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124 /* Set the timer interrupts to be above the kernel. The interrupts are
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125 assigned different priorities so they nest with each other. */
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126 IPR( TMR0, CMIA0 ) = configMAX_SYSCALL_INTERRUPT_PRIORITY - 1;
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127 IPR( TMR2, CMIA2 ) = ( configMAX_SYSCALL_INTERRUPT_PRIORITY - 2 );
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129 portEXIT_CRITICAL();
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131 /* Ensure the interrupts are clear as they are edge detected. */
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132 IR( TMR0, CMIA0 ) = 0;
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133 IR( TMR2, CMIA2 ) = 0;
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135 /*-----------------------------------------------------------*/
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137 #pragma interrupt ( vT0_1InterruptHandler( vect = VECT_TMR0_CMIA0, enable ) )
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138 void vT0_1InterruptHandler( void )
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140 portYIELD_FROM_ISR( xFirstTimerHandler() );
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142 /*-----------------------------------------------------------*/
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144 #pragma interrupt ( vT2_3InterruptHandler( vect = VECT_TMR2_CMIA2, enable ) )
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145 void vT2_3InterruptHandler( void )
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147 portYIELD_FROM_ISR( xSecondTimerHandler() );
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