2 FreeRTOS V8.1.0 - Copyright (C) 2014 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 ***************************************************************************
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9 * FreeRTOS provides completely free yet professionally developed, *
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10 * robust, strictly quality controlled, supported, and cross *
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11 * platform software that has become a de facto standard. *
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13 * Help yourself get started quickly and support the FreeRTOS *
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14 * project by purchasing a FreeRTOS tutorial book, reference *
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15 * manual, or both from: http://www.FreeRTOS.org/Documentation *
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19 ***************************************************************************
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21 This file is part of the FreeRTOS distribution.
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23 FreeRTOS is free software; you can redistribute it and/or modify it under
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24 the terms of the GNU General Public License (version 2) as published by the
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25 Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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27 >>! NOTE: The modification to the GPL is included to allow you to !<<
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28 >>! distribute a combined work that includes FreeRTOS without being !<<
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29 >>! obliged to provide the source code for proprietary components !<<
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30 >>! outside of the FreeRTOS kernel. !<<
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32 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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33 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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34 FOR A PARTICULAR PURPOSE. Full license text is available from the following
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35 link: http://www.freertos.org/a00114.html
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39 ***************************************************************************
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41 * Having a problem? Start by reading the FAQ "My application does *
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42 * not run, what could be wrong?" *
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44 * http://www.FreeRTOS.org/FAQHelp.html *
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46 ***************************************************************************
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48 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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49 license and Real Time Engineers Ltd. contact details.
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51 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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52 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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53 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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55 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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56 Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
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57 licenses offer ticketed support, indemnification and middleware.
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59 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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60 engineered and independently SIL3 certified version for use in safety and
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61 mission critical applications that require provable dependability.
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67 /* Standard includes. */
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70 /* Scheduler include files. */
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71 #include "FreeRTOS.h"
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75 /* Application includes. */
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78 /*-----------------------------------------------------------*/
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80 /* Constants to setup the microcontroller IO. */
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81 #define mainSDA_ENABLE ( ( unsigned long ) 0x0040 )
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82 #define mainSCL_ENABLE ( ( unsigned long ) 0x0010 )
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84 /* Bit definitions within the I2CONCLR register. */
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85 #define i2cSTA_BIT ( ( unsigned char ) 0x20 )
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86 #define i2cSI_BIT ( ( unsigned char ) 0x08 )
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87 #define i2cSTO_BIT ( ( unsigned char ) 0x10 )
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89 /* Constants required to setup the VIC. */
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90 #define i2cI2C_VIC_CHANNEL ( ( unsigned long ) 0x0009 )
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91 #define i2cI2C_VIC_CHANNEL_BIT ( ( unsigned long ) 0x0200 )
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92 #define i2cI2C_VIC_ENABLE ( ( unsigned long ) 0x0020 )
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94 /* Misc constants. */
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95 #define i2cNO_BLOCK ( ( TickType_t ) 0 )
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96 #define i2cQUEUE_LENGTH ( ( unsigned char ) 5 )
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97 #define i2cEXTRA_MESSAGES ( ( unsigned char ) 2 )
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98 #define i2cREAD_TX_LEN ( ( unsigned long ) 2 )
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99 #define i2cACTIVE_MASTER_MODE ( ( unsigned char ) 0x40 )
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100 #define i2cTIMERL ( 200 )
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101 #define i2cTIMERH ( 200 )
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103 /* Array of message definitions. See the header file for more information
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104 on the structure members. There are two more places in the queue than as
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105 defined by i2cQUEUE_LENGTH. This is to ensure that there is always a free
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106 message available - one can be in the process of being transmitted and one
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107 can be left free. */
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108 static xI2CMessage xTxMessages[ i2cQUEUE_LENGTH + i2cEXTRA_MESSAGES ];
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110 /* Function in the ARM part of the code used to create the queues. */
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111 extern void vI2CISRCreateQueues( unsigned portBASE_TYPE uxQueueLength, QueueHandle_t *pxTxMessages, unsigned long **ppulBusFree );
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113 /* Index to the next free message in the xTxMessages array. */
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114 unsigned long ulNextFreeMessage = ( unsigned long ) 0;
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116 /* Queue of messages that are waiting transmission. */
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117 static QueueHandle_t xMessagesForTx;
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119 /* Flag to indicate the state of the I2C ISR state machine. */
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120 static unsigned long *pulBusFree;
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122 /*-----------------------------------------------------------*/
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123 void i2cMessage( const unsigned char * const pucMessage, long lMessageLength, unsigned char ucSlaveAddress, unsigned short usBufferAddress, unsigned long ulDirection, SemaphoreHandle_t xMessageCompleteSemaphore, TickType_t xBlockTime )
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125 extern volatile xI2CMessage *pxCurrentMessage;
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126 xI2CMessage *pxNextFreeMessage;
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127 signed portBASE_TYPE xReturn;
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129 portENTER_CRITICAL();
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131 /* This message is guaranteed to be free as there are two more messages
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132 than spaces in the queue allowing for one message to be in process of
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133 being transmitted and one to be left free. */
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134 pxNextFreeMessage = &( xTxMessages[ ulNextFreeMessage ] );
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136 /* Fill the message with the data to be sent. */
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138 /* Pointer to the actual data. Only a pointer is stored (i.e. the
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139 actual data is not copied, so the data being pointed to must still
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140 be valid when the message eventually gets sent (it may be queued for
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142 pxNextFreeMessage->pucBuffer = ( unsigned char * ) pucMessage;
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144 /* This is the address of the I2C device we are going to transmit this
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146 pxNextFreeMessage->ucSlaveAddress = ucSlaveAddress | ( unsigned char ) ulDirection;
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148 /* A semaphore can be used to allow the I2C ISR to indicate that the
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149 message has been sent. This can be NULL if you don't want to wait for
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150 the message transmission to complete. */
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151 pxNextFreeMessage->xMessageCompleteSemaphore = xMessageCompleteSemaphore;
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153 /* How many bytes are to be sent? */
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154 pxNextFreeMessage->lMessageLength = lMessageLength;
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156 /* The address within the WIZnet device to which the data will be
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157 written. This could be the address of a register, or alternatively
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158 a location within the WIZnet Tx buffer. */
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159 pxNextFreeMessage->ucBufferAddressLowByte = ( unsigned char ) ( usBufferAddress & 0xff );
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161 /* Second byte of the address. */
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162 usBufferAddress >>= 8;
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163 pxNextFreeMessage->ucBufferAddressHighByte = ( unsigned char ) ( usBufferAddress & 0xff );
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165 /* Increment to the next message in the array - with a wrap around check. */
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166 ulNextFreeMessage++;
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167 if( ulNextFreeMessage >= ( i2cQUEUE_LENGTH + i2cEXTRA_MESSAGES ) )
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169 ulNextFreeMessage = ( unsigned long ) 0;
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172 /* Is the I2C interrupt in the middle of transmitting a message? */
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173 if( *pulBusFree == ( unsigned long ) pdTRUE )
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175 /* No message is currently being sent or queued to be sent. We
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176 can start the ISR sending this message immediately. */
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177 pxCurrentMessage = pxNextFreeMessage;
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179 I2C_I2CONCLR = i2cSI_BIT;
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180 I2C_I2CONSET = i2cSTA_BIT;
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182 *pulBusFree = ( unsigned long ) pdFALSE;
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186 /* The I2C interrupt routine is mid sending a message. Queue
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187 this message ready to be sent. */
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188 xReturn = xQueueSend( xMessagesForTx, &pxNextFreeMessage, xBlockTime );
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190 /* We may have blocked while trying to queue the message. If this
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191 was the case then the interrupt would have been enabled and we may
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192 now find that the I2C interrupt routine is no longer sending a
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194 if( ( *pulBusFree == ( unsigned long ) pdTRUE ) && ( xReturn == pdPASS ) )
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196 /* Get the next message in the queue (this should be the
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197 message we just posted) and start off the transmission
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199 xQueueReceive( xMessagesForTx, &pxNextFreeMessage, i2cNO_BLOCK );
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200 pxCurrentMessage = pxNextFreeMessage;
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202 I2C_I2CONCLR = i2cSI_BIT;
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203 I2C_I2CONSET = i2cSTA_BIT;
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205 *pulBusFree = ( unsigned long ) pdFALSE;
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209 portEXIT_CRITICAL();
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211 /*-----------------------------------------------------------*/
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213 void i2cInit( void )
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215 extern void ( vI2C_ISR_Wrapper )( void );
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217 /* Create the queue used to send messages to the ISR. */
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218 vI2CISRCreateQueues( i2cQUEUE_LENGTH, &xMessagesForTx, &pulBusFree );
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220 /* Configure the I2C hardware. */
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222 I2C_I2CONCLR = 0xff;
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224 PCB_PINSEL0 |= mainSDA_ENABLE;
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225 PCB_PINSEL0 |= mainSCL_ENABLE;
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227 I2C_I2SCLL = i2cTIMERL;
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228 I2C_I2SCLH = i2cTIMERH;
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229 I2C_I2CONSET = i2cACTIVE_MASTER_MODE;
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231 portENTER_CRITICAL();
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233 /* Setup the VIC for the i2c interrupt. */
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234 VICIntSelect &= ~( i2cI2C_VIC_CHANNEL_BIT );
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235 VICIntEnable |= i2cI2C_VIC_CHANNEL_BIT;
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236 VICVectAddr2 = ( long ) vI2C_ISR_Wrapper;
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238 VICVectCntl2 = i2cI2C_VIC_CHANNEL | i2cI2C_VIC_ENABLE;
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240 portEXIT_CRITICAL();
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