2 FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 This file is part of the FreeRTOS distribution.
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9 FreeRTOS is free software; you can redistribute it and/or modify it under
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10 the terms of the GNU General Public License (version 2) as published by the
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11 Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
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13 ***************************************************************************
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14 >>! NOTE: The modification to the GPL is included to allow you to !<<
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15 >>! distribute a combined work that includes FreeRTOS without being !<<
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16 >>! obliged to provide the source code for proprietary components !<<
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17 >>! outside of the FreeRTOS kernel. !<<
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18 ***************************************************************************
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20 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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21 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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22 FOR A PARTICULAR PURPOSE. Full license text is available on the following
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23 link: http://www.freertos.org/a00114.html
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25 ***************************************************************************
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27 * FreeRTOS provides completely free yet professionally developed, *
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28 * robust, strictly quality controlled, supported, and cross *
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29 * platform software that is more than just the market leader, it *
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30 * is the industry's de facto standard. *
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32 * Help yourself get started quickly while simultaneously helping *
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33 * to support the FreeRTOS project by purchasing a FreeRTOS *
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34 * tutorial book, reference manual, or both: *
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35 * http://www.FreeRTOS.org/Documentation *
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37 ***************************************************************************
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39 http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
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40 the FAQ page "My application does not run, what could be wrong?". Have you
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41 defined configASSERT()?
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43 http://www.FreeRTOS.org/support - In return for receiving this top quality
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44 embedded software for free we request you assist our global community by
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45 participating in the support forum.
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47 http://www.FreeRTOS.org/training - Investing in training allows your team to
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48 be as productive as possible as early as possible. Now you can receive
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49 FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
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50 Ltd, and the world's leading authority on the world's leading RTOS.
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52 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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53 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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54 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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56 http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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57 Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
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59 http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
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60 Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
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61 licenses offer ticketed support, indemnification and commercial middleware.
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63 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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64 engineered and independently SIL3 certified version for use in safety and
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65 mission critical applications that require provable dependability.
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72 BASIC INTERRUPT DRIVEN DRIVER FOR USB.
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74 This file contains all the usb components that must be compiled
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75 to ARM mode. The components that can be compiled to either ARM or THUMB
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76 mode are contained in USB-CDC.c.
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80 /* Scheduler includes. */
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81 #include "FreeRTOS.h"
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85 /* Demo application includes. */
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88 #include "USB-CDC.h"
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90 #define usbINT_CLEAR_MASK (AT91C_UDP_TXCOMP | AT91C_UDP_STALLSENT | AT91C_UDP_RXSETUP | AT91C_UDP_RX_DATA_BK0 | AT91C_UDP_RX_DATA_BK1 )
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91 /*-----------------------------------------------------------*/
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93 /* Messages and queue used to communicate between the ISR and the USB task. */
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94 static xISRStatus xISRMessages[ usbQUEUE_LENGTH + 1 ];
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95 extern QueueHandle_t xUSBInterruptQueue;
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96 /*-----------------------------------------------------------*/
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98 /* The ISR can cause a context switch so is declared naked. */
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99 void vUSB_ISR_Wrapper( void ) __attribute__ ((naked));
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101 /* The function that actually performs the ISR work. This must be separate
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102 from the wrapper function to ensure the correct stack frame gets set up. */
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103 void vUSB_ISR_Handler( void );
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104 /*-----------------------------------------------------------*/
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106 void vUSB_ISR_Handler( void )
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108 portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
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109 static volatile unsigned long ulNextMessage = 0;
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110 xISRStatus *pxMessage;
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111 unsigned long ulRxBytes;
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112 unsigned char ucFifoIndex;
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114 /* Use the next message from the array. */
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115 pxMessage = &( xISRMessages[ ( ulNextMessage & usbQUEUE_LENGTH ) ] );
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118 /* Save UDP ISR state for task-level processing. */
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119 pxMessage->ulISR = AT91C_BASE_UDP->UDP_ISR;
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120 pxMessage->ulCSR0 = AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ];
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122 /* Clear interrupts from ICR. */
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123 AT91C_BASE_UDP->UDP_ICR = AT91C_BASE_UDP->UDP_IMR | AT91C_UDP_ENDBUSRES;
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126 /* Process incoming FIFO data. Must set DIR (if needed) and clear RXSETUP
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129 /* Read CSR and get incoming byte count. */
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130 ulRxBytes = ( pxMessage->ulCSR0 >> 16 ) & usbRX_COUNT_MASK;
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132 /* Receive control transfers on endpoint 0. */
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133 if( pxMessage->ulCSR0 & ( AT91C_UDP_RXSETUP | AT91C_UDP_RX_DATA_BK0 ) )
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135 /* Save FIFO data buffer for either a SETUP or DATA stage */
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136 for( ucFifoIndex = 0; ucFifoIndex < ulRxBytes; ucFifoIndex++ )
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138 pxMessage->ucFifoData[ ucFifoIndex ] = AT91C_BASE_UDP->UDP_FDR[ usbEND_POINT_0 ];
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141 /* Set direction for data stage. Must be done before RXSETUP is
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143 if( ( AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ] & AT91C_UDP_RXSETUP ) )
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145 if( ulRxBytes && ( pxMessage->ucFifoData[ usbREQUEST_TYPE_INDEX ] & 0x80 ) )
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147 AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ] |= AT91C_UDP_DIR;
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149 /* Might not be wise in an ISR! */
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150 while( !(AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ] & AT91C_UDP_DIR) );
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153 /* Clear RXSETUP */
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154 AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ] &= ~AT91C_UDP_RXSETUP;
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156 /* Might not be wise in an ISR! */
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157 while ( AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ] & AT91C_UDP_RXSETUP );
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161 /* Clear RX_DATA_BK0 */
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162 AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ] &= ~AT91C_UDP_RX_DATA_BK0;
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164 /* Might not be wise in an ISR! */
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165 while ( AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ] & AT91C_UDP_RX_DATA_BK0 );
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169 /* If we received data on endpoint 1, disable its interrupts until it is
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170 processed in the main loop */
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171 if( AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_1 ] & ( AT91C_UDP_RX_DATA_BK0 | AT91C_UDP_RX_DATA_BK1 ) )
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173 AT91C_BASE_UDP->UDP_IDR = AT91C_UDP_EPINT1;
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176 AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ] &= ~( AT91C_UDP_TXCOMP | AT91C_UDP_STALLSENT );
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178 /* Clear interrupts for the other endpoints, retain data flags for endpoint
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180 AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_1 ] &= ~( AT91C_UDP_TXCOMP | AT91C_UDP_STALLSENT | AT91C_UDP_RXSETUP );
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181 AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_2 ] &= ~usbINT_CLEAR_MASK;
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182 AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_3 ] &= ~usbINT_CLEAR_MASK;
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184 /* Post ISR data to queue for task-level processing */
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185 xQueueSendFromISR( xUSBInterruptQueue, &pxMessage, &xHigherPriorityTaskWoken );
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187 /* Clear AIC to complete ISR processing */
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188 AT91C_BASE_AIC->AIC_EOICR = 0;
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190 /* Do a task switch if needed */
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191 if( xHigherPriorityTaskWoken )
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193 /* This call will ensure that the unblocked task will be executed
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194 immediately upon completion of the ISR if it has a priority higher
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195 than the interrupted task. */
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196 portYIELD_FROM_ISR();
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199 /*-----------------------------------------------------------*/
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201 void vUSB_ISR_Wrapper( void )
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203 /* Save the context of the interrupted task. */
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204 portSAVE_CONTEXT();
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206 /* Call the handler to do the work. This must be a separate
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207 function to ensure the stack frame is set up correctly. */
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208 vUSB_ISR_Handler();
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210 /* Restore the context of whichever task will execute next. */
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211 portRESTORE_CONTEXT();
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