2 * FreeRTOS Kernel V10.0.0
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3 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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5 * Permission is hereby granted, free of charge, to any person obtaining a copy of
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6 * this software and associated documentation files (the "Software"), to deal in
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7 * the Software without restriction, including without limitation the rights to
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8 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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9 * the Software, and to permit persons to whom the Software is furnished to do so,
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10 * subject to the following conditions:
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12 * The above copyright notice and this permission notice shall be included in all
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13 * copies or substantial portions of the Software. If you wish to use our Amazon
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14 * FreeRTOS name, please do so in a fair use way that does not cause confusion.
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16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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18 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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19 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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20 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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23 * http://www.FreeRTOS.org
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24 * http://aws.amazon.com/freertos
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26 * 1 tab == 4 spaces!
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30 /* BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER.
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32 * This file only supports UART 1
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35 /* Standard includes. */
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38 /* Scheduler includes. */
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39 #include "FreeRTOS.h"
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43 /* Demo application includes. */
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46 /* Constants required to setup the hardware. */
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47 #define serTX_AND_RX ( ( unsigned char ) 0x03 )
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49 /* Misc. constants. */
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50 #define serNO_BLOCK ( ( TickType_t ) 0 )
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52 /* Enable the UART Tx interrupt. */
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53 #define vInterruptOn() IFG2 |= UTXIFG1
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55 /* The queue used to hold received characters. */
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56 static QueueHandle_t xRxedChars;
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58 /* The queue used to hold characters waiting transmission. */
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59 static QueueHandle_t xCharsForTx;
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61 static volatile short sTHREEmpty;
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63 /*-----------------------------------------------------------*/
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65 xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
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67 unsigned long ulBaudRateCount;
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69 /* Initialise the hardware. */
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71 /* Generate the baud rate constants for the wanted baud rate. */
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72 ulBaudRateCount = configCPU_CLOCK_HZ / ulWantedBaud;
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74 portENTER_CRITICAL();
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76 /* Create the queues used by the com test task. */
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77 xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed char ) );
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78 xCharsForTx = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed char ) );
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83 /* Set pin function. */
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84 P4SEL |= serTX_AND_RX;
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86 /* All other bits remain at zero for n, 8, 1 interrupt driven operation.
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88 U1CTL |= CHAR + LISTEN;
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91 /* Setup baud rate low byte. */
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92 U1BR0 = ( unsigned char ) ( ulBaudRateCount & ( unsigned long ) 0xff );
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94 /* Setup baud rate high byte. */
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95 ulBaudRateCount >>= 8UL;
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96 U1BR1 = ( unsigned char ) ( ulBaudRateCount & ( unsigned long ) 0xff );
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99 ME2 |= UTXE1 + URXE1;
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104 /* Nothing in the buffer yet. */
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105 sTHREEmpty = pdTRUE;
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107 /* Enable interrupts. */
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108 IE2 |= URXIE1 + UTXIE1;
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110 portEXIT_CRITICAL();
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112 /* Unlike other ports, this serial code does not allow for more than one
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113 com port. We therefore don't return a pointer to a port structure and can
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114 instead just return NULL. */
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117 /*-----------------------------------------------------------*/
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119 signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed char *pcRxedChar, TickType_t xBlockTime )
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121 /* Get the next character from the buffer. Return false if no characters
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122 are available, or arrive before xBlockTime expires. */
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123 if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
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132 /*-----------------------------------------------------------*/
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134 signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed char cOutChar, TickType_t xBlockTime )
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136 signed portBASE_TYPE xReturn;
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138 /* Transmit a character. */
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140 portENTER_CRITICAL();
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142 if( sTHREEmpty == pdTRUE )
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144 /* If sTHREEmpty is true then the UART Tx ISR has indicated that
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145 there are no characters queued to be transmitted - so we can
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146 write the character directly to the shift Tx register. */
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147 sTHREEmpty = pdFALSE;
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148 U1TXBUF = cOutChar;
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153 /* sTHREEmpty is false, so there are still characters waiting to be
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154 transmitted. We have to queue this character so it gets
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155 transmitted in turn. */
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157 /* Return false if after the block time there is no room on the Tx
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158 queue. It is ok to block inside a critical section as each task
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159 maintains it's own critical section status. */
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160 xReturn = xQueueSend( xCharsForTx, &cOutChar, xBlockTime );
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162 /* Depending on queue sizing and task prioritisation: While we
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163 were blocked waiting to post on the queue interrupts were not
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164 disabled. It is possible that the serial ISR has emptied the
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165 Tx queue, in which case we need to start the Tx off again
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166 writing directly to the Tx register. */
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167 if( ( sTHREEmpty == pdTRUE ) && ( xReturn == pdPASS ) )
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169 /* Get back the character we just posted. */
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170 xQueueReceive( xCharsForTx, &cOutChar, serNO_BLOCK );
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171 sTHREEmpty = pdFALSE;
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172 U1TXBUF = cOutChar;
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176 portEXIT_CRITICAL();
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180 /*-----------------------------------------------------------*/
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182 #if configINTERRUPT_EXAMPLE_METHOD == 1
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185 * UART RX interrupt service routine.
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187 #pragma vector=UART1RX_VECTOR
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188 __interrupt void vRxISR( void )
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191 portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
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193 /* Get the character from the UART and post it on the queue of Rxed
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197 xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
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199 if( xHigherPriorityTaskWoken )
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201 /*If the post causes a task to wake force a context switch
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202 as the woken task may have a higher priority than the task we have
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207 /* Make sure any low power mode bits are clear before leaving the ISR. */
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208 __bic_SR_register_on_exit( SCG1 + SCG0 + OSCOFF + CPUOFF );
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210 /*-----------------------------------------------------------*/
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213 * UART Tx interrupt service routine.
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215 #pragma vector=UART1TX_VECTOR
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216 __interrupt void vTxISR( void )
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219 portBASE_TYPE xTaskWoken = pdFALSE;
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221 /* The previous character has been transmitted. See if there are any
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222 further characters waiting transmission. */
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224 if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWoken ) == pdTRUE )
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226 /* There was another character queued - transmit it now. */
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231 /* There were no other characters to transmit. */
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232 sTHREEmpty = pdTRUE;
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235 /* Make sure any low power mode bits are clear before leaving the ISR. */
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236 __bic_SR_register_on_exit( SCG1 + SCG0 + OSCOFF + CPUOFF );
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238 /*-----------------------------------------------------------*/
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240 #elif configINTERRUPT_EXAMPLE_METHOD == 2
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242 /* This is a standard C function as an assembly file wrapper is used as an
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243 interrupt entry point. */
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244 void vRxISR( void )
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247 portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
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249 /* Get the character from the UART and post it on the queue of Rxed
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253 xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
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255 /*If the post causes a task to wake force a context switch
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256 as the woken task may have a higher priority than the task we have
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258 portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
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260 /*-----------------------------------------------------------*/
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262 /* This is a standard C function as an assembly file wrapper is used as an
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263 interrupt entry point. */
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264 void vTxISR( void )
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267 portBASE_TYPE xTaskWoken = pdFALSE;
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269 /* The previous character has been transmitted. See if there are any
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270 further characters waiting transmission. */
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272 if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWoken ) == pdTRUE )
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274 /* There was another character queued - transmit it now. */
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279 /* There were no other characters to transmit. */
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280 sTHREEmpty = pdTRUE;
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284 #endif /* configINTERRUPT_EXAMPLE_METHOD */
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285 /*-----------------------------------------------------------*/
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