2 FreeRTOS V8.2.0rc1 - Copyright (C) 2014 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 This file is part of the FreeRTOS distribution.
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9 FreeRTOS is free software; you can redistribute it and/or modify it under
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10 the terms of the GNU General Public License (version 2) as published by the
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11 Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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13 >>! NOTE: The modification to the GPL is included to allow you to !<<
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14 >>! distribute a combined work that includes FreeRTOS without being !<<
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15 >>! obliged to provide the source code for proprietary components !<<
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16 >>! outside of the FreeRTOS kernel. !<<
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18 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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19 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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20 FOR A PARTICULAR PURPOSE. Full license text is available on the following
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21 link: http://www.freertos.org/a00114.html
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25 ***************************************************************************
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27 * Having a problem? Start by reading the FAQ "My application does *
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28 * not run, what could be wrong?". Have you defined configASSERT()? *
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30 * http://www.FreeRTOS.org/FAQHelp.html *
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32 ***************************************************************************
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34 ***************************************************************************
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36 * FreeRTOS provides completely free yet professionally developed, *
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37 * robust, strictly quality controlled, supported, and cross *
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38 * platform software that is more than just the market leader, it *
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39 * is the industry's de facto standard. *
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41 * Help yourself get started quickly while simultaneously helping *
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42 * to support the FreeRTOS project by purchasing a FreeRTOS *
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43 * tutorial book, reference manual, or both: *
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44 * http://www.FreeRTOS.org/Documentation *
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46 ***************************************************************************
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48 ***************************************************************************
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50 * Investing in training allows your team to be as productive as *
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51 * possible as early as possible, lowering your overall development *
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52 * cost, and enabling you to bring a more robust product to market *
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53 * earlier than would otherwise be possible. Richard Barry is both *
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54 * the architect and key author of FreeRTOS, and so also the world's *
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55 * leading authority on what is the world's most popular real time *
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56 * kernel for deeply embedded MCU designs. Obtaining your training *
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57 * from Richard ensures your team will gain directly from his in-depth *
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58 * product knowledge and years of usage experience. Contact Real Time *
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59 * Engineers Ltd to enquire about the FreeRTOS Masterclass, presented *
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60 * by Richard Barry: http://www.FreeRTOS.org/contact
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62 ***************************************************************************
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64 ***************************************************************************
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66 * You are receiving this top quality software for free. Please play *
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67 * fair and reciprocate by reporting any suspected issues and *
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68 * participating in the community forum: *
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69 * http://www.FreeRTOS.org/support *
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73 ***************************************************************************
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75 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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76 license and Real Time Engineers Ltd. contact details.
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78 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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79 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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80 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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82 http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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83 Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
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85 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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86 Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
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87 licenses offer ticketed support, indemnification and commercial middleware.
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89 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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90 engineered and independently SIL3 certified version for use in safety and
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91 mission critical applications that require provable dependability.
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96 /* FreeRTOS includes. */
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97 #include "FreeRTOS.h"
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100 /*-----------------------------------------------------------*/
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102 /* Count of the critical section nesting depth. */
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103 uint32_t ulCriticalNesting = 9999;
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105 /*-----------------------------------------------------------*/
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107 /* Registers required to configure the RTI. */
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108 #define portRTI_GCTRL_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC00 ) )
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109 #define portRTI_TBCTRL_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC04 ) )
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110 #define portRTI_COMPCTRL_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC0C ) )
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111 #define portRTI_CNT0_FRC0_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC10 ) )
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112 #define portRTI_CNT0_UC0_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC14 ) )
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113 #define portRTI_CNT0_CPUC0_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC18 ) )
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114 #define portRTI_CNT0_COMP0_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC50 ) )
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115 #define portRTI_CNT0_UDCP0_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC54 ) )
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116 #define portRTI_SETINTENA_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC80 ) )
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117 #define portRTI_CLEARINTENA_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC84 ) )
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118 #define portRTI_INTFLAG_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC88 ) )
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121 /* Constants required to set up the initial stack of each task. */
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122 #define portINITIAL_SPSR ( ( StackType_t ) 0x1F )
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123 #define portINITIAL_FPSCR ( ( StackType_t ) 0x00 )
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124 #define portINSTRUCTION_SIZE ( ( StackType_t ) 0x04 )
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125 #define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
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127 /* The number of words on the stack frame between the saved Top Of Stack and
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128 R0 (in which the parameters are passed. */
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129 #define portSPACE_BETWEEN_TOS_AND_PARAMETERS ( 12 )
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131 /*-----------------------------------------------------------*/
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133 /* vPortStartFirstSTask() is defined in portASM.asm */
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134 extern void vPortStartFirstTask( void );
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136 /*-----------------------------------------------------------*/
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138 /* Saved as part of the task context. Set to pdFALSE if the task does not
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139 require an FPU context. */
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140 uint32_t ulTaskHasFPUContext = 0;
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142 /*-----------------------------------------------------------*/
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146 * See header file for description.
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148 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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150 StackType_t *pxOriginalTOS;
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152 pxOriginalTOS = pxTopOfStack;
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154 #if __TI_VFP_SUPPORT__
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156 /* Ensure the stack is correctly aligned on exit. */
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161 /* Setup the initial stack of the task. The stack is set exactly as
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162 expected by the portRESTORE_CONTEXT() macro. */
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164 /* First on the stack is the return address - which is the start of the as
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165 the task has not executed yet. The offset is added to make the return
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166 address appear as it would within an IRQ ISR. */
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167 *pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
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170 *pxTopOfStack = ( StackType_t ) 0x00000000; /* R14 */
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172 *pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
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175 #ifdef portPRELOAD_TASK_REGISTERS
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177 *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
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179 *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
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181 *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
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183 *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
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185 *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
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187 *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
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189 *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
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191 *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
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193 *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
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195 *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
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197 *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
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199 *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
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204 pxTopOfStack -= portSPACE_BETWEEN_TOS_AND_PARAMETERS;
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208 /* Function parameters are passed in R0. */
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209 *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
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212 /* Set the status register for system mode, with interrupts enabled. */
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213 *pxTopOfStack = ( StackType_t ) ( ( _get_CPSR() & ~0xFF ) | portINITIAL_SPSR );
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215 if( ( ( uint32_t ) pxCode & 0x01UL ) != 0x00 )
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217 /* The task will start in thumb mode. */
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218 *pxTopOfStack |= portTHUMB_MODE_BIT;
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221 #ifdef __TI_VFP_SUPPORT__
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225 /* The last thing on the stack is the tasks ulUsingFPU value, which by
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226 default is set to indicate that the stack frame does not include FPU
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228 *pxTopOfStack = pdFALSE;
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232 return pxTopOfStack;
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234 /*-----------------------------------------------------------*/
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236 static void prvSetupTimerInterrupt(void)
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238 /* Disable timer 0. */
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239 portRTI_GCTRL_REG &= 0xFFFFFFFEUL;
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241 /* Use the internal counter. */
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242 portRTI_TBCTRL_REG = 0x00000000U;
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244 /* COMPSEL0 will use the RTIFRC0 counter. */
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245 portRTI_COMPCTRL_REG = 0x00000000U;
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247 /* Initialise the counter and the prescale counter registers. */
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248 portRTI_CNT0_UC0_REG = 0x00000000U;
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249 portRTI_CNT0_FRC0_REG = 0x00000000U;
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251 /* Set Prescalar for RTI clock. */
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252 portRTI_CNT0_CPUC0_REG = 0x00000001U;
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253 portRTI_CNT0_COMP0_REG = ( configCPU_CLOCK_HZ / 2 ) / configTICK_RATE_HZ;
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254 portRTI_CNT0_UDCP0_REG = ( configCPU_CLOCK_HZ / 2 ) / configTICK_RATE_HZ;
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256 /* Clear interrupts. */
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257 portRTI_INTFLAG_REG = 0x0007000FU;
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258 portRTI_CLEARINTENA_REG = 0x00070F0FU;
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260 /* Enable the compare 0 interrupt. */
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261 portRTI_SETINTENA_REG = 0x00000001U;
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262 portRTI_GCTRL_REG |= 0x00000001U;
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264 /*-----------------------------------------------------------*/
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267 * See header file for description.
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269 BaseType_t xPortStartScheduler(void)
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271 /* Start the timer that generates the tick ISR. */
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272 prvSetupTimerInterrupt();
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274 /* Reset the critical section nesting count read to execute the first task. */
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275 ulCriticalNesting = 0;
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277 /* Start the first task. This is done from portASM.asm as ARM mode must be
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279 vPortStartFirstTask();
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281 /* Should not get here! */
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284 /*-----------------------------------------------------------*/
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287 * See header file for description.
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289 void vPortEndScheduler(void)
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291 /* Not implemented in ports where there is nothing to return to.
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292 Artificially force an assert. */
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293 configASSERT( ulCriticalNesting == 1000UL );
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295 /*-----------------------------------------------------------*/
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297 #if configUSE_PREEMPTION == 0
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299 /* The cooperative scheduler requires a normal IRQ service routine to
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300 * simply increment the system tick. */
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301 __interrupt void vPortNonPreemptiveTick( void )
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303 /* clear clock interrupt flag */
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304 portRTI_INTFLAG_REG = 0x00000001;
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306 /* Increment the tick count - this may make a delaying task ready
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307 to run - but a context switch is not performed. */
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308 xTaskIncrementTick();
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314 **************************************************************************
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315 * The preemptive scheduler ISR is written in assembler and can be found
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316 * in the portASM.asm file. This will only get used if portUSE_PREEMPTION
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317 * is set to 1 in portmacro.h
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318 **************************************************************************
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320 void vPortPreemptiveTick( void );
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323 /*-----------------------------------------------------------*/
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327 * Disable interrupts, and keep a count of the nesting depth.
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329 void vPortEnterCritical( void )
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331 /* Disable interrupts as per portDISABLE_INTERRUPTS(); */
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332 portDISABLE_INTERRUPTS();
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334 /* Now interrupts are disabled ulCriticalNesting can be accessed
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335 directly. Increment ulCriticalNesting to keep a count of how many times
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336 portENTER_CRITICAL() has been called. */
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337 ulCriticalNesting++;
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339 /*-----------------------------------------------------------*/
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342 * Decrement the critical nesting count, and if it has reached zero, re-enable
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345 void vPortExitCritical( void )
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347 if( ulCriticalNesting > 0 )
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349 /* Decrement the nesting count as we are leaving a critical section. */
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350 ulCriticalNesting--;
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352 /* If the nesting level has reached zero then interrupts should be
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354 if( ulCriticalNesting == 0 )
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356 /* Enable interrupts as per portENABLE_INTERRUPTS(). */
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357 portENABLE_INTERRUPTS();
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361 /*-----------------------------------------------------------*/
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363 #if __TI_VFP_SUPPORT__
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365 void vPortTaskUsesFPU( void )
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367 extern void vPortInitialiseFPSCR( void );
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369 /* A task is registering the fact that it needs an FPU context. Set the
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370 FPU flag (saved as part of the task context. */
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371 ulTaskHasFPUContext = pdTRUE;
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373 /* Initialise the floating point status register. */
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374 vPortInitialiseFPSCR();
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377 #endif /* __TI_VFP_SUPPORT__ */
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379 /*-----------------------------------------------------------*/
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