2 FreeRTOS V7.4.2 - Copyright (C) 2013 Real Time Engineers Ltd.
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4 FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
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5 http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 ***************************************************************************
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9 * FreeRTOS tutorial books are available in pdf and paperback. *
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10 * Complete, revised, and edited pdf reference manuals are also *
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13 * Purchasing FreeRTOS documentation will not only help you, by *
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14 * ensuring you get running as quickly as possible and with an *
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15 * in-depth knowledge of how to use FreeRTOS, it will also help *
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16 * the FreeRTOS project to continue with its mission of providing *
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17 * professional grade, cross platform, de facto standard solutions *
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18 * for microcontrollers - completely free of charge! *
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20 * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
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22 * Thank you for using FreeRTOS, and thank you for your support! *
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24 ***************************************************************************
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27 This file is part of the FreeRTOS distribution.
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29 FreeRTOS is free software; you can redistribute it and/or modify it under
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30 the terms of the GNU General Public License (version 2) as published by the
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31 Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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33 >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to
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34 distribute a combined work that includes FreeRTOS without being obliged to
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35 provide the source code for proprietary components outside of the FreeRTOS
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38 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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39 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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40 FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
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41 details. You should have received a copy of the GNU General Public License
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42 and the FreeRTOS license exception along with FreeRTOS; if not it can be
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43 viewed here: http://www.freertos.org/a00114.html and also obtained by
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44 writing to Real Time Engineers Ltd., contact details for whom are available
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45 on the FreeRTOS WEB site.
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49 ***************************************************************************
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51 * Having a problem? Start by reading the FAQ "My application does *
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52 * not run, what could be wrong?" *
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54 * http://www.FreeRTOS.org/FAQHelp.html *
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56 ***************************************************************************
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59 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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60 license and Real Time Engineers Ltd. contact details.
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62 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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63 including FreeRTOS+Trace - an indispensable productivity tool, and our new
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64 fully thread aware and reentrant UDP/IP stack.
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66 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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67 Integrity Systems, who sell the code with commercial support,
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68 indemnification and middleware, under the OpenRTOS brand.
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70 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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71 engineered and independently SIL3 certified version for use in safety and
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72 mission critical applications that require provable dependability.
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76 /*-----------------------------------------------------------
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77 * Implementation of functions defined in portable.h for the Atmel AT91R40008
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80 * Components that can be compiled to either ARM or THUMB mode are
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81 * contained in this file. The ISR routines, which can only be compiled
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82 * to ARM mode are contained in portISR.c.
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83 *----------------------------------------------------------*/
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85 /* Standard includes. */
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88 /* Scheduler includes. */
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89 #include "FreeRTOS.h"
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92 /* Hardware specific definitions. */
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93 #include "AT91R40008.h"
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98 /* Constants required to setup the task context. */
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99 #define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
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100 #define portTHUMB_MODE_BIT ( ( portSTACK_TYPE ) 0x20 )
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101 #define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 )
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102 #define portNO_CRITICAL_SECTION_NESTING ( ( portSTACK_TYPE ) 0 )
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103 #define portTICK_PRIORITY_6 ( 6 )
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104 /*-----------------------------------------------------------*/
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106 /* Setup the timer to generate the tick interrupts. */
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107 static void prvSetupTimerInterrupt( void );
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110 * The scheduler can only be started from ARM mode, so
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111 * vPortISRStartFirstSTask() is defined in portISR.c.
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113 extern void vPortISRStartFirstTask( void );
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115 /*-----------------------------------------------------------*/
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118 * Initialise the stack of a task to look exactly as if a call to
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119 * portSAVE_CONTEXT had been called.
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121 * See header file for description.
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123 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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125 portSTACK_TYPE *pxOriginalTOS;
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127 pxOriginalTOS = pxTopOfStack;
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129 /* To ensure asserts in tasks.c don't fail, although in this case the assert
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130 is not really required. */
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133 /* Setup the initial stack of the task. The stack is set exactly as
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134 expected by the portRESTORE_CONTEXT() macro. */
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136 /* First on the stack is the return address - which in this case is the
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137 start of the task. The offset is added to make the return address appear
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138 as it would within an IRQ ISR. */
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139 *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE;
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142 *pxTopOfStack = ( portSTACK_TYPE ) 0xaaaaaaaa; /* R14 */
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144 *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
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146 *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */
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148 *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */
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150 *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */
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152 *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */
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154 *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */
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156 *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */
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158 *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */
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160 *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */
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162 *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */
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164 *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */
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166 *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */
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168 *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */
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171 /* When the task starts is will expect to find the function parameter in
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173 *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
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176 /* The last thing onto the stack is the status register, which is set for
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177 system mode, with interrupts enabled. */
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178 *pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;
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180 #ifdef THUMB_INTERWORK
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182 /* We want the task to start in thumb mode. */
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183 *pxTopOfStack |= portTHUMB_MODE_BIT;
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189 /* Some optimisation levels use the stack differently to others. This
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190 means the interrupt flags cannot always be stored on the stack and will
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191 instead be stored in a variable, which is then saved as part of the
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193 *pxTopOfStack = portNO_CRITICAL_SECTION_NESTING;
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195 return pxTopOfStack;
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197 /*-----------------------------------------------------------*/
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199 portBASE_TYPE xPortStartScheduler( void )
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201 /* Start the timer that generates the tick ISR. Interrupts are disabled
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203 prvSetupTimerInterrupt();
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205 /* Start the first task. */
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206 vPortISRStartFirstTask();
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208 /* Should not get here! */
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211 /*-----------------------------------------------------------*/
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213 void vPortEndScheduler( void )
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215 /* It is unlikely that the ARM port will require this function as there
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216 is nothing to return to. */
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218 /*-----------------------------------------------------------*/
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221 * Setup the tick timer to generate the tick interrupts at the required frequency.
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223 static void prvSetupTimerInterrupt( void )
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225 volatile unsigned long ulDummy;
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227 /* Enable clock to the tick timer... */
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228 AT91C_BASE_PS->PS_PCER = portTIMER_CLK_ENABLE_BIT;
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230 /* Stop the tick timer... */
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231 portTIMER_REG_BASE_PTR->TC_CCR = TC_CLKDIS;
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233 /* Start with tick timer interrupts disabled... */
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234 portTIMER_REG_BASE_PTR->TC_IDR = 0xFFFFFFFF;
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236 /* Clear any pending tick timer interrupts... */
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237 ulDummy = portTIMER_REG_BASE_PTR->TC_SR;
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239 /* Store interrupt handler function address in tick timer vector register...
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240 The ISR installed depends on whether the preemptive or cooperative
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241 scheduler is being used. */
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242 #if configUSE_PREEMPTION == 1
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244 extern void ( vPreemptiveTick )( void );
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245 AT91C_BASE_AIC->AIC_SVR[portTIMER_AIC_CHANNEL] = ( unsigned long ) vPreemptiveTick;
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247 #else // else use cooperative scheduler
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249 extern void ( vNonPreemptiveTick )( void );
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250 AT91C_BASE_AIC->AIC_SVR[portTIMER_AIC_CHANNEL] = ( unsigned long ) vNonPreemptiveTick;
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254 /* Tick timer interrupt level-sensitive, priority 6... */
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255 AT91C_BASE_AIC->AIC_SMR[ portTIMER_AIC_CHANNEL ] = AIC_SRCTYPE_INT_LEVEL_SENSITIVE | portTICK_PRIORITY_6;
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257 /* Enable the tick timer interrupt...
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259 First at timer level */
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260 portTIMER_REG_BASE_PTR->TC_IER = TC_CPCS;
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262 /* Then at the AIC level. */
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263 AT91C_BASE_AIC->AIC_IECR = (1 << portTIMER_AIC_CHANNEL);
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265 /* Calculate timer compare value to achieve the desired tick rate... */
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266 if( (configCPU_CLOCK_HZ / (configTICK_RATE_HZ * 2) ) <= 0xFFFF )
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268 /* The tick rate is fast enough for us to use the faster timer input
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269 clock (main clock / 2). */
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270 portTIMER_REG_BASE_PTR->TC_CMR = TC_WAVE | TC_CLKS_MCK2 | TC_BURST_NONE | TC_CPCTRG;
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271 portTIMER_REG_BASE_PTR->TC_RC = configCPU_CLOCK_HZ / (configTICK_RATE_HZ * 2);
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275 /* We must use a slower timer input clock (main clock / 8) because the
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276 tick rate is too slow for the faster input clock. */
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277 portTIMER_REG_BASE_PTR->TC_CMR = TC_WAVE | TC_CLKS_MCK8 | TC_BURST_NONE | TC_CPCTRG;
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278 portTIMER_REG_BASE_PTR->TC_RC = configCPU_CLOCK_HZ / (configTICK_RATE_HZ * 8);
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281 /* Start tick timer... */
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282 portTIMER_REG_BASE_PTR->TC_CCR = TC_SWTRG | TC_CLKEN;
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284 /*-----------------------------------------------------------*/
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