2 FreeRTOS V7.3.0 - Copyright (C) 2012 Real Time Engineers Ltd.
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4 FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
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5 http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 ***************************************************************************
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9 * FreeRTOS tutorial books are available in pdf and paperback. *
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10 * Complete, revised, and edited pdf reference manuals are also *
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13 * Purchasing FreeRTOS documentation will not only help you, by *
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14 * ensuring you get running as quickly as possible and with an *
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15 * in-depth knowledge of how to use FreeRTOS, it will also help *
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16 * the FreeRTOS project to continue with its mission of providing *
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17 * professional grade, cross platform, de facto standard solutions *
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18 * for microcontrollers - completely free of charge! *
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20 * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
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22 * Thank you for using FreeRTOS, and thank you for your support! *
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24 ***************************************************************************
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27 This file is part of the FreeRTOS distribution.
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29 FreeRTOS is free software; you can redistribute it and/or modify it under
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30 the terms of the GNU General Public License (version 2) as published by the
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31 Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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32 >>>NOTE<<< The modification to the GPL is included to allow you to
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33 distribute a combined work that includes FreeRTOS without being obliged to
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34 provide the source code for proprietary components outside of the FreeRTOS
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35 kernel. FreeRTOS is distributed in the hope that it will be useful, but
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36 WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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37 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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38 more details. You should have received a copy of the GNU General Public
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39 License and the FreeRTOS license exception along with FreeRTOS; if not it
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40 can be viewed here: http://www.freertos.org/a00114.html and also obtained
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41 by writing to Richard Barry, contact details for whom are available on the
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46 ***************************************************************************
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48 * Having a problem? Start by reading the FAQ "My application does *
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49 * not run, what could be wrong?" *
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51 * http://www.FreeRTOS.org/FAQHelp.html *
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53 ***************************************************************************
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56 http://www.FreeRTOS.org - Documentation, training, latest versions, license
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57 and contact details.
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59 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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60 including FreeRTOS+Trace - an indispensable productivity tool.
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62 Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell
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63 the code with commercial support, indemnification, and middleware, under
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64 the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also
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65 provide a safety engineered and independently SIL3 certified version under
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66 the SafeRTOS brand: http://www.SafeRTOS.com.
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70 /*-----------------------------------------------------------
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71 * Implementation of functions defined in portable.h for the Atmel AT91R40008
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74 * Components that can be compiled to either ARM or THUMB mode are
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75 * contained in this file. The ISR routines, which can only be compiled
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76 * to ARM mode are contained in portISR.c.
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77 *----------------------------------------------------------*/
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79 /* Standard includes. */
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82 /* Scheduler includes. */
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83 #include "FreeRTOS.h"
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86 /* Hardware specific definitions. */
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87 #include "AT91R40008.h"
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92 /* Constants required to setup the task context. */
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93 #define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
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94 #define portTHUMB_MODE_BIT ( ( portSTACK_TYPE ) 0x20 )
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95 #define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 )
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96 #define portNO_CRITICAL_SECTION_NESTING ( ( portSTACK_TYPE ) 0 )
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97 #define portTICK_PRIORITY_6 ( 6 )
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98 /*-----------------------------------------------------------*/
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100 /* Setup the timer to generate the tick interrupts. */
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101 static void prvSetupTimerInterrupt( void );
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104 * The scheduler can only be started from ARM mode, so
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105 * vPortISRStartFirstSTask() is defined in portISR.c.
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107 extern void vPortISRStartFirstTask( void );
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109 /*-----------------------------------------------------------*/
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112 * Initialise the stack of a task to look exactly as if a call to
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113 * portSAVE_CONTEXT had been called.
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115 * See header file for description.
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117 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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119 portSTACK_TYPE *pxOriginalTOS;
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121 pxOriginalTOS = pxTopOfStack;
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123 /* To ensure asserts in tasks.c don't fail, although in this case the assert
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124 is not really required. */
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127 /* Setup the initial stack of the task. The stack is set exactly as
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128 expected by the portRESTORE_CONTEXT() macro. */
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130 /* First on the stack is the return address - which in this case is the
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131 start of the task. The offset is added to make the return address appear
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132 as it would within an IRQ ISR. */
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133 *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE;
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136 *pxTopOfStack = ( portSTACK_TYPE ) 0xaaaaaaaa; /* R14 */
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138 *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
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140 *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */
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142 *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */
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144 *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */
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146 *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */
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148 *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */
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150 *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */
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152 *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */
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154 *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */
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156 *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */
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158 *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */
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160 *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */
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162 *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */
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165 /* When the task starts is will expect to find the function parameter in
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167 *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
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170 /* The last thing onto the stack is the status register, which is set for
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171 system mode, with interrupts enabled. */
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172 *pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;
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174 #ifdef THUMB_INTERWORK
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176 /* We want the task to start in thumb mode. */
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177 *pxTopOfStack |= portTHUMB_MODE_BIT;
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183 /* Some optimisation levels use the stack differently to others. This
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184 means the interrupt flags cannot always be stored on the stack and will
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185 instead be stored in a variable, which is then saved as part of the
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187 *pxTopOfStack = portNO_CRITICAL_SECTION_NESTING;
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189 return pxTopOfStack;
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191 /*-----------------------------------------------------------*/
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193 portBASE_TYPE xPortStartScheduler( void )
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195 /* Start the timer that generates the tick ISR. Interrupts are disabled
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197 prvSetupTimerInterrupt();
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199 /* Start the first task. */
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200 vPortISRStartFirstTask();
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202 /* Should not get here! */
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205 /*-----------------------------------------------------------*/
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207 void vPortEndScheduler( void )
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209 /* It is unlikely that the ARM port will require this function as there
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210 is nothing to return to. */
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212 /*-----------------------------------------------------------*/
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215 * Setup the tick timer to generate the tick interrupts at the required frequency.
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217 static void prvSetupTimerInterrupt( void )
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219 volatile unsigned long ulDummy;
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221 /* Enable clock to the tick timer... */
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222 AT91C_BASE_PS->PS_PCER = portTIMER_CLK_ENABLE_BIT;
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224 /* Stop the tick timer... */
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225 portTIMER_REG_BASE_PTR->TC_CCR = TC_CLKDIS;
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227 /* Start with tick timer interrupts disabled... */
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228 portTIMER_REG_BASE_PTR->TC_IDR = 0xFFFFFFFF;
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230 /* Clear any pending tick timer interrupts... */
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231 ulDummy = portTIMER_REG_BASE_PTR->TC_SR;
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233 /* Store interrupt handler function address in tick timer vector register...
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234 The ISR installed depends on whether the preemptive or cooperative
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235 scheduler is being used. */
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236 #if configUSE_PREEMPTION == 1
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238 extern void ( vPreemptiveTick )( void );
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239 AT91C_BASE_AIC->AIC_SVR[portTIMER_AIC_CHANNEL] = ( unsigned long ) vPreemptiveTick;
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241 #else // else use cooperative scheduler
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243 extern void ( vNonPreemptiveTick )( void );
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244 AT91C_BASE_AIC->AIC_SVR[portTIMER_AIC_CHANNEL] = ( unsigned long ) vNonPreemptiveTick;
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248 /* Tick timer interrupt level-sensitive, priority 6... */
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249 AT91C_BASE_AIC->AIC_SMR[ portTIMER_AIC_CHANNEL ] = AIC_SRCTYPE_INT_LEVEL_SENSITIVE | portTICK_PRIORITY_6;
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251 /* Enable the tick timer interrupt...
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253 First at timer level */
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254 portTIMER_REG_BASE_PTR->TC_IER = TC_CPCS;
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256 /* Then at the AIC level. */
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257 AT91C_BASE_AIC->AIC_IECR = (1 << portTIMER_AIC_CHANNEL);
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259 /* Calculate timer compare value to achieve the desired tick rate... */
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260 if( (configCPU_CLOCK_HZ / (configTICK_RATE_HZ * 2) ) <= 0xFFFF )
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262 /* The tick rate is fast enough for us to use the faster timer input
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263 clock (main clock / 2). */
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264 portTIMER_REG_BASE_PTR->TC_CMR = TC_WAVE | TC_CLKS_MCK2 | TC_BURST_NONE | TC_CPCTRG;
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265 portTIMER_REG_BASE_PTR->TC_RC = configCPU_CLOCK_HZ / (configTICK_RATE_HZ * 2);
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269 /* We must use a slower timer input clock (main clock / 8) because the
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270 tick rate is too slow for the faster input clock. */
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271 portTIMER_REG_BASE_PTR->TC_CMR = TC_WAVE | TC_CLKS_MCK8 | TC_BURST_NONE | TC_CPCTRG;
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272 portTIMER_REG_BASE_PTR->TC_RC = configCPU_CLOCK_HZ / (configTICK_RATE_HZ * 8);
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275 /* Start tick timer... */
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276 portTIMER_REG_BASE_PTR->TC_CCR = TC_SWTRG | TC_CLKEN;
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278 /*-----------------------------------------------------------*/
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