2 FreeRTOS V7.5.0 - Copyright (C) 2013 Real Time Engineers Ltd.
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4 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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6 ***************************************************************************
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8 * FreeRTOS provides completely free yet professionally developed, *
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9 * robust, strictly quality controlled, supported, and cross *
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10 * platform software that has become a de facto standard. *
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12 * Help yourself get started quickly and support the FreeRTOS *
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13 * project by purchasing a FreeRTOS tutorial book, reference *
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14 * manual, or both from: http://www.FreeRTOS.org/Documentation *
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18 ***************************************************************************
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20 This file is part of the FreeRTOS distribution.
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22 FreeRTOS is free software; you can redistribute it and/or modify it under
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23 the terms of the GNU General Public License (version 2) as published by the
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24 Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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26 >>! NOTE: The modification to the GPL is included to allow you to distribute
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27 >>! a combined work that includes FreeRTOS without being obliged to provide
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28 >>! the source code for proprietary components outside of the FreeRTOS
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31 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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32 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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33 FOR A PARTICULAR PURPOSE. Full license text is available from the following
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34 link: http://www.freertos.org/a00114.html
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38 ***************************************************************************
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40 * Having a problem? Start by reading the FAQ "My application does *
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41 * not run, what could be wrong?" *
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43 * http://www.FreeRTOS.org/FAQHelp.html *
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45 ***************************************************************************
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47 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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48 license and Real Time Engineers Ltd. contact details.
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50 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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51 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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52 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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54 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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55 Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
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56 licenses offer ticketed support, indemnification and middleware.
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58 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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59 engineered and independently SIL3 certified version for use in safety and
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60 mission critical applications that require provable dependability.
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66 /*-----------------------------------------------------------
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67 * Implementation of functions defined in portable.h for the ARM7 port.
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69 * Components that can be compiled to either ARM or THUMB mode are
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70 * contained in this file. The ISR routines, which can only be compiled
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71 * to ARM mode are contained in portISR.c.
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72 *----------------------------------------------------------*/
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74 /* Standard includes. */
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77 /* Scheduler includes. */
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78 #include "FreeRTOS.h"
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81 /* Processor constants. */
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82 #include "AT91SAM7X256.h"
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84 /* Constants required to setup the task context. */
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85 #define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
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86 #define portTHUMB_MODE_BIT ( ( portSTACK_TYPE ) 0x20 )
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87 #define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 )
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88 #define portNO_CRITICAL_SECTION_NESTING ( ( portSTACK_TYPE ) 0 )
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90 /* Constants required to setup the tick ISR. */
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91 #define portENABLE_TIMER ( ( unsigned char ) 0x01 )
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92 #define portPRESCALE_VALUE 0x00
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93 #define portINTERRUPT_ON_MATCH ( ( unsigned long ) 0x01 )
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94 #define portRESET_COUNT_ON_MATCH ( ( unsigned long ) 0x02 )
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96 /* Constants required to setup the PIT. */
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97 #define portPIT_CLOCK_DIVISOR ( ( unsigned long ) 16 )
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98 #define portPIT_COUNTER_VALUE ( ( ( configCPU_CLOCK_HZ / portPIT_CLOCK_DIVISOR ) / 1000UL ) * portTICK_RATE_MS )
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100 #define portINT_LEVEL_SENSITIVE 0
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101 #define portPIT_ENABLE ( ( unsigned short ) 0x1 << 24 )
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102 #define portPIT_INT_ENABLE ( ( unsigned short ) 0x1 << 25 )
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103 /*-----------------------------------------------------------*/
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105 /* Setup the timer to generate the tick interrupts. */
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106 static void prvSetupTimerInterrupt( void );
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109 * The scheduler can only be started from ARM mode, so
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110 * vPortISRStartFirstSTask() is defined in portISR.c.
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112 extern void vPortISRStartFirstTask( void );
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114 /*-----------------------------------------------------------*/
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117 * Initialise the stack of a task to look exactly as if a call to
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118 * portSAVE_CONTEXT had been called.
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120 * See header file for description.
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122 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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124 portSTACK_TYPE *pxOriginalTOS;
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126 pxOriginalTOS = pxTopOfStack;
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128 /* To ensure asserts in tasks.c don't fail, although in this case the assert
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129 is not really required. */
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132 /* Setup the initial stack of the task. The stack is set exactly as
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133 expected by the portRESTORE_CONTEXT() macro. */
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135 /* First on the stack is the return address - which in this case is the
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136 start of the task. The offset is added to make the return address appear
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137 as it would within an IRQ ISR. */
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138 *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE;
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141 *pxTopOfStack = ( portSTACK_TYPE ) 0x00000000; /* R14 */
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143 *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
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145 *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */
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147 *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */
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149 *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */
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151 *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */
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153 *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */
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155 *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */
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157 *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */
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159 *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */
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161 *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */
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163 *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */
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165 *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */
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167 *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */
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170 /* When the task starts is will expect to find the function parameter in
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172 *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
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175 /* The last thing onto the stack is the status register, which is set for
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176 system mode, with interrupts enabled. */
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177 *pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;
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179 #ifdef THUMB_INTERWORK
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181 /* We want the task to start in thumb mode. */
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182 *pxTopOfStack |= portTHUMB_MODE_BIT;
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188 /* Some optimisation levels use the stack differently to others. This
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189 means the interrupt flags cannot always be stored on the stack and will
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190 instead be stored in a variable, which is then saved as part of the
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192 *pxTopOfStack = portNO_CRITICAL_SECTION_NESTING;
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194 return pxTopOfStack;
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196 /*-----------------------------------------------------------*/
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198 portBASE_TYPE xPortStartScheduler( void )
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200 /* Start the timer that generates the tick ISR. Interrupts are disabled
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202 prvSetupTimerInterrupt();
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204 /* Start the first task. */
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205 vPortISRStartFirstTask();
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207 /* Should not get here! */
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210 /*-----------------------------------------------------------*/
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212 void vPortEndScheduler( void )
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214 /* It is unlikely that the ARM port will require this function as there
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215 is nothing to return to. */
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217 /*-----------------------------------------------------------*/
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220 * Setup the timer 0 to generate the tick interrupts at the required frequency.
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222 static void prvSetupTimerInterrupt( void )
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224 AT91PS_PITC pxPIT = AT91C_BASE_PITC;
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226 /* Setup the AIC for PIT interrupts. The interrupt routine chosen depends
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227 on whether the preemptive or cooperative scheduler is being used. */
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228 #if configUSE_PREEMPTION == 0
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230 extern void ( vNonPreemptiveTick ) ( void );
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231 AT91F_AIC_ConfigureIt( AT91C_ID_SYS, AT91C_AIC_PRIOR_HIGHEST, portINT_LEVEL_SENSITIVE, ( void (*)(void) ) vNonPreemptiveTick );
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235 extern void ( vPreemptiveTick )( void );
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236 AT91F_AIC_ConfigureIt( AT91C_ID_SYS, AT91C_AIC_PRIOR_HIGHEST, portINT_LEVEL_SENSITIVE, ( void (*)(void) ) vPreemptiveTick );
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240 /* Configure the PIT period. */
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241 pxPIT->PITC_PIMR = portPIT_ENABLE | portPIT_INT_ENABLE | portPIT_COUNTER_VALUE;
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243 /* Enable the interrupt. Global interrupts are disables at this point so
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245 AT91C_BASE_AIC->AIC_IECR = 0x1 << AT91C_ID_SYS;
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247 /*-----------------------------------------------------------*/
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