2 FreeRTOS V8.2.0 - Copyright (C) 2015 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 This file is part of the FreeRTOS distribution.
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9 FreeRTOS is free software; you can redistribute it and/or modify it under
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10 the terms of the GNU General Public License (version 2) as published by the
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11 Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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13 ***************************************************************************
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14 >>! NOTE: The modification to the GPL is included to allow you to !<<
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15 >>! distribute a combined work that includes FreeRTOS without being !<<
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16 >>! obliged to provide the source code for proprietary components !<<
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17 >>! outside of the FreeRTOS kernel. !<<
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18 ***************************************************************************
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20 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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21 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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22 FOR A PARTICULAR PURPOSE. Full license text is available on the following
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23 link: http://www.freertos.org/a00114.html
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25 ***************************************************************************
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27 * FreeRTOS provides completely free yet professionally developed, *
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28 * robust, strictly quality controlled, supported, and cross *
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29 * platform software that is more than just the market leader, it *
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30 * is the industry's de facto standard. *
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32 * Help yourself get started quickly while simultaneously helping *
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33 * to support the FreeRTOS project by purchasing a FreeRTOS *
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34 * tutorial book, reference manual, or both: *
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35 * http://www.FreeRTOS.org/Documentation *
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37 ***************************************************************************
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39 http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
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40 the FAQ page "My application does not run, what could be wrong?". Have you
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41 defined configASSERT()?
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43 http://www.FreeRTOS.org/support - In return for receiving this top quality
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44 embedded software for free we request you assist our global community by
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45 participating in the support forum.
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47 http://www.FreeRTOS.org/training - Investing in training allows your team to
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48 be as productive as possible as early as possible. Now you can receive
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49 FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
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50 Ltd, and the world's leading authority on the world's leading RTOS.
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52 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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53 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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54 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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56 http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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57 Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
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59 http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
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60 Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
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61 licenses offer ticketed support, indemnification and commercial middleware.
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63 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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64 engineered and independently SIL3 certified version for use in safety and
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65 mission critical applications that require provable dependability.
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71 /*-----------------------------------------------------------
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72 * Implementation of functions defined in portable.h for the ARM7 port.
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74 * Components that can be compiled to either ARM or THUMB mode are
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75 * contained in this file. The ISR routines, which can only be compiled
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76 * to ARM mode are contained in portISR.c.
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77 *----------------------------------------------------------*/
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80 /* Standard includes. */
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83 /* Scheduler includes. */
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84 #include "FreeRTOS.h"
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87 /* Constants required to setup the task context. */
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88 #define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
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89 #define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
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90 #define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )
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91 #define portNO_CRITICAL_SECTION_NESTING ( ( StackType_t ) 0 )
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93 /* Constants required to setup the tick ISR. */
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94 #define portENABLE_TIMER ( ( uint8_t ) 0x01 )
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95 #define portPRESCALE_VALUE 0x00
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96 #define portINTERRUPT_ON_MATCH ( ( uint32_t ) 0x01 )
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97 #define portRESET_COUNT_ON_MATCH ( ( uint32_t ) 0x02 )
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99 /* Constants required to setup the VIC for the tick ISR. */
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100 #define portTIMER_VIC_CHANNEL ( ( uint32_t ) 0x0004 )
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101 #define portTIMER_VIC_CHANNEL_BIT ( ( uint32_t ) 0x0010 )
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102 #define portTIMER_VIC_ENABLE ( ( uint32_t ) 0x0020 )
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104 /*-----------------------------------------------------------*/
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106 /* Setup the timer to generate the tick interrupts. */
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107 static void prvSetupTimerInterrupt( void );
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110 * The scheduler can only be started from ARM mode, so
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111 * vPortISRStartFirstSTask() is defined in portISR.c.
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113 extern void vPortISRStartFirstTask( void );
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115 /*-----------------------------------------------------------*/
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118 * Initialise the stack of a task to look exactly as if a call to
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119 * portSAVE_CONTEXT had been called.
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121 * See header file for description.
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123 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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125 StackType_t *pxOriginalTOS;
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127 pxOriginalTOS = pxTopOfStack;
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129 /* To ensure asserts in tasks.c don't fail, although in this case the assert
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130 is not really required. */
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133 /* Setup the initial stack of the task. The stack is set exactly as
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134 expected by the portRESTORE_CONTEXT() macro. */
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136 /* First on the stack is the return address - which in this case is the
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137 start of the task. The offset is added to make the return address appear
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138 as it would within an IRQ ISR. */
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139 *pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
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142 *pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */
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144 *pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
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146 *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
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148 *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
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150 *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
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152 *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
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154 *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
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156 *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
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158 *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
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160 *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
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162 *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
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164 *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
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166 *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
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168 *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
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171 /* When the task starts is will expect to find the function parameter in
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173 *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
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176 /* The last thing onto the stack is the status register, which is set for
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177 system mode, with interrupts enabled. */
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178 *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
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180 if( ( ( uint32_t ) pxCode & 0x01UL ) != 0x00 )
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182 /* We want the task to start in thumb mode. */
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183 *pxTopOfStack |= portTHUMB_MODE_BIT;
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188 /* Some optimisation levels use the stack differently to others. This
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189 means the interrupt flags cannot always be stored on the stack and will
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190 instead be stored in a variable, which is then saved as part of the
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192 *pxTopOfStack = portNO_CRITICAL_SECTION_NESTING;
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194 return pxTopOfStack;
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196 /*-----------------------------------------------------------*/
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198 BaseType_t xPortStartScheduler( void )
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200 /* Start the timer that generates the tick ISR. Interrupts are disabled
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202 prvSetupTimerInterrupt();
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204 /* Start the first task. */
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205 vPortISRStartFirstTask();
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207 /* Should not get here! */
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210 /*-----------------------------------------------------------*/
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212 void vPortEndScheduler( void )
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214 /* It is unlikely that the ARM port will require this function as there
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215 is nothing to return to. */
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217 /*-----------------------------------------------------------*/
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220 * Setup the timer 0 to generate the tick interrupts at the required frequency.
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222 static void prvSetupTimerInterrupt( void )
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224 uint32_t ulCompareMatch;
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225 extern void ( vTickISR )( void );
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227 /* A 1ms tick does not require the use of the timer prescale. This is
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228 defaulted to zero but can be used if necessary. */
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229 T0_PR = portPRESCALE_VALUE;
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231 /* Calculate the match value required for our wanted tick rate. */
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232 ulCompareMatch = configCPU_CLOCK_HZ / configTICK_RATE_HZ;
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234 /* Protect against divide by zero. Using an if() statement still results
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235 in a warning - hence the #if. */
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236 #if portPRESCALE_VALUE != 0
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238 ulCompareMatch /= ( portPRESCALE_VALUE + 1 );
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241 T0_MR0 = ulCompareMatch;
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243 /* Generate tick with timer 0 compare match. */
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244 T0_MCR = portRESET_COUNT_ON_MATCH | portINTERRUPT_ON_MATCH;
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246 /* Setup the VIC for the timer. */
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247 VICIntSelect &= ~( portTIMER_VIC_CHANNEL_BIT );
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248 VICIntEnable |= portTIMER_VIC_CHANNEL_BIT;
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250 /* The ISR installed depends on whether the preemptive or cooperative
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251 scheduler is being used. */
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253 VICVectAddr0 = ( int32_t ) vTickISR;
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254 VICVectCntl0 = portTIMER_VIC_CHANNEL | portTIMER_VIC_ENABLE;
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256 /* Start the timer - interrupts are disabled when this function is called
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257 so it is okay to do this here. */
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258 T0_TCR = portENABLE_TIMER;
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260 /*-----------------------------------------------------------*/
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