git.sur5r.net Git - freertos/blob - FreeRTOS/Source/portable/GCC/ARM7_LPC2000/portmacro.h

   1 /*\r
   2     FreeRTOS V8.0.0:rc1 - Copyright (C) 2014 Real Time Engineers Ltd.\r
   3     All rights reserved\r
   4 \r
   5     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
   6 \r
   7     ***************************************************************************\r
   8      *                                                                       *\r
   9      *    FreeRTOS provides completely free yet professionally developed,    *\r
  10      *    robust, strictly quality controlled, supported, and cross          *\r
  11      *    platform software that has become a de facto standard.             *\r
  12      *                                                                       *\r
  13      *    Help yourself get started quickly and support the FreeRTOS         *\r
  14      *    project by purchasing a FreeRTOS tutorial book, reference          *\r
  15      *    manual, or both from: http://www.FreeRTOS.org/Documentation        *\r
  16      *                                                                       *\r
  17      *    Thank you!                                                         *\r
  18      *                                                                       *\r
  19     ***************************************************************************\r
  20 \r
  21     This file is part of the FreeRTOS distribution.\r
  22 \r
  23     FreeRTOS is free software; you can redistribute it and/or modify it under\r
  24     the terms of the GNU General Public License (version 2) as published by the\r
  25     Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
  26 \r
  27     >>! NOTE: The modification to the GPL is included to allow you to distribute\r
  28     >>! a combined work that includes FreeRTOS without being obliged to provide\r
  29     >>! the source code for proprietary components outside of the FreeRTOS\r
  30     >>! kernel.\r
  31 \r
  32     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
  33     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
  34     FOR A PARTICULAR PURPOSE.  Full license text is available from the following\r
  35     link: http://www.freertos.org/a00114.html\r
  36 \r
  37     1 tab == 4 spaces!\r
  38 \r
  39     ***************************************************************************\r
  40      *                                                                       *\r
  41      *    Having a problem?  Start by reading the FAQ "My application does   *\r
  42      *    not run, what could be wrong?"                                     *\r
  43      *                                                                       *\r
  44      *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
  45      *                                                                       *\r
  46     ***************************************************************************\r
  47 \r
  48     http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
  49     license and Real Time Engineers Ltd. contact details.\r
  50 \r
  51     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
  52     including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
  53     compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
  54 \r
  55     http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
  56     Integrity Systems to sell under the OpenRTOS brand.  Low cost OpenRTOS\r
  57     licenses offer ticketed support, indemnification and middleware.\r
  58 \r
  59     http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
  60     engineered and independently SIL3 certified version for use in safety and\r
  61     mission critical applications that require provable dependability.\r
  62 \r
  63     1 tab == 4 spaces!\r
  64 */\r
  65 \r
  66 #ifndef PORTMACRO_H\r
  67 #define PORTMACRO_H\r
  68 \r
  69 #ifdef __cplusplus\r
  70 extern "C" {\r
  71 #endif\r
  72 \r
  73 /*-----------------------------------------------------------\r
  74  * Port specific definitions.\r
  75  *\r
  76  * The settings in this file configure FreeRTOS correctly for the\r
  77  * given hardware and compiler.\r
  78  *\r
  79  * These settings should not be altered.\r
  80  *-----------------------------------------------------------\r
  81  */\r
  82 \r
  83 /* Type definitions. */\r
  84 #define portCHAR                char\r
  85 #define portFLOAT               float\r
  86 #define portDOUBLE              double\r
  87 #define portLONG                long\r
  88 #define portSHORT               short\r
  89 #define portSTACK_TYPE  uint32_t\r
  90 #define portBASE_TYPE   portLONG\r
  91 \r
  92 typedef portSTACK_TYPE StackType_t;\r
  93 typedef long BaseType_t;\r
  94 typedef unsigned long UBaseType_t;\r
  95 \r
  96 #if( configUSE_16_BIT_TICKS == 1 )\r
  97         typedef uint16_t TickType_t;\r
  98         #define portMAX_DELAY ( TickType_t ) 0xffff\r
  99 #else\r
 100         typedef uint32_t TickType_t;\r
 101         #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
 102 #endif\r
 103 /*-----------------------------------------------------------*/\r
 104 \r
 105 /* Architecture specifics. */\r
 106 #define portSTACK_GROWTH                        ( -1 )\r
 107 #define portTICK_PERIOD_MS                      ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
 108 #define portBYTE_ALIGNMENT                      8\r
 109 #define portNOP()                                       __asm volatile ( "NOP" );\r
 110 /*-----------------------------------------------------------*/\r
 111 \r
 112 \r
 113 /* Scheduler utilities. */\r
 114 \r
 115 /*\r
 116  * portRESTORE_CONTEXT, portRESTORE_CONTEXT, portENTER_SWITCHING_ISR\r
 117  * and portEXIT_SWITCHING_ISR can only be called from ARM mode, but\r
 118  * are included here for efficiency.  An attempt to call one from\r
 119  * THUMB mode code will result in a compile time error.\r
 120  */\r
 121 \r
 122 #define portRESTORE_CONTEXT()                                                                                   \\r
 123 {                                                                                                                                               \\r
 124 extern volatile void * volatile pxCurrentTCB;                                                   \\r
 125 extern volatile uint32_t ulCriticalNesting;                                     \\r
 126                                                                                                                                                 \\r
 127         /* Set the LR to the task stack. */                                                                     \\r
 128         __asm volatile (                                                                                                        \\r
 129         "LDR            R0, =pxCurrentTCB                                                               \n\t"   \\r
 130         "LDR            R0, [R0]                                                                                \n\t"   \\r
 131         "LDR            LR, [R0]                                                                                \n\t"   \\r
 132                                                                                                                                                 \\r
 133         /* The critical nesting depth is the first item on the stack. */        \\r
 134         /* Load it into the ulCriticalNesting variable. */                                      \\r
 135         "LDR            R0, =ulCriticalNesting                                                  \n\t"   \\r
 136         "LDMFD  LR!, {R1}                                                                                       \n\t"   \\r
 137         "STR            R1, [R0]                                                                                \n\t"   \\r
 138                                                                                                                                                 \\r
 139         /* Get the SPSR from the stack. */                                                                      \\r
 140         "LDMFD  LR!, {R0}                                                                                       \n\t"   \\r
 141         "MSR            SPSR, R0                                                                                \n\t"   \\r
 142                                                                                                                                                 \\r
 143         /* Restore all system mode registers for the task. */                           \\r
 144         "LDMFD  LR, {R0-R14}^                                                                           \n\t"   \\r
 145         "NOP                                                                                                            \n\t"   \\r
 146                                                                                                                                                 \\r
 147         /* Restore the return address. */                                                                       \\r
 148         "LDR            LR, [LR, #+60]                                                                  \n\t"   \\r
 149                                                                                                                                                 \\r
 150         /* And return - correcting the offset in the LR to obtain the */        \\r
 151         /* correct address. */                                                                                          \\r
 152         "SUBS   PC, LR, #4                                                                                      \n\t"   \\r
 153         );                                                                                                                                      \\r
 154         ( void ) ulCriticalNesting;                                                                                     \\r
 155         ( void ) pxCurrentTCB;                                                                                          \\r
 156 }\r
 157 /*-----------------------------------------------------------*/\r
 158 \r
 159 #define portSAVE_CONTEXT()                                                                                              \\r
 160 {                                                                                                                                               \\r
 161 extern volatile void * volatile pxCurrentTCB;                                                   \\r
 162 extern volatile uint32_t ulCriticalNesting;                                     \\r
 163                                                                                                                                                 \\r
 164         /* Push R0 as we are going to use the register. */                                      \\r
 165         __asm volatile (                                                                                                        \\r
 166         "STMDB  SP!, {R0}                                                                                       \n\t"   \\r
 167                                                                                                                                                 \\r
 168         /* Set R0 to point to the task stack pointer. */                                        \\r
 169         "STMDB  SP,{SP}^                                                                                        \n\t"   \\r
 170         "NOP                                                                                                            \n\t"   \\r
 171         "SUB    SP, SP, #4                                                                                      \n\t"   \\r
 172         "LDMIA  SP!,{R0}                                                                                        \n\t"   \\r
 173                                                                                                                                                 \\r
 174         /* Push the return address onto the stack. */                                           \\r
 175         "STMDB  R0!, {LR}                                                                                       \n\t"   \\r
 176                                                                                                                                                 \\r
 177         /* Now we have saved LR we can use it instead of R0. */                         \\r
 178         "MOV    LR, R0                                                                                          \n\t"   \\r
 179                                                                                                                                                 \\r
 180         /* Pop R0 so we can save it onto the system mode stack. */                      \\r
 181         "LDMIA  SP!, {R0}                                                                                       \n\t"   \\r
 182                                                                                                                                                 \\r
 183         /* Push all the system mode registers onto the task stack. */           \\r
 184         "STMDB  LR,{R0-LR}^                                                                                     \n\t"   \\r
 185         "NOP                                                                                                            \n\t"   \\r
 186         "SUB    LR, LR, #60                                                                                     \n\t"   \\r
 187                                                                                                                                                 \\r
 188         /* Push the SPSR onto the task stack. */                                                        \\r
 189         "MRS    R0, SPSR                                                                                        \n\t"   \\r
 190         "STMDB  LR!, {R0}                                                                                       \n\t"   \\r
 191                                                                                                                                                 \\r
 192         "LDR    R0, =ulCriticalNesting                                                          \n\t"   \\r
 193         "LDR    R0, [R0]                                                                                        \n\t"   \\r
 194         "STMDB  LR!, {R0}                                                                                       \n\t"   \\r
 195                                                                                                                                                 \\r
 196         /* Store the new top of stack for the task. */                                          \\r
 197         "LDR    R0, =pxCurrentTCB                                                                       \n\t"   \\r
 198         "LDR    R0, [R0]                                                                                        \n\t"   \\r
 199         "STR    LR, [R0]                                                                                        \n\t"   \\r
 200         );                                                                                                                                      \\r
 201         ( void ) ulCriticalNesting;                                                                                     \\r
 202         ( void ) pxCurrentTCB;                                                                                          \\r
 203 }\r
 204 \r
 205 extern void vTaskSwitchContext( void );\r
 206 #define portYIELD_FROM_ISR()            vTaskSwitchContext()\r
 207 #define portYIELD()                                     __asm volatile ( "SWI 0" )\r
 208 /*-----------------------------------------------------------*/\r
 209 \r
 210 \r
 211 /* Critical section management. */\r
 212 \r
 213 /*\r
 214  * The interrupt management utilities can only be called from ARM mode.  When\r
 215  * THUMB_INTERWORK is defined the utilities are defined as functions in\r
 216  * portISR.c to ensure a switch to ARM mode.  When THUMB_INTERWORK is not\r
 217  * defined then the utilities are defined as macros here - as per other ports.\r
 218  */\r
 219 \r
 220 #ifdef THUMB_INTERWORK\r
 221 \r
 222         extern void vPortDisableInterruptsFromThumb( void ) __attribute__ ((naked));\r
 223         extern void vPortEnableInterruptsFromThumb( void ) __attribute__ ((naked));\r
 224 \r
 225         #define portDISABLE_INTERRUPTS()        vPortDisableInterruptsFromThumb()\r
 226         #define portENABLE_INTERRUPTS()         vPortEnableInterruptsFromThumb()\r
 227 \r
 228 #else\r
 229 \r
 230         #define portDISABLE_INTERRUPTS()                                                                                        \\r
 231                 __asm volatile (                                                                                                                \\r
 232                         "STMDB  SP!, {R0}               \n\t"   /* Push R0.                                             */      \\r
 233                         "MRS    R0, CPSR                \n\t"   /* Get CPSR.                                    */      \\r
 234                         "ORR    R0, R0, #0xC0   \n\t"   /* Disable IRQ, FIQ.                    */      \\r
 235                         "MSR    CPSR, R0                \n\t"   /* Write back modified value.   */      \\r
 236                         "LDMIA  SP!, {R0}                       " )     /* Pop R0.                                              */\r
 237 \r
 238         #define portENABLE_INTERRUPTS()                                                                                         \\r
 239                 __asm volatile (                                                                                                                \\r
 240                         "STMDB  SP!, {R0}               \n\t"   /* Push R0.                                             */      \\r
 241                         "MRS    R0, CPSR                \n\t"   /* Get CPSR.                                    */      \\r
 242                         "BIC    R0, R0, #0xC0   \n\t"   /* Enable IRQ, FIQ.                             */      \\r
 243                         "MSR    CPSR, R0                \n\t"   /* Write back modified value.   */      \\r
 244                         "LDMIA  SP!, {R0}                       " )     /* Pop R0.                                              */\r
 245 \r
 246 #endif /* THUMB_INTERWORK */\r
 247 \r
 248 extern void vPortEnterCritical( void );\r
 249 extern void vPortExitCritical( void );\r
 250 \r
 251 #define portENTER_CRITICAL()            vPortEnterCritical();\r
 252 #define portEXIT_CRITICAL()                     vPortExitCritical();\r
 253 /*-----------------------------------------------------------*/\r
 254 \r
 255 /* Task function macros as described on the FreeRTOS.org WEB site. */\r
 256 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
 257 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
 258 \r
 259 #ifdef __cplusplus\r
 260 }\r
 261 #endif\r
 262 \r
 263 #endif /* PORTMACRO_H */\r
 264 \r