2 * FreeRTOS Kernel V10.2.0
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3 * Copyright (C) 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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5 * Permission is hereby granted, free of charge, to any person obtaining a copy of
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6 * this software and associated documentation files (the "Software"), to deal in
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7 * the Software without restriction, including without limitation the rights to
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8 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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9 * the Software, and to permit persons to whom the Software is furnished to do so,
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10 * subject to the following conditions:
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12 * The above copyright notice and this permission notice shall be included in all
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13 * copies or substantial portions of the Software.
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15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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17 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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18 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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19 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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20 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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22 * http://www.FreeRTOS.org
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23 * http://aws.amazon.com/freertos
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25 * 1 tab == 4 spaces!
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28 /*-----------------------------------------------------------
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29 * Implementation of functions defined in portable.h for the ARM CM0 port.
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30 *----------------------------------------------------------*/
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32 /* Scheduler includes. */
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33 #include "FreeRTOS.h"
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36 /* Constants required to manipulate the NVIC. */
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37 #define portNVIC_SYSTICK_CTRL ( ( volatile uint32_t * ) 0xe000e010 )
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38 #define portNVIC_SYSTICK_LOAD ( ( volatile uint32_t * ) 0xe000e014 )
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39 #define portNVIC_SYSTICK_CURRENT_VALUE ( ( volatile uint32_t * ) 0xe000e018 )
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40 #define portNVIC_INT_CTRL ( ( volatile uint32_t *) 0xe000ed04 )
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41 #define portNVIC_SYSPRI2 ( ( volatile uint32_t *) 0xe000ed20 )
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42 #define portNVIC_SYSTICK_CLK 0x00000004
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43 #define portNVIC_SYSTICK_INT 0x00000002
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44 #define portNVIC_SYSTICK_ENABLE 0x00000001
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45 #define portNVIC_PENDSVSET 0x10000000
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46 #define portMIN_INTERRUPT_PRIORITY ( 255UL )
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47 #define portNVIC_PENDSV_PRI ( portMIN_INTERRUPT_PRIORITY << 16UL )
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48 #define portNVIC_SYSTICK_PRI ( portMIN_INTERRUPT_PRIORITY << 24UL )
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50 /* Constants required to set up the initial stack. */
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51 #define portINITIAL_XPSR ( 0x01000000 )
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53 /* Let the user override the pre-loading of the initial LR with the address of
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54 prvTaskExitError() in case it messes up unwinding of the stack in the
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56 #ifdef configTASK_RETURN_ADDRESS
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57 #define portTASK_RETURN_ADDRESS configTASK_RETURN_ADDRESS
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59 #define portTASK_RETURN_ADDRESS prvTaskExitError
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63 * Setup the timer to generate the tick interrupts.
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65 static void prvSetupTimerInterrupt( void );
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68 * Exception handlers.
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70 void xPortPendSVHandler( void ) __attribute__ (( naked ));
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71 void xPortSysTickHandler( void );
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72 void vPortSVCHandler( void );
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75 * Start first task is a separate function so it can be tested in isolation.
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77 static void vPortStartFirstTask( void ) __attribute__ (( naked ));
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80 * Used to catch tasks that attempt to return from their implementing function.
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82 static void prvTaskExitError( void );
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84 /*-----------------------------------------------------------*/
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86 /* Each task maintains its own interrupt status in the critical nesting
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88 static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
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90 /*-----------------------------------------------------------*/
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93 * See header file for description.
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95 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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97 /* Simulate the stack frame as it would be created by a context switch
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99 pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
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100 *pxTopOfStack = portINITIAL_XPSR; /* xPSR */
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102 *pxTopOfStack = ( StackType_t ) pxCode; /* PC */
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104 *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */
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105 pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
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106 *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
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107 pxTopOfStack -= 8; /* R11..R4. */
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109 return pxTopOfStack;
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111 /*-----------------------------------------------------------*/
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113 static void prvTaskExitError( void )
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115 volatile uint32_t ulDummy = 0UL;
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117 /* A function that implements a task must not exit or attempt to return to
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118 its caller as there is nothing to return to. If a task wants to exit it
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119 should instead call vTaskDelete( NULL ).
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121 Artificially force an assert() to be triggered if configASSERT() is
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122 defined, then stop here so application writers can catch the error. */
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123 configASSERT( uxCriticalNesting == ~0UL );
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124 portDISABLE_INTERRUPTS();
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125 while( ulDummy == 0 )
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127 /* This file calls prvTaskExitError() after the scheduler has been
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128 started to remove a compiler warning about the function being defined
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129 but never called. ulDummy is used purely to quieten other warnings
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130 about code appearing after this function is called - making ulDummy
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131 volatile makes the compiler think the function could return and
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132 therefore not output an 'unreachable code' warning for code that appears
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136 /*-----------------------------------------------------------*/
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138 void vPortSVCHandler( void )
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140 /* This function is no longer used, but retained for backward
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143 /*-----------------------------------------------------------*/
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145 void vPortStartFirstTask( void )
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147 /* The MSP stack is not reset as, unlike on M3/4 parts, there is no vector
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148 table offset register that can be used to locate the initial stack value.
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149 Not all M0 parts have the application vector table at address 0. */
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151 " .syntax unified \n"
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152 " ldr r2, pxCurrentTCBConst2 \n" /* Obtain location of pxCurrentTCB. */
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154 " ldr r0, [r3] \n" /* The first item in pxCurrentTCB is the task top of stack. */
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155 " adds r0, #32 \n" /* Discard everything up to r0. */
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156 " msr psp, r0 \n" /* This is now the new top of stack to use in the task. */
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157 " movs r0, #2 \n" /* Switch to the psp stack. */
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158 " msr CONTROL, r0 \n"
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160 " pop {r0-r5} \n" /* Pop the registers that are saved automatically. */
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161 " mov lr, r5 \n" /* lr is now in r5. */
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162 " pop {r3} \n" /* Return address is now in r3. */
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163 " pop {r2} \n" /* Pop and discard XPSR. */
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164 " cpsie i \n" /* The first task has its context and interrupts can be enabled. */
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165 " bx r3 \n" /* Finally, jump to the user defined task code. */
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168 "pxCurrentTCBConst2: .word pxCurrentTCB "
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171 /*-----------------------------------------------------------*/
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174 * See header file for description.
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176 BaseType_t xPortStartScheduler( void )
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178 /* Make PendSV, CallSV and SysTick the same priority as the kernel. */
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179 *(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;
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180 *(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;
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182 /* Start the timer that generates the tick ISR. Interrupts are disabled
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184 prvSetupTimerInterrupt();
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186 /* Initialise the critical nesting count ready for the first task. */
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187 uxCriticalNesting = 0;
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189 /* Start the first task. */
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190 vPortStartFirstTask();
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192 /* Should never get here as the tasks will now be executing! Call the task
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193 exit error function to prevent compiler warnings about a static function
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194 not being called in the case that the application writer overrides this
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195 functionality by defining configTASK_RETURN_ADDRESS. Call
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196 vTaskSwitchContext() so link time optimisation does not remove the
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198 vTaskSwitchContext();
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199 prvTaskExitError();
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201 /* Should not get here! */
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204 /*-----------------------------------------------------------*/
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206 void vPortEndScheduler( void )
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208 /* Not implemented in ports where there is nothing to return to.
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209 Artificially force an assert. */
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210 configASSERT( uxCriticalNesting == 1000UL );
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212 /*-----------------------------------------------------------*/
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214 void vPortYield( void )
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216 /* Set a PendSV to request a context switch. */
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217 *( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET;
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219 /* Barriers are normally not required but do ensure the code is completely
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220 within the specified behaviour for the architecture. */
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221 __asm volatile( "dsb" ::: "memory" );
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222 __asm volatile( "isb" );
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224 /*-----------------------------------------------------------*/
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226 void vPortEnterCritical( void )
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228 portDISABLE_INTERRUPTS();
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229 uxCriticalNesting++;
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230 __asm volatile( "dsb" ::: "memory" );
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231 __asm volatile( "isb" );
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233 /*-----------------------------------------------------------*/
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235 void vPortExitCritical( void )
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237 configASSERT( uxCriticalNesting );
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238 uxCriticalNesting--;
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239 if( uxCriticalNesting == 0 )
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241 portENABLE_INTERRUPTS();
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244 /*-----------------------------------------------------------*/
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246 uint32_t ulSetInterruptMaskFromISR( void )
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249 " mrs r0, PRIMASK \n"
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255 #if !defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
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256 /* To avoid compiler warnings. The return statement will nevere be reached,
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257 but some compilers warn if it is not included, while others won't compile if
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262 /*-----------------------------------------------------------*/
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264 void vClearInterruptMaskFromISR( __attribute__( ( unused ) ) uint32_t ulMask )
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267 " msr PRIMASK, r0 \n"
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272 #if !defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
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273 /* Just to avoid compiler warning. ulMask is used from the asm code but
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274 the compiler can't see that. Some compilers generate warnings without the
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275 following line, while others generate warnings if the line is included. */
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279 /*-----------------------------------------------------------*/
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281 void xPortPendSVHandler( void )
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283 /* This is a naked function. */
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287 " .syntax unified \n"
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290 " ldr r3, pxCurrentTCBConst \n" /* Get the location of the current TCB. */
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293 " subs r0, r0, #32 \n" /* Make space for the remaining low registers. */
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294 " str r0, [r2] \n" /* Save the new top of stack. */
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295 " stmia r0!, {r4-r7} \n" /* Store the low registers that are not saved automatically. */
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296 " mov r4, r8 \n" /* Store the high registers. */
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300 " stmia r0!, {r4-r7} \n"
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302 " push {r3, r14} \n"
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304 " bl vTaskSwitchContext \n"
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306 " pop {r2, r3} \n" /* lr goes in r3. r2 now holds tcb pointer. */
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309 " ldr r0, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. */
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310 " adds r0, r0, #16 \n" /* Move to the high registers. */
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311 " ldmia r0!, {r4-r7} \n" /* Pop the high registers. */
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317 " msr psp, r0 \n" /* Remember the new top of stack for the task. */
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319 " subs r0, r0, #32 \n" /* Go back for the low registers that are not automatically restored. */
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320 " ldmia r0!, {r4-r7} \n" /* Pop low registers. */
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325 "pxCurrentTCBConst: .word pxCurrentTCB "
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328 /*-----------------------------------------------------------*/
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330 void xPortSysTickHandler( void )
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332 uint32_t ulPreviousMask;
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334 ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();
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336 /* Increment the RTOS tick. */
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337 if( xTaskIncrementTick() != pdFALSE )
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339 /* Pend a context switch. */
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340 *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
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343 portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
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345 /*-----------------------------------------------------------*/
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348 * Setup the systick timer to generate the tick interrupts at the required
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351 void prvSetupTimerInterrupt( void )
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353 /* Stop and reset the SysTick. */
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354 *(portNVIC_SYSTICK_CTRL) = 0UL;
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355 *(portNVIC_SYSTICK_CURRENT_VALUE) = 0UL;
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357 /* Configure SysTick to interrupt at the requested rate. */
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358 *(portNVIC_SYSTICK_LOAD) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
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359 *(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;
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361 /*-----------------------------------------------------------*/
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