2 FreeRTOS V7.4.0 - Copyright (C) 2013 Real Time Engineers Ltd.
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4 FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
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5 http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 ***************************************************************************
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9 * FreeRTOS tutorial books are available in pdf and paperback. *
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10 * Complete, revised, and edited pdf reference manuals are also *
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13 * Purchasing FreeRTOS documentation will not only help you, by *
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14 * ensuring you get running as quickly as possible and with an *
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15 * in-depth knowledge of how to use FreeRTOS, it will also help *
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16 * the FreeRTOS project to continue with its mission of providing *
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17 * professional grade, cross platform, de facto standard solutions *
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18 * for microcontrollers - completely free of charge! *
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20 * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
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22 * Thank you for using FreeRTOS, and thank you for your support! *
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24 ***************************************************************************
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27 This file is part of the FreeRTOS distribution.
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29 FreeRTOS is free software; you can redistribute it and/or modify it under
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30 the terms of the GNU General Public License (version 2) as published by the
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31 Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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33 >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to
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34 distribute a combined work that includes FreeRTOS without being obliged to
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35 provide the source code for proprietary components outside of the FreeRTOS
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38 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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39 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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40 FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
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41 details. You should have received a copy of the GNU General Public License
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42 and the FreeRTOS license exception along with FreeRTOS; if not itcan be
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43 viewed here: http://www.freertos.org/a00114.html and also obtained by
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44 writing to Real Time Engineers Ltd., contact details for whom are available
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45 on the FreeRTOS WEB site.
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49 ***************************************************************************
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51 * Having a problem? Start by reading the FAQ "My application does *
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52 * not run, what could be wrong?" *
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54 * http://www.FreeRTOS.org/FAQHelp.html *
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56 ***************************************************************************
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59 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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60 license and Real Time Engineers Ltd. contact details.
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62 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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63 including FreeRTOS+Trace - an indispensable productivity tool, and our new
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64 fully thread aware and reentrant UDP/IP stack.
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66 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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67 Integrity Systems, who sell the code with commercial support,
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68 indemnification and middleware, under the OpenRTOS brand.
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70 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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71 engineered and independently SIL3 certified version for use in safety and
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72 mission critical applications that require provable dependability.
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75 /*-----------------------------------------------------------
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76 * Implementation of functions defined in portable.h for the ARM CM0 port.
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77 *----------------------------------------------------------*/
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79 /* Scheduler includes. */
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80 #include "FreeRTOS.h"
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83 /* Constants required to manipulate the NVIC. */
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84 #define portNVIC_SYSTICK_CTRL ( ( volatile unsigned long *) 0xe000e010 )
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85 #define portNVIC_SYSTICK_LOAD ( ( volatile unsigned long *) 0xe000e014 )
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86 #define portNVIC_INT_CTRL ( ( volatile unsigned long *) 0xe000ed04 )
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87 #define portNVIC_SYSPRI2 ( ( volatile unsigned long *) 0xe000ed20 )
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88 #define portNVIC_SYSTICK_CLK 0x00000004
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89 #define portNVIC_SYSTICK_INT 0x00000002
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90 #define portNVIC_SYSTICK_ENABLE 0x00000001
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91 #define portNVIC_PENDSVSET 0x10000000
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92 #define portMIN_INTERRUPT_PRIORITY ( 255UL )
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93 #define portNVIC_PENDSV_PRI ( portMIN_INTERRUPT_PRIORITY << 16UL )
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94 #define portNVIC_SYSTICK_PRI ( portMIN_INTERRUPT_PRIORITY << 24UL )
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96 /* Constants required to set up the initial stack. */
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97 #define portINITIAL_XPSR ( 0x01000000 )
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99 /* Each task maintains its own interrupt status in the critical nesting
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101 static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;
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104 * Setup the timer to generate the tick interrupts.
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106 static void prvSetupTimerInterrupt( void );
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109 * Exception handlers.
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111 void xPortPendSVHandler( void ) __attribute__ (( naked ));
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112 void xPortSysTickHandler( void );
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113 void vPortSVCHandler( void ) __attribute__ (( naked ));
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116 * Start first task is a separate function so it can be tested in isolation.
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118 static void vPortStartFirstTask( void ) __attribute__ (( naked ));
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120 /*-----------------------------------------------------------*/
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123 * See header file for description.
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125 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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127 /* Simulate the stack frame as it would be created by a context switch
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129 pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
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130 *pxTopOfStack = portINITIAL_XPSR; /* xPSR */
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132 *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* PC */
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133 pxTopOfStack -= 6; /* LR, R12, R3..R1 */
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134 *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
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135 pxTopOfStack -= 8; /* R11..R4. */
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137 return pxTopOfStack;
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139 /*-----------------------------------------------------------*/
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141 void vPortSVCHandler( void )
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144 " ldr r3, pxCurrentTCBConst2 \n" /* Restore the context. */
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145 " ldr r1, [r3] \n" /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */
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146 " ldr r0, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. */
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147 " add r0, r0, #16 \n" /* Move to the high registers. */
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148 " ldmia r0!, {r4-r7} \n" /* Pop the high registers. */
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154 " msr psp, r0 \n" /* Remember the new top of stack for the task. */
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156 " sub r0, r0, #32 \n" /* Go back for the low registers that are not automatically restored. */
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157 " ldmia r0!, {r4-r7} \n" /* Pop low registers. */
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158 " mov r1, r14 \n" /* OR R14 with 0x0d. */
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159 " movs r0, #0x0d \n"
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164 "pxCurrentTCBConst2: .word pxCurrentTCB \n"
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167 /*-----------------------------------------------------------*/
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169 void vPortStartFirstTask( void )
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172 " movs r0, #0x00 \n" /* Locate the top of stack. */
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174 " msr msp, r0 \n" /* Set the msp back to the start of the stack. */
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175 " cpsie i \n" /* Globally enable interrupts. */
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176 " svc 0 \n" /* System call to start first task. */
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180 /*-----------------------------------------------------------*/
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183 * See header file for description.
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185 portBASE_TYPE xPortStartScheduler( void )
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187 /* Make PendSV, CallSV and SysTick the same priroity as the kernel. */
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188 *(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;
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189 *(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;
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191 /* Start the timer that generates the tick ISR. Interrupts are disabled
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193 prvSetupTimerInterrupt();
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195 /* Initialise the critical nesting count ready for the first task. */
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196 uxCriticalNesting = 0;
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198 /* Start the first task. */
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199 vPortStartFirstTask();
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201 /* Should not get here! */
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204 /*-----------------------------------------------------------*/
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206 void vPortEndScheduler( void )
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208 /* It is unlikely that the CM0 port will require this function as there
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209 is nothing to return to. */
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211 /*-----------------------------------------------------------*/
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213 void vPortYieldFromISR( void )
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215 /* Set a PendSV to request a context switch. */
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216 *( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET;
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218 /*-----------------------------------------------------------*/
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220 void vPortEnterCritical( void )
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222 portDISABLE_INTERRUPTS();
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223 uxCriticalNesting++;
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225 /*-----------------------------------------------------------*/
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227 void vPortExitCritical( void )
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229 uxCriticalNesting--;
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230 if( uxCriticalNesting == 0 )
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232 portENABLE_INTERRUPTS();
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235 /*-----------------------------------------------------------*/
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237 void xPortPendSVHandler( void )
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239 /* This is a naked function. */
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245 " ldr r3, pxCurrentTCBConst \n" /* Get the location of the current TCB. */
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248 " sub r0, r0, #32 \n" /* Make space for the remaining low registers. */
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249 " str r0, [r2] \n" /* Save the new top of stack. */
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250 " stmia r0!, {r4-r7} \n" /* Store the low registers that are not saved automatically. */
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251 " mov r4, r8 \n" /* Store the high registers. */
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255 " stmia r0!, {r4-r7} \n"
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257 " push {r3, r14} \n"
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259 " bl vTaskSwitchContext \n"
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261 " pop {r2, r3} \n" /* lr goes in r3. r2 now holds tcb pointer. */
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264 " ldr r0, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. */
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265 " add r0, r0, #16 \n" /* Move to the high registers. */
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266 " ldmia r0!, {r4-r7} \n" /* Pop the high registers. */
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272 " msr psp, r0 \n" /* Remember the new top of stack for the task. */
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274 " sub r0, r0, #32 \n" /* Go back for the low registers that are not automatically restored. */
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275 " ldmia r0!, {r4-r7} \n" /* Pop low registers. */
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280 "pxCurrentTCBConst: .word pxCurrentTCB "
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283 /*-----------------------------------------------------------*/
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285 void xPortSysTickHandler( void )
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287 unsigned long ulDummy;
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289 /* If using preemption, also force a context switch. */
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290 #if configUSE_PREEMPTION == 1
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291 *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
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294 ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();
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296 vTaskIncrementTick();
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298 portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy );
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300 /*-----------------------------------------------------------*/
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303 * Setup the systick timer to generate the tick interrupts at the required
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306 void prvSetupTimerInterrupt( void )
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308 /* Configure SysTick to interrupt at the requested rate. */
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309 *(portNVIC_SYSTICK_LOAD) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
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310 *(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;
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312 /*-----------------------------------------------------------*/
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