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1 /*\r
2     FreeRTOS V7.5.1 - Copyright (C) 2013 Real Time Engineers Ltd.\r
3 \r
4     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
5 \r
6     ***************************************************************************\r
7      *                                                                       *\r
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9      *    robust, strictly quality controlled, supported, and cross          *\r
10      *    platform software that has become a de facto standard.             *\r
11      *                                                                       *\r
12      *    Help yourself get started quickly and support the FreeRTOS         *\r
13      *    project by purchasing a FreeRTOS tutorial book, reference          *\r
14      *    manual, or both from: http://www.FreeRTOS.org/Documentation        *\r
15      *                                                                       *\r
16      *    Thank you!                                                         *\r
17      *                                                                       *\r
18     ***************************************************************************\r
19 \r
20     This file is part of the FreeRTOS distribution.\r
21 \r
22     FreeRTOS is free software; you can redistribute it and/or modify it under\r
23     the terms of the GNU General Public License (version 2) as published by the\r
24     Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
25 \r
26     >>! NOTE: The modification to the GPL is included to allow you to distribute\r
27     >>! a combined work that includes FreeRTOS without being obliged to provide\r
28     >>! the source code for proprietary components outside of the FreeRTOS\r
29     >>! kernel.\r
30 \r
31     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
32     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
33     FOR A PARTICULAR PURPOSE.  Full license text is available from the following\r
34     link: http://www.freertos.org/a00114.html\r
35 \r
36     1 tab == 4 spaces!\r
37 \r
38     ***************************************************************************\r
39      *                                                                       *\r
40      *    Having a problem?  Start by reading the FAQ "My application does   *\r
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42      *                                                                       *\r
43      *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
44      *                                                                       *\r
45     ***************************************************************************\r
46 \r
47     http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
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49 \r
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53 \r
54     http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
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57 \r
58     http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
59     engineered and independently SIL3 certified version for use in safety and\r
60     mission critical applications that require provable dependability.\r
61 \r
62     1 tab == 4 spaces!\r
63 */\r
64 \r
65 /*-----------------------------------------------------------\r
66  * Implementation of functions defined in portable.h for the ARM CM0 port.\r
67  *----------------------------------------------------------*/\r
68 \r
69 /* Scheduler includes. */\r
70 #include "FreeRTOS.h"\r
71 #include "task.h"\r
72 \r
73 /* Constants required to manipulate the NVIC. */\r
74 #define portNVIC_SYSTICK_CTRL           ( ( volatile unsigned long *) 0xe000e010 )\r
75 #define portNVIC_SYSTICK_LOAD           ( ( volatile unsigned long *) 0xe000e014 )\r
76 #define portNVIC_INT_CTRL                       ( ( volatile unsigned long *) 0xe000ed04 )\r
77 #define portNVIC_SYSPRI2                        ( ( volatile unsigned long *) 0xe000ed20 )\r
78 #define portNVIC_SYSTICK_CLK            0x00000004\r
79 #define portNVIC_SYSTICK_INT            0x00000002\r
80 #define portNVIC_SYSTICK_ENABLE         0x00000001\r
81 #define portNVIC_PENDSVSET                      0x10000000\r
82 #define portMIN_INTERRUPT_PRIORITY      ( 255UL )\r
83 #define portNVIC_PENDSV_PRI                     ( portMIN_INTERRUPT_PRIORITY << 16UL )\r
84 #define portNVIC_SYSTICK_PRI            ( portMIN_INTERRUPT_PRIORITY << 24UL )\r
85 \r
86 /* Constants required to set up the initial stack. */\r
87 #define portINITIAL_XPSR                        ( 0x01000000 )\r
88 \r
89 /* Each task maintains its own interrupt status in the critical nesting\r
90 variable. */\r
91 static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;\r
92 \r
93 /*\r
94  * Setup the timer to generate the tick interrupts.\r
95  */\r
96 static void prvSetupTimerInterrupt( void );\r
97 \r
98 /*\r
99  * Exception handlers.\r
100  */\r
101 void xPortPendSVHandler( void ) __attribute__ (( naked ));\r
102 void xPortSysTickHandler( void );\r
103 void vPortSVCHandler( void ) __attribute__ (( naked ));\r
104 \r
105 /*\r
106  * Start first task is a separate function so it can be tested in isolation.\r
107  */\r
108 static void vPortStartFirstTask( void ) __attribute__ (( naked ));\r
109 \r
110 /*-----------------------------------------------------------*/\r
111 \r
112 /*\r
113  * See header file for description.\r
114  */\r
115 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
116 {\r
117         /* Simulate the stack frame as it would be created by a context switch\r
118         interrupt. */\r
119         pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */\r
120         *pxTopOfStack = portINITIAL_XPSR;       /* xPSR */\r
121         pxTopOfStack--;\r
122         *pxTopOfStack = ( portSTACK_TYPE ) pxCode;      /* PC */\r
123         pxTopOfStack -= 6;      /* LR, R12, R3..R1 */\r
124         *pxTopOfStack = ( portSTACK_TYPE ) pvParameters;        /* R0 */\r
125         pxTopOfStack -= 8; /* R11..R4. */\r
126 \r
127         return pxTopOfStack;\r
128 }\r
129 /*-----------------------------------------------------------*/\r
130 \r
131 void vPortSVCHandler( void )\r
132 {\r
133         __asm volatile (\r
134                                         "       ldr     r3, pxCurrentTCBConst2          \n" /* Restore the context. */\r
135                                         "       ldr r1, [r3]                                    \n" /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */\r
136                                         "       ldr r0, [r1]                                    \n" /* The first item in pxCurrentTCB is the task top of stack. */\r
137                                         "       add r0, r0, #16                                 \n" /* Move to the high registers. */\r
138                                         "       ldmia r0!, {r4-r7}                              \n" /* Pop the high registers. */\r
139                                         "       mov r8, r4                                              \n"\r
140                                         "       mov r9, r5                                              \n"\r
141                                         "       mov r10, r6                                             \n"\r
142                                         "       mov r11, r7                                             \n"\r
143                                         "                                                                       \n"\r
144                                         "       msr psp, r0                                             \n" /* Remember the new top of stack for the task. */\r
145                                         "                                                                       \n"\r
146                                         "       sub r0, r0, #32                                 \n" /* Go back for the low registers that are not automatically restored. */\r
147                                         "       ldmia r0!, {r4-r7}              \n" /* Pop low registers.  */\r
148                                         "       mov r1, r14                                             \n" /* OR R14 with 0x0d. */\r
149                                         "       movs r0, #0x0d                                  \n"\r
150                                         "       orr r1, r0                                              \n"\r
151                                         "       bx r1                                                   \n"\r
152                                         "                                                                       \n"\r
153                                         "       .align 2                                                \n"\r
154                                         "pxCurrentTCBConst2: .word pxCurrentTCB \n"\r
155                                 );\r
156 }\r
157 /*-----------------------------------------------------------*/\r
158 \r
159 void vPortStartFirstTask( void )\r
160 {\r
161         __asm volatile(\r
162                                         " movs r0, #0x00        \n" /* Locate the top of stack. */\r
163                                         " ldr r0, [r0]          \n"\r
164                                         " msr msp, r0           \n" /* Set the msp back to the start of the stack. */\r
165                                         " cpsie i                       \n" /* Globally enable interrupts. */\r
166                                         " svc 0                         \n" /* System call to start first task. */\r
167                                         " nop                           \n"\r
168                                 );\r
169 }\r
170 /*-----------------------------------------------------------*/\r
171 \r
172 /*\r
173  * See header file for description.\r
174  */\r
175 portBASE_TYPE xPortStartScheduler( void )\r
176 {\r
177         /* Make PendSV, CallSV and SysTick the same priroity as the kernel. */\r
178         *(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;\r
179         *(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;\r
180 \r
181         /* Start the timer that generates the tick ISR.  Interrupts are disabled\r
182         here already. */\r
183         prvSetupTimerInterrupt();\r
184 \r
185         /* Initialise the critical nesting count ready for the first task. */\r
186         uxCriticalNesting = 0;\r
187 \r
188         /* Start the first task. */\r
189         vPortStartFirstTask();\r
190 \r
191         /* Should not get here! */\r
192         return 0;\r
193 }\r
194 /*-----------------------------------------------------------*/\r
195 \r
196 void vPortEndScheduler( void )\r
197 {\r
198   /* It is unlikely that the CM0 port will require this function as there\r
199     is nothing to return to.  */\r
200 }\r
201 /*-----------------------------------------------------------*/\r
202 \r
203 void vPortYield( void )\r
204 {\r
205         /* Set a PendSV to request a context switch. */\r
206         *( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET;\r
207 \r
208         /* Barriers are normally not required but do ensure the code is completely\r
209         within the specified behaviour for the architecture. */\r
210         __asm volatile( "dsb" );\r
211         __asm volatile( "isb" );\r
212 }\r
213 /*-----------------------------------------------------------*/\r
214 \r
215 void vPortEnterCritical( void )\r
216 {\r
217     portDISABLE_INTERRUPTS();\r
218     uxCriticalNesting++;\r
219         __asm volatile( "dsb" );\r
220         __asm volatile( "isb" );\r
221 }\r
222 /*-----------------------------------------------------------*/\r
223 \r
224 void vPortExitCritical( void )\r
225 {\r
226     uxCriticalNesting--;\r
227     if( uxCriticalNesting == 0 )\r
228     {\r
229         portENABLE_INTERRUPTS();\r
230     }\r
231 }\r
232 /*-----------------------------------------------------------*/\r
233 \r
234 void xPortPendSVHandler( void )\r
235 {\r
236         /* This is a naked function. */\r
237 \r
238         __asm volatile\r
239         (\r
240         "       mrs r0, psp                                                     \n"\r
241         "                                                                               \n"\r
242         "       ldr     r3, pxCurrentTCBConst                   \n" /* Get the location of the current TCB. */\r
243         "       ldr     r2, [r3]                                                \n"\r
244         "                                                                               \n"\r
245         "       sub r0, r0, #32                                         \n" /* Make space for the remaining low registers. */\r
246         "       str r0, [r2]                                            \n" /* Save the new top of stack. */\r
247         "       stmia r0!, {r4-r7}                                      \n" /* Store the low registers that are not saved automatically. */\r
248         "       mov r4, r8                                                      \n" /* Store the high registers. */\r
249         "       mov r5, r9                                                      \n"\r
250         "       mov r6, r10                                                     \n"\r
251         "       mov r7, r11                                                     \n"\r
252         "       stmia r0!, {r4-r7}                      \n"\r
253         "                                                                               \n"\r
254         "       push {r3, r14}                                          \n"\r
255         "       cpsid i                                                         \n"\r
256         "       bl vTaskSwitchContext                           \n"\r
257         "       cpsie i                                                         \n"\r
258         "       pop {r2, r3}                                            \n" /* lr goes in r3. r2 now holds tcb pointer. */\r
259         "                                                                               \n"\r
260         "       ldr r1, [r2]                                            \n"\r
261         "       ldr r0, [r1]                                            \n" /* The first item in pxCurrentTCB is the task top of stack. */\r
262         "       add r0, r0, #16                                         \n" /* Move to the high registers. */\r
263         "       ldmia r0!, {r4-r7}                                      \n" /* Pop the high registers. */\r
264         "       mov r8, r4                                                      \n"\r
265         "       mov r9, r5                                                      \n"\r
266         "       mov r10, r6                                                     \n"\r
267         "       mov r11, r7                                                     \n"\r
268         "                                                                               \n"\r
269         "       msr psp, r0                                                     \n" /* Remember the new top of stack for the task. */\r
270         "                                                                               \n"\r
271         "       sub r0, r0, #32                                         \n" /* Go back for the low registers that are not automatically restored. */\r
272         "       ldmia r0!, {r4-r7}                      \n" /* Pop low registers.  */\r
273         "                                                                               \n"\r
274         "       bx r3                                                           \n"\r
275         "                                                                               \n"\r
276         "       .align 2                                                        \n"\r
277         "pxCurrentTCBConst: .word pxCurrentTCB    "\r
278         );\r
279 }\r
280 /*-----------------------------------------------------------*/\r
281 \r
282 void xPortSysTickHandler( void )\r
283 {\r
284 unsigned long ulDummy;\r
285 \r
286         ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();\r
287         {\r
288                 /* Increment the RTOS tick. */\r
289                 if( xTaskIncrementTick() != pdFALSE )\r
290                 {\r
291                         /* Pend a context switch. */\r
292                         *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;\r
293                 }\r
294         }\r
295         portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy );\r
296 }\r
297 /*-----------------------------------------------------------*/\r
298 \r
299 /*\r
300  * Setup the systick timer to generate the tick interrupts at the required\r
301  * frequency.\r
302  */\r
303 void prvSetupTimerInterrupt( void )\r
304 {\r
305         /* Configure SysTick to interrupt at the requested rate. */\r
306         *(portNVIC_SYSTICK_LOAD) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;\r
307         *(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;\r
308 }\r
309 /*-----------------------------------------------------------*/\r
310 \r