2 FreeRTOS V9.0.1 - Copyright (C) 2017 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 This file is part of the FreeRTOS distribution.
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9 FreeRTOS is free software; you can redistribute it and/or modify it under
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10 the terms of the GNU General Public License (version 2) as published by the
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11 Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
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13 ***************************************************************************
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14 >>! NOTE: The modification to the GPL is included to allow you to !<<
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15 >>! distribute a combined work that includes FreeRTOS without being !<<
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16 >>! obliged to provide the source code for proprietary components !<<
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17 >>! outside of the FreeRTOS kernel. !<<
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18 ***************************************************************************
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20 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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21 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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22 FOR A PARTICULAR PURPOSE. Full license text is available on the following
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23 link: http://www.freertos.org/a00114.html
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25 ***************************************************************************
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27 * FreeRTOS provides completely free yet professionally developed, *
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28 * robust, strictly quality controlled, supported, and cross *
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29 * platform software that is more than just the market leader, it *
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30 * is the industry's de facto standard. *
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32 * Help yourself get started quickly while simultaneously helping *
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33 * to support the FreeRTOS project by purchasing a FreeRTOS *
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34 * tutorial book, reference manual, or both: *
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35 * http://www.FreeRTOS.org/Documentation *
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37 ***************************************************************************
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39 http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
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40 the FAQ page "My application does not run, what could be wrong?". Have you
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41 defined configASSERT()?
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43 http://www.FreeRTOS.org/support - In return for receiving this top quality
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44 embedded software for free we request you assist our global community by
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45 participating in the support forum.
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47 http://www.FreeRTOS.org/training - Investing in training allows your team to
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48 be as productive as possible as early as possible. Now you can receive
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49 FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
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50 Ltd, and the world's leading authority on the world's leading RTOS.
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52 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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53 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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54 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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56 http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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57 Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
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59 http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
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60 Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
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61 licenses offer ticketed support, indemnification and commercial middleware.
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63 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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64 engineered and independently SIL3 certified version for use in safety and
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65 mission critical applications that require provable dependability.
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70 /*-----------------------------------------------------------
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71 * Implementation of functions defined in portable.h for the ARM CM3 port.
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72 *----------------------------------------------------------*/
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74 /* Scheduler includes. */
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75 #include "FreeRTOS.h"
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78 /* For backward compatibility, ensure configKERNEL_INTERRUPT_PRIORITY is
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79 defined. The value should also ensure backward compatibility.
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80 FreeRTOS.org versions prior to V4.4.0 did not include this definition. */
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81 #ifndef configKERNEL_INTERRUPT_PRIORITY
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82 #define configKERNEL_INTERRUPT_PRIORITY 255
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85 #ifndef configSYSTICK_CLOCK_HZ
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86 #define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
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87 /* Ensure the SysTick is clocked at the same frequency as the core. */
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88 #define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
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90 /* The way the SysTick is clocked is not modified in case it is not the same
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92 #define portNVIC_SYSTICK_CLK_BIT ( 0 )
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95 /* Constants required to manipulate the core. Registers first... */
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96 #define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000e010 ) )
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97 #define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile uint32_t * ) 0xe000e014 ) )
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98 #define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile uint32_t * ) 0xe000e018 ) )
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99 #define portNVIC_SYSPRI2_REG ( * ( ( volatile uint32_t * ) 0xe000ed20 ) )
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100 /* ...then bits in the registers. */
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101 #define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
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102 #define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
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103 #define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
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104 #define portNVIC_PENDSVCLEAR_BIT ( 1UL << 27UL )
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105 #define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )
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107 #define portNVIC_PENDSV_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
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108 #define portNVIC_SYSTICK_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
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110 /* Constants required to check the validity of an interrupt priority. */
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111 #define portFIRST_USER_INTERRUPT_NUMBER ( 16 )
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112 #define portNVIC_IP_REGISTERS_OFFSET_16 ( 0xE000E3F0 )
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113 #define portAIRCR_REG ( * ( ( volatile uint32_t * ) 0xE000ED0C ) )
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114 #define portMAX_8_BIT_VALUE ( ( uint8_t ) 0xff )
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115 #define portTOP_BIT_OF_BYTE ( ( uint8_t ) 0x80 )
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116 #define portMAX_PRIGROUP_BITS ( ( uint8_t ) 7 )
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117 #define portPRIORITY_GROUP_MASK ( 0x07UL << 8UL )
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118 #define portPRIGROUP_SHIFT ( 8UL )
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120 /* Masks off all bits but the VECTACTIVE bits in the ICSR register. */
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121 #define portVECTACTIVE_MASK ( 0xFFUL )
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123 /* Constants required to set up the initial stack. */
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124 #define portINITIAL_XPSR ( 0x01000000UL )
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126 /* The systick is a 24-bit counter. */
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127 #define portMAX_24_BIT_NUMBER ( 0xffffffUL )
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129 /* A fiddle factor to estimate the number of SysTick counts that would have
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130 occurred while the SysTick counter is stopped during tickless idle
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132 #define portMISSED_COUNTS_FACTOR ( 45UL )
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134 /* For strict compliance with the Cortex-M spec the task start address should
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135 have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
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136 #define portSTART_ADDRESS_MASK ( ( StackType_t ) 0xfffffffeUL )
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138 /* Let the user override the pre-loading of the initial LR with the address of
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139 prvTaskExitError() in case it messes up unwinding of the stack in the
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141 #ifdef configTASK_RETURN_ADDRESS
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142 #define portTASK_RETURN_ADDRESS configTASK_RETURN_ADDRESS
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144 #define portTASK_RETURN_ADDRESS prvTaskExitError
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148 * Setup the timer to generate the tick interrupts. The implementation in this
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149 * file is weak to allow application writers to change the timer used to
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150 * generate the tick interrupt.
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152 void vPortSetupTimerInterrupt( void );
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155 * Exception handlers.
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157 void xPortPendSVHandler( void ) __attribute__ (( naked ));
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158 void xPortSysTickHandler( void );
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159 void vPortSVCHandler( void ) __attribute__ (( naked ));
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162 * Start first task is a separate function so it can be tested in isolation.
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164 static void prvPortStartFirstTask( void ) __attribute__ (( naked ));
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167 * Used to catch tasks that attempt to return from their implementing function.
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169 static void prvTaskExitError( void );
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171 /*-----------------------------------------------------------*/
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173 /* Each task maintains its own interrupt status in the critical nesting
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175 static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
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178 * The number of SysTick increments that make up one tick period.
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180 #if( configUSE_TICKLESS_IDLE == 1 )
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181 static uint32_t ulTimerCountsForOneTick = 0;
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182 #endif /* configUSE_TICKLESS_IDLE */
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185 * The maximum number of tick periods that can be suppressed is limited by the
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186 * 24 bit resolution of the SysTick timer.
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188 #if( configUSE_TICKLESS_IDLE == 1 )
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189 static uint32_t xMaximumPossibleSuppressedTicks = 0;
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190 #endif /* configUSE_TICKLESS_IDLE */
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193 * Compensate for the CPU cycles that pass while the SysTick is stopped (low
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194 * power functionality only.
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196 #if( configUSE_TICKLESS_IDLE == 1 )
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197 static uint32_t ulStoppedTimerCompensation = 0;
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198 #endif /* configUSE_TICKLESS_IDLE */
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201 * Used by the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() macro to ensure
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202 * FreeRTOS API functions are not called from interrupts that have been assigned
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203 * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.
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205 #if( configASSERT_DEFINED == 1 )
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206 static uint8_t ucMaxSysCallPriority = 0;
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207 static uint32_t ulMaxPRIGROUPValue = 0;
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208 static const volatile uint8_t * const pcInterruptPriorityRegisters = ( const volatile uint8_t * const ) portNVIC_IP_REGISTERS_OFFSET_16;
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209 #endif /* configASSERT_DEFINED */
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211 /*-----------------------------------------------------------*/
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214 * See header file for description.
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216 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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218 /* Simulate the stack frame as it would be created by a context switch
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220 pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
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221 *pxTopOfStack = portINITIAL_XPSR; /* xPSR */
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223 *pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK; /* PC */
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225 *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */
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226 pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
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227 *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
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228 pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
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230 return pxTopOfStack;
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232 /*-----------------------------------------------------------*/
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234 static void prvTaskExitError( void )
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236 volatile uint32_t ulDummy = 0UL;
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238 /* A function that implements a task must not exit or attempt to return to
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239 its caller as there is nothing to return to. If a task wants to exit it
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240 should instead call vTaskDelete( NULL ).
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242 Artificially force an assert() to be triggered if configASSERT() is
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243 defined, then stop here so application writers can catch the error. */
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244 configASSERT( uxCriticalNesting == ~0UL );
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245 portDISABLE_INTERRUPTS();
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246 while( ulDummy == 0 )
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248 /* This file calls prvTaskExitError() after the scheduler has been
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249 started to remove a compiler warning about the function being defined
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250 but never called. ulDummy is used purely to quieten other warnings
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251 about code appearing after this function is called - making ulDummy
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252 volatile makes the compiler think the function could return and
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253 therefore not output an 'unreachable code' warning for code that appears
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257 /*-----------------------------------------------------------*/
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259 void vPortSVCHandler( void )
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262 " ldr r3, pxCurrentTCBConst2 \n" /* Restore the context. */
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263 " ldr r1, [r3] \n" /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */
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264 " ldr r0, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. */
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265 " ldmia r0!, {r4-r11} \n" /* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */
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266 " msr psp, r0 \n" /* Restore the task stack pointer. */
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269 " msr basepri, r0 \n"
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270 " orr r14, #0xd \n"
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274 "pxCurrentTCBConst2: .word pxCurrentTCB \n"
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277 /*-----------------------------------------------------------*/
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279 static void prvPortStartFirstTask( void )
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282 " ldr r0, =0xE000ED08 \n" /* Use the NVIC offset register to locate the stack. */
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285 " msr msp, r0 \n" /* Set the msp back to the start of the stack. */
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286 " cpsie i \n" /* Globally enable interrupts. */
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290 " svc 0 \n" /* System call to start first task. */
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294 /*-----------------------------------------------------------*/
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297 * See header file for description.
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299 BaseType_t xPortStartScheduler( void )
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301 /* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.
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302 See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
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303 configASSERT( configMAX_SYSCALL_INTERRUPT_PRIORITY );
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305 #if( configASSERT_DEFINED == 1 )
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307 volatile uint32_t ulOriginalPriority;
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308 volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
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309 volatile uint8_t ucMaxPriorityValue;
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311 /* Determine the maximum priority from which ISR safe FreeRTOS API
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312 functions can be called. ISR safe functions are those that end in
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313 "FromISR". FreeRTOS maintains separate thread and ISR API functions to
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314 ensure interrupt entry is as fast and simple as possible.
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316 Save the interrupt priority value that is about to be clobbered. */
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317 ulOriginalPriority = *pucFirstUserPriorityRegister;
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319 /* Determine the number of priority bits available. First write to all
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321 *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
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323 /* Read the value back to see how many bits stuck. */
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324 ucMaxPriorityValue = *pucFirstUserPriorityRegister;
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326 /* Use the same mask on the maximum system call priority. */
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327 ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
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329 /* Calculate the maximum acceptable priority group value for the number
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330 of bits read back. */
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331 ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
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332 while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
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334 ulMaxPRIGROUPValue--;
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335 ucMaxPriorityValue <<= ( uint8_t ) 0x01;
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338 #ifdef __NVIC_PRIO_BITS
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340 /* Check the CMSIS configuration that defines the number of
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341 priority bits matches the number of priority bits actually queried
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342 from the hardware. */
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343 configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == __NVIC_PRIO_BITS );
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347 #ifdef configPRIO_BITS
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349 /* Check the FreeRTOS configuration that defines the number of
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350 priority bits matches the number of priority bits actually queried
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351 from the hardware. */
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352 configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
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356 /* Shift the priority group value back to its position within the AIRCR
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358 ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
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359 ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
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361 /* Restore the clobbered interrupt priority register to its original
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363 *pucFirstUserPriorityRegister = ulOriginalPriority;
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365 #endif /* conifgASSERT_DEFINED */
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367 /* Make PendSV and SysTick the lowest priority interrupts. */
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368 portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
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369 portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
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371 /* Start the timer that generates the tick ISR. Interrupts are disabled
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373 vPortSetupTimerInterrupt();
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375 /* Initialise the critical nesting count ready for the first task. */
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376 uxCriticalNesting = 0;
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378 /* Start the first task. */
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379 prvPortStartFirstTask();
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381 /* Should never get here as the tasks will now be executing! Call the task
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382 exit error function to prevent compiler warnings about a static function
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383 not being called in the case that the application writer overrides this
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384 functionality by defining configTASK_RETURN_ADDRESS. Call
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385 vTaskSwitchContext() so link time optimisation does not remove the
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387 vTaskSwitchContext();
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388 prvTaskExitError();
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390 /* Should not get here! */
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393 /*-----------------------------------------------------------*/
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395 void vPortEndScheduler( void )
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397 /* Not implemented in ports where there is nothing to return to.
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398 Artificially force an assert. */
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399 configASSERT( uxCriticalNesting == 1000UL );
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401 /*-----------------------------------------------------------*/
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403 void vPortEnterCritical( void )
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405 portDISABLE_INTERRUPTS();
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406 uxCriticalNesting++;
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408 /* This is not the interrupt safe version of the enter critical function so
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409 assert() if it is being called from an interrupt context. Only API
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410 functions that end in "FromISR" can be used in an interrupt. Only assert if
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411 the critical nesting count is 1 to protect against recursive calls if the
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412 assert function also uses a critical section. */
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413 if( uxCriticalNesting == 1 )
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415 configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
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418 /*-----------------------------------------------------------*/
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420 void vPortExitCritical( void )
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422 configASSERT( uxCriticalNesting );
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423 uxCriticalNesting--;
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424 if( uxCriticalNesting == 0 )
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426 portENABLE_INTERRUPTS();
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429 /*-----------------------------------------------------------*/
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431 void xPortPendSVHandler( void )
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433 /* This is a naked function. */
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440 " ldr r3, pxCurrentTCBConst \n" /* Get the location of the current TCB. */
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443 " stmdb r0!, {r4-r11} \n" /* Save the remaining registers. */
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444 " str r0, [r2] \n" /* Save the new top of stack into the first member of the TCB. */
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446 " stmdb sp!, {r3, r14} \n"
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448 " msr basepri, r0 \n"
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449 " bl vTaskSwitchContext \n"
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451 " msr basepri, r0 \n"
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452 " ldmia sp!, {r3, r14} \n"
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453 " \n" /* Restore the context, including the critical nesting count. */
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455 " ldr r0, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. */
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456 " ldmia r0!, {r4-r11} \n" /* Pop the registers. */
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462 "pxCurrentTCBConst: .word pxCurrentTCB \n"
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463 ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)
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466 /*-----------------------------------------------------------*/
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468 void xPortSysTickHandler( void )
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470 /* The SysTick runs at the lowest interrupt priority, so when this interrupt
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471 executes all interrupts must be unmasked. There is therefore no need to
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472 save and then restore the interrupt mask value as its value is already
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474 portDISABLE_INTERRUPTS();
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476 /* Increment the RTOS tick. */
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477 if( xTaskIncrementTick() != pdFALSE )
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479 /* A context switch is required. Context switching is performed in
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480 the PendSV interrupt. Pend the PendSV interrupt. */
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481 portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
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484 portENABLE_INTERRUPTS();
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486 /*-----------------------------------------------------------*/
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488 #if( configUSE_TICKLESS_IDLE == 1 )
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490 __attribute__((weak)) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
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492 uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
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493 TickType_t xModifiableIdleTime;
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495 /* Make sure the SysTick reload value does not overflow the counter. */
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496 if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
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498 xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
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501 /* Stop the SysTick momentarily. The time the SysTick is stopped for
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502 is accounted for as best it can be, but using the tickless mode will
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503 inevitably result in some tiny drift of the time maintained by the
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504 kernel with respect to calendar time. */
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505 portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
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507 /* Calculate the reload value required to wait xExpectedIdleTime
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508 tick periods. -1 is used because this code will execute part way
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509 through one of the tick periods. */
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510 ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
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511 if( ulReloadValue > ulStoppedTimerCompensation )
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513 ulReloadValue -= ulStoppedTimerCompensation;
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516 /* Enter a critical section but don't use the taskENTER_CRITICAL()
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517 method as that will mask interrupts that should exit sleep mode. */
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518 __asm volatile( "cpsid i" ::: "memory" );
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519 __asm volatile( "dsb" );
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520 __asm volatile( "isb" );
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522 /* If a context switch is pending or a task is waiting for the scheduler
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523 to be unsuspended then abandon the low power entry. */
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524 if( eTaskConfirmSleepModeStatus() == eAbortSleep )
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526 /* Restart from whatever is left in the count register to complete
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527 this tick period. */
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528 portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
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530 /* Restart SysTick. */
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531 portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
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533 /* Reset the reload register to the value required for normal tick
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535 portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
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537 /* Re-enable interrupts - see comments above the cpsid instruction()
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539 __asm volatile( "cpsie i" ::: "memory" );
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543 /* Set the new reload value. */
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544 portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
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546 /* Clear the SysTick count flag and set the count value back to
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548 portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
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550 /* Restart SysTick. */
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551 portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
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553 /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
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554 set its parameter to 0 to indicate that its implementation contains
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555 its own wait for interrupt or wait for event instruction, and so wfi
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556 should not be executed again. However, the original expected idle
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557 time variable must remain unmodified, so a copy is taken. */
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558 xModifiableIdleTime = xExpectedIdleTime;
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559 configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
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560 if( xModifiableIdleTime > 0 )
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562 __asm volatile( "dsb" ::: "memory" );
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563 __asm volatile( "wfi" );
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564 __asm volatile( "isb" );
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566 configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
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568 /* Re-enable interrupts to allow the interrupt that brought the MCU
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569 out of sleep mode to execute immediately. see comments above
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570 __disable_interrupt() call above. */
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571 __asm volatile( "cpsie i" ::: "memory" );
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572 __asm volatile( "dsb" );
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573 __asm volatile( "isb" );
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575 /* Disable interrupts again because the clock is about to be stopped
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576 and interrupts that execute while the clock is stopped will increase
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577 any slippage between the time maintained by the RTOS and calendar
\r
579 __asm volatile( "cpsid i" ::: "memory" );
\r
580 __asm volatile( "dsb" );
\r
581 __asm volatile( "isb" );
\r
583 /* Disable the SysTick clock without reading the
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584 portNVIC_SYSTICK_CTRL_REG register to ensure the
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585 portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set. Again,
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586 the time the SysTick is stopped for is accounted for as best it can
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587 be, but using the tickless mode will inevitably result in some tiny
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588 drift of the time maintained by the kernel with respect to calendar
\r
590 portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
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592 /* Determine if the SysTick clock has already counted to zero and
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593 been set back to the current reload value (the reload back being
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594 correct for the entire expected idle time) or if the SysTick is yet
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595 to count to zero (in which case an interrupt other than the SysTick
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596 must have brought the system out of sleep mode). */
\r
597 if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
\r
599 uint32_t ulCalculatedLoadValue;
\r
601 /* The tick interrupt is already pending, and the SysTick count
\r
602 reloaded with ulReloadValue. Reset the
\r
603 portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
\r
605 ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
\r
607 /* Don't allow a tiny value, or values that have somehow
\r
608 underflowed because the post sleep hook did something
\r
609 that took too long. */
\r
610 if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
\r
612 ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
\r
615 portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
\r
617 /* As the pending tick will be processed as soon as this
\r
618 function exits, the tick value maintained by the tick is stepped
\r
619 forward by one less than the time spent waiting. */
\r
620 ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
\r
624 /* Something other than the tick interrupt ended the sleep.
\r
625 Work out how long the sleep lasted rounded to complete tick
\r
626 periods (not the ulReload value which accounted for part
\r
628 ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
\r
630 /* How many complete tick periods passed while the processor
\r
632 ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
\r
634 /* The reload value is set to whatever fraction of a single tick
\r
636 portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
\r
639 /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
\r
640 again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
\r
642 portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
\r
643 portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
\r
644 vTaskStepTick( ulCompleteTickPeriods );
\r
645 portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
\r
647 /* Exit with interrpts enabled. */
\r
648 __asm volatile( "cpsie i" ::: "memory" );
\r
652 #endif /* configUSE_TICKLESS_IDLE */
\r
653 /*-----------------------------------------------------------*/
\r
656 * Setup the systick timer to generate the tick interrupts at the required
\r
659 __attribute__(( weak )) void vPortSetupTimerInterrupt( void )
\r
661 /* Calculate the constants required to configure the tick interrupt. */
\r
662 #if( configUSE_TICKLESS_IDLE == 1 )
\r
664 ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
\r
665 xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
\r
666 ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
\r
668 #endif /* configUSE_TICKLESS_IDLE */
\r
670 /* Stop and clear the SysTick. */
\r
671 portNVIC_SYSTICK_CTRL_REG = 0UL;
\r
672 portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
\r
674 /* Configure SysTick to interrupt at the requested rate. */
\r
675 portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
\r
676 portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
\r
678 /*-----------------------------------------------------------*/
\r
680 #if( configASSERT_DEFINED == 1 )
\r
682 void vPortValidateInterruptPriority( void )
\r
684 uint32_t ulCurrentInterrupt;
\r
685 uint8_t ucCurrentPriority;
\r
687 /* Obtain the number of the currently executing interrupt. */
\r
688 __asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );
\r
690 /* Is the interrupt number a user defined interrupt? */
\r
691 if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
\r
693 /* Look up the interrupt's priority. */
\r
694 ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
\r
696 /* The following assertion will fail if a service routine (ISR) for
\r
697 an interrupt that has been assigned a priority above
\r
698 configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
\r
699 function. ISR safe FreeRTOS API functions must *only* be called
\r
700 from interrupts that have been assigned a priority at or below
\r
701 configMAX_SYSCALL_INTERRUPT_PRIORITY.
\r
703 Numerically low interrupt priority numbers represent logically high
\r
704 interrupt priorities, therefore the priority of the interrupt must
\r
705 be set to a value equal to or numerically *higher* than
\r
706 configMAX_SYSCALL_INTERRUPT_PRIORITY.
\r
708 Interrupts that use the FreeRTOS API must not be left at their
\r
709 default priority of zero as that is the highest possible priority,
\r
710 which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
\r
711 and therefore also guaranteed to be invalid.
\r
713 FreeRTOS maintains separate thread and ISR API functions to ensure
\r
714 interrupt entry is as fast and simple as possible.
\r
716 The following links provide detailed information:
\r
717 http://www.freertos.org/RTOS-Cortex-M3-M4.html
\r
718 http://www.freertos.org/FAQHelp.html */
\r
719 configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
\r
722 /* Priority grouping: The interrupt controller (NVIC) allows the bits
\r
723 that define each interrupt's priority to be split between bits that
\r
724 define the interrupt's pre-emption priority bits and bits that define
\r
725 the interrupt's sub-priority. For simplicity all bits must be defined
\r
726 to be pre-emption priority bits. The following assertion will fail if
\r
727 this is not the case (if some bits represent a sub-priority).
\r
729 If the application only uses CMSIS libraries for interrupt
\r
730 configuration then the correct setting can be achieved on all Cortex-M
\r
731 devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
\r
732 scheduler. Note however that some vendor specific peripheral libraries
\r
733 assume a non-zero priority group setting, in which cases using a value
\r
734 of zero will result in unpredictable behaviour. */
\r
735 configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
\r
738 #endif /* configASSERT_DEFINED */
\r