2 FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
\r
5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
\r
7 ***************************************************************************
\r
9 * FreeRTOS provides completely free yet professionally developed, *
\r
10 * robust, strictly quality controlled, supported, and cross *
\r
11 * platform software that has become a de facto standard. *
\r
13 * Help yourself get started quickly and support the FreeRTOS *
\r
14 * project by purchasing a FreeRTOS tutorial book, reference *
\r
15 * manual, or both from: http://www.FreeRTOS.org/Documentation *
\r
19 ***************************************************************************
\r
21 This file is part of the FreeRTOS distribution.
\r
23 FreeRTOS is free software; you can redistribute it and/or modify it under
\r
24 the terms of the GNU General Public License (version 2) as published by the
\r
25 Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
\r
27 >>! NOTE: The modification to the GPL is included to allow you to distribute
\r
28 >>! a combined work that includes FreeRTOS without being obliged to provide
\r
29 >>! the source code for proprietary components outside of the FreeRTOS
\r
32 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
\r
33 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
\r
34 FOR A PARTICULAR PURPOSE. Full license text is available from the following
\r
35 link: http://www.freertos.org/a00114.html
\r
39 ***************************************************************************
\r
41 * Having a problem? Start by reading the FAQ "My application does *
\r
42 * not run, what could be wrong?" *
\r
44 * http://www.FreeRTOS.org/FAQHelp.html *
\r
46 ***************************************************************************
\r
48 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
\r
49 license and Real Time Engineers Ltd. contact details.
\r
51 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
\r
52 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
\r
53 compatible FAT file system, and our tiny thread aware UDP/IP stack.
\r
55 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
\r
56 Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
\r
57 licenses offer ticketed support, indemnification and middleware.
\r
59 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
\r
60 engineered and independently SIL3 certified version for use in safety and
\r
61 mission critical applications that require provable dependability.
\r
66 /*-----------------------------------------------------------
\r
67 * Implementation of functions defined in portable.h for the ARM CM3 port.
\r
68 *----------------------------------------------------------*/
\r
70 /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
\r
71 all the API functions to use the MPU wrappers. That should only be done when
\r
72 task.h is included from an application file. */
\r
73 #define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
\r
75 /* Scheduler includes. */
\r
76 #include "FreeRTOS.h"
\r
80 #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
\r
82 /* Constants required to access and manipulate the NVIC. */
\r
83 #define portNVIC_SYSTICK_CTRL ( ( volatile uint32_t * ) 0xe000e010 )
\r
84 #define portNVIC_SYSTICK_LOAD ( ( volatile uint32_t * ) 0xe000e014 )
\r
85 #define portNVIC_SYSPRI2 ( ( volatile uint32_t * ) 0xe000ed20 )
\r
86 #define portNVIC_SYSPRI1 ( ( volatile uint32_t * ) 0xe000ed1c )
\r
87 #define portNVIC_SYS_CTRL_STATE ( ( volatile uint32_t * ) 0xe000ed24 )
\r
88 #define portNVIC_MEM_FAULT_ENABLE ( 1UL << 16UL )
\r
90 /* Constants required to access and manipulate the MPU. */
\r
91 #define portMPU_TYPE ( ( volatile uint32_t * ) 0xe000ed90 )
\r
92 #define portMPU_REGION_BASE_ADDRESS ( ( volatile uint32_t * ) 0xe000ed9C )
\r
93 #define portMPU_REGION_ATTRIBUTE ( ( volatile uint32_t * ) 0xe000edA0 )
\r
94 #define portMPU_CTRL ( ( volatile uint32_t * ) 0xe000ed94 )
\r
95 #define portEXPECTED_MPU_TYPE_VALUE ( 8UL << 8UL ) /* 8 regions, unified. */
\r
96 #define portMPU_ENABLE ( 0x01UL )
\r
97 #define portMPU_BACKGROUND_ENABLE ( 1UL << 2UL )
\r
98 #define portPRIVILEGED_EXECUTION_START_ADDRESS ( 0UL )
\r
99 #define portMPU_REGION_VALID ( 0x10UL )
\r
100 #define portMPU_REGION_ENABLE ( 0x01UL )
\r
101 #define portPERIPHERALS_START_ADDRESS 0x40000000UL
\r
102 #define portPERIPHERALS_END_ADDRESS 0x5FFFFFFFUL
\r
104 /* Constants required to access and manipulate the SysTick. */
\r
105 #define portNVIC_SYSTICK_CLK ( 0x00000004UL )
\r
106 #define portNVIC_SYSTICK_INT ( 0x00000002UL )
\r
107 #define portNVIC_SYSTICK_ENABLE ( 0x00000001UL )
\r
108 #define portNVIC_PENDSV_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
\r
109 #define portNVIC_SYSTICK_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
\r
110 #define portNVIC_SVC_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
\r
112 /* Constants required to set up the initial stack. */
\r
113 #define portINITIAL_XPSR ( 0x01000000 )
\r
114 #define portINITIAL_CONTROL_IF_UNPRIVILEGED ( 0x03 )
\r
115 #define portINITIAL_CONTROL_IF_PRIVILEGED ( 0x02 )
\r
117 /* Offsets in the stack to the parameters when inside the SVC handler. */
\r
118 #define portOFFSET_TO_PC ( 6 )
\r
120 /* Set the privilege level to user mode if xRunningPrivileged is false. */
\r
121 #define portRESET_PRIVILEGE( xRunningPrivileged ) if( xRunningPrivileged != pdTRUE ) __asm volatile ( " mrs r0, control \n orr r0, #1 \n msr control, r0" :::"r0" )
\r
123 /* Each task maintains its own interrupt status in the critical nesting
\r
124 variable. Note this is not saved as part of the task context as context
\r
125 switches can only occur when uxCriticalNesting is zero. */
\r
126 static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
\r
129 * Setup the timer to generate the tick interrupts.
\r
131 static void prvSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;
\r
134 * Configure a number of standard MPU regions that are used by all tasks.
\r
136 static void prvSetupMPU( void ) PRIVILEGED_FUNCTION;
\r
139 * Return the smallest MPU region size that a given number of bytes will fit
\r
140 * into. The region size is returned as the value that should be programmed
\r
141 * into the region attribute register for that region.
\r
143 static uint32_t prvGetMPURegionSizeSetting( uint32_t ulActualSizeInBytes ) PRIVILEGED_FUNCTION;
\r
146 * Checks to see if being called from the context of an unprivileged task, and
\r
147 * if so raises the privilege level and returns false - otherwise does nothing
\r
148 * other than return true.
\r
150 static BaseType_t prvRaisePrivilege( void ) __attribute__(( naked ));
\r
153 * Standard FreeRTOS exception handlers.
\r
155 void xPortPendSVHandler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
\r
156 void xPortSysTickHandler( void ) __attribute__ ((optimize("3"))) PRIVILEGED_FUNCTION;
\r
157 void vPortSVCHandler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
\r
160 * Starts the scheduler by restoring the context of the first task to run.
\r
162 static void prvRestoreContextOfFirstTask( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION;
\r
165 * C portion of the SVC handler. The SVC handler is split between an asm entry
\r
166 * and a C wrapper for simplicity of coding and maintenance.
\r
168 static void prvSVCHandler( uint32_t *pulRegisters ) __attribute__(( noinline )) PRIVILEGED_FUNCTION;
\r
171 * Prototypes for all the MPU wrappers.
\r
173 BaseType_t MPU_xTaskGenericCreate( TaskFunction_t pvTaskCode, const char * const pcName, uint16_t usStackDepth, void *pvParameters, UBaseType_t uxPriority, TaskHandle_t *pxCreatedTask, StackType_t *puxStackBuffer, const MemoryRegion_t * const xRegions );
\r
174 void MPU_vTaskAllocateMPURegions( TaskHandle_t xTask, const MemoryRegion_t * const xRegions );
\r
175 void MPU_vTaskDelete( TaskHandle_t pxTaskToDelete );
\r
176 void MPU_vTaskDelayUntil( TickType_t * const pxPreviousWakeTime, TickType_t xTimeIncrement );
\r
177 void MPU_vTaskDelay( TickType_t xTicksToDelay );
\r
178 UBaseType_t MPU_uxTaskPriorityGet( TaskHandle_t pxTask );
\r
179 void MPU_vTaskPrioritySet( TaskHandle_t pxTask, UBaseType_t uxNewPriority );
\r
180 eTaskState MPU_eTaskGetState( TaskHandle_t pxTask );
\r
181 void MPU_vTaskSuspend( TaskHandle_t pxTaskToSuspend );
\r
182 BaseType_t MPU_xTaskIsTaskSuspended( TaskHandle_t xTask );
\r
183 void MPU_vTaskResume( TaskHandle_t pxTaskToResume );
\r
184 void MPU_vTaskSuspendAll( void );
\r
185 BaseType_t MPU_xTaskResumeAll( void );
\r
186 TickType_t MPU_xTaskGetTickCount( void );
\r
187 UBaseType_t MPU_uxTaskGetNumberOfTasks( void );
\r
188 void MPU_vTaskList( char *pcWriteBuffer );
\r
189 void MPU_vTaskGetRunTimeStats( char *pcWriteBuffer );
\r
190 void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, TaskHookFunction_t pxTagValue );
\r
191 TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask );
\r
192 BaseType_t MPU_xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter );
\r
193 UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask );
\r
194 TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void );
\r
195 BaseType_t MPU_xTaskGetSchedulerState( void );
\r
196 TaskHandle_t MPU_xTaskGetIdleTaskHandle( void );
\r
197 UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t *pxTaskStatusArray, UBaseType_t uxArraySize, uint32_t *pulTotalRunTime );
\r
198 QueueHandle_t MPU_xQueueGenericCreate( UBaseType_t uxQueueLength, UBaseType_t uxItemSize, uint8_t ucQueueType );
\r
199 BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, BaseType_t xCopyPosition );
\r
200 BaseType_t MPU_xQueueGenericReset( QueueHandle_t pxQueue, BaseType_t xNewQueue );
\r
201 UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t pxQueue );
\r
202 BaseType_t MPU_xQueueGenericReceive( QueueHandle_t pxQueue, void * const pvBuffer, TickType_t xTicksToWait, BaseType_t xJustPeeking );
\r
203 QueueHandle_t MPU_xQueueCreateMutex( void );
\r
204 QueueHandle_t MPU_xQueueCreateCountingSemaphore( UBaseType_t uxCountValue, UBaseType_t uxInitialCount );
\r
205 BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, TickType_t xBlockTime );
\r
206 BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t xMutex );
\r
207 BaseType_t MPU_xQueueAltGenericSend( QueueHandle_t pxQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, BaseType_t xCopyPosition );
\r
208 BaseType_t MPU_xQueueAltGenericReceive( QueueHandle_t pxQueue, void * const pvBuffer, TickType_t xTicksToWait, BaseType_t xJustPeeking );
\r
209 void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, char *pcName );
\r
210 void MPU_vQueueDelete( QueueHandle_t xQueue );
\r
211 void *MPU_pvPortMalloc( size_t xSize );
\r
212 void MPU_vPortFree( void *pv );
\r
213 void MPU_vPortInitialiseBlocks( void );
\r
214 size_t MPU_xPortGetFreeHeapSize( void );
\r
215 QueueSetHandle_t MPU_xQueueCreateSet( UBaseType_t uxEventQueueLength );
\r
216 QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, TickType_t xBlockTimeTicks );
\r
217 BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet );
\r
218 BaseType_t MPU_xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet );
\r
219 BaseType_t MPU_xQueuePeekFromISR( QueueHandle_t xQueue, void * const pvBuffer );
\r
221 /*-----------------------------------------------------------*/
\r
224 * See header file for description.
\r
226 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters, BaseType_t xRunPrivileged )
\r
228 /* Simulate the stack frame as it would be created by a context switch
\r
230 pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
\r
231 *pxTopOfStack = portINITIAL_XPSR; /* xPSR */
\r
233 *pxTopOfStack = ( StackType_t ) pxCode; /* PC */
\r
235 *pxTopOfStack = 0; /* LR */
\r
236 pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
\r
237 *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
\r
238 pxTopOfStack -= 9; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
\r
240 if( xRunPrivileged == pdTRUE )
\r
242 *pxTopOfStack = portINITIAL_CONTROL_IF_PRIVILEGED;
\r
246 *pxTopOfStack = portINITIAL_CONTROL_IF_UNPRIVILEGED;
\r
249 return pxTopOfStack;
\r
251 /*-----------------------------------------------------------*/
\r
253 void vPortSVCHandler( void )
\r
255 /* Assumes psp was in use. */
\r
258 #ifndef USE_PROCESS_STACK /* Code should not be required if a main() is using the process stack. */
\r
261 " mrseq r0, msp \n"
\r
262 " mrsne r0, psp \n"
\r
267 ::"i"(prvSVCHandler):"r0"
\r
270 /*-----------------------------------------------------------*/
\r
272 static void prvSVCHandler( uint32_t *pulParam )
\r
274 uint8_t ucSVCNumber;
\r
276 /* The stack contains: r0, r1, r2, r3, r12, r14, the return address and
\r
277 xPSR. The first argument (r0) is pulParam[ 0 ]. */
\r
278 ucSVCNumber = ( ( uint8_t * ) pulParam[ portOFFSET_TO_PC ] )[ -2 ];
\r
279 switch( ucSVCNumber )
\r
281 case portSVC_START_SCHEDULER : *(portNVIC_SYSPRI1) |= portNVIC_SVC_PRI;
\r
282 prvRestoreContextOfFirstTask();
\r
285 case portSVC_YIELD : *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
\r
286 /* Barriers are normally not required
\r
287 but do ensure the code is completely
\r
288 within the specified behaviour for the
\r
290 __asm volatile( "dsb" );
\r
291 __asm volatile( "isb" );
\r
295 case portSVC_RAISE_PRIVILEGE : __asm volatile
\r
297 " mrs r1, control \n" /* Obtain current control value. */
\r
298 " bic r1, #1 \n" /* Set privilege bit. */
\r
299 " msr control, r1 \n" /* Write back new control value. */
\r
304 default : /* Unknown SVC call. */
\r
308 /*-----------------------------------------------------------*/
\r
310 static void prvRestoreContextOfFirstTask( void )
\r
314 " ldr r0, =0xE000ED08 \n" /* Use the NVIC offset register to locate the stack. */
\r
317 " msr msp, r0 \n" /* Set the msp back to the start of the stack. */
\r
318 " ldr r3, pxCurrentTCBConst2 \n" /* Restore the context. */
\r
320 " ldr r0, [r1] \n" /* The first item in the TCB is the task top of stack. */
\r
321 " add r1, r1, #4 \n" /* Move onto the second item in the TCB... */
\r
322 " ldr r2, =0xe000ed9c \n" /* Region Base Address register. */
\r
323 " ldmia r1!, {r4-r11} \n" /* Read 4 sets of MPU registers. */
\r
324 " stmia r2!, {r4-r11} \n" /* Write 4 sets of MPU registers. */
\r
325 " ldmia r0!, {r3, r4-r11} \n" /* Pop the registers that are not automatically saved on exception entry. */
\r
326 " msr control, r3 \n"
\r
327 " msr psp, r0 \n" /* Restore the task stack pointer. */
\r
329 " msr basepri, r0 \n"
\r
330 " ldr r14, =0xfffffffd \n" /* Load exec return code. */
\r
334 "pxCurrentTCBConst2: .word pxCurrentTCB \n"
\r
337 /*-----------------------------------------------------------*/
\r
340 * See header file for description.
\r
342 BaseType_t xPortStartScheduler( void )
\r
344 /* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0. See
\r
345 http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
\r
346 configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) );
\r
348 /* Make PendSV and SysTick the same priority as the kernel. */
\r
349 *(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;
\r
350 *(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;
\r
352 /* Configure the regions in the MPU that are common to all tasks. */
\r
355 /* Start the timer that generates the tick ISR. Interrupts are disabled
\r
357 prvSetupTimerInterrupt();
\r
359 /* Initialise the critical nesting count ready for the first task. */
\r
360 uxCriticalNesting = 0;
\r
362 /* Start the first task. */
\r
363 __asm volatile( " svc %0 \n"
\r
364 :: "i" (portSVC_START_SCHEDULER) );
\r
366 /* Should not get here! */
\r
369 /*-----------------------------------------------------------*/
\r
371 void vPortEndScheduler( void )
\r
373 /* Not implemented in ports where there is nothing to return to.
\r
374 Artificially force an assert. */
\r
375 configASSERT( uxCriticalNesting == 1000UL );
\r
377 /*-----------------------------------------------------------*/
\r
379 void vPortEnterCritical( void )
\r
381 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
383 portDISABLE_INTERRUPTS();
\r
384 uxCriticalNesting++;
\r
386 portRESET_PRIVILEGE( xRunningPrivileged );
\r
388 /*-----------------------------------------------------------*/
\r
390 void vPortExitCritical( void )
\r
392 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
394 configASSERT( uxCriticalNesting );
\r
395 uxCriticalNesting--;
\r
396 if( uxCriticalNesting == 0 )
\r
398 portENABLE_INTERRUPTS();
\r
400 portRESET_PRIVILEGE( xRunningPrivileged );
\r
402 /*-----------------------------------------------------------*/
\r
404 void xPortPendSVHandler( void )
\r
406 /* This is a naked function. */
\r
412 " ldr r3, pxCurrentTCBConst \n" /* Get the location of the current TCB. */
\r
415 " mrs r1, control \n"
\r
416 " stmdb r0!, {r1, r4-r11} \n" /* Save the remaining registers. */
\r
417 " str r0, [r2] \n" /* Save the new top of stack into the first member of the TCB. */
\r
419 " stmdb sp!, {r3, r14} \n"
\r
421 " msr basepri, r0 \n"
\r
422 " bl vTaskSwitchContext \n"
\r
424 " msr basepri, r0 \n"
\r
425 " ldmia sp!, {r3, r14} \n"
\r
426 " \n" /* Restore the context. */
\r
428 " ldr r0, [r1] \n" /* The first item in the TCB is the task top of stack. */
\r
429 " add r1, r1, #4 \n" /* Move onto the second item in the TCB... */
\r
430 " ldr r2, =0xe000ed9c \n" /* Region Base Address register. */
\r
431 " ldmia r1!, {r4-r11} \n" /* Read 4 sets of MPU registers. */
\r
432 " stmia r2!, {r4-r11} \n" /* Write 4 sets of MPU registers. */
\r
433 " ldmia r0!, {r3, r4-r11} \n" /* Pop the registers that are not automatically saved on exception entry. */
\r
434 " msr control, r3 \n"
\r
440 "pxCurrentTCBConst: .word pxCurrentTCB \n"
\r
441 ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)
\r
444 /*-----------------------------------------------------------*/
\r
446 void xPortSysTickHandler( void )
\r
450 ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();
\r
452 /* Increment the RTOS tick. */
\r
453 if( xTaskIncrementTick() != pdFALSE )
\r
455 /* Pend a context switch. */
\r
456 *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
\r
459 portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy );
\r
461 /*-----------------------------------------------------------*/
\r
464 * Setup the systick timer to generate the tick interrupts at the required
\r
467 static void prvSetupTimerInterrupt( void )
\r
469 /* Configure SysTick to interrupt at the requested rate. */
\r
470 *(portNVIC_SYSTICK_LOAD) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
\r
471 *(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;
\r
473 /*-----------------------------------------------------------*/
\r
475 static void prvSetupMPU( void )
\r
477 extern uint32_t __privileged_functions_end__[];
\r
478 extern uint32_t __FLASH_segment_start__[];
\r
479 extern uint32_t __FLASH_segment_end__[];
\r
480 extern uint32_t __privileged_data_start__[];
\r
481 extern uint32_t __privileged_data_end__[];
\r
483 /* Check the expected MPU is present. */
\r
484 if( *portMPU_TYPE == portEXPECTED_MPU_TYPE_VALUE )
\r
486 /* First setup the entire flash for unprivileged read only access. */
\r
487 *portMPU_REGION_BASE_ADDRESS = ( ( uint32_t ) __FLASH_segment_start__ ) | /* Base address. */
\r
488 ( portMPU_REGION_VALID ) |
\r
489 ( portUNPRIVILEGED_FLASH_REGION );
\r
491 *portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_READ_ONLY ) |
\r
492 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
\r
493 ( prvGetMPURegionSizeSetting( ( uint32_t ) __FLASH_segment_end__ - ( uint32_t ) __FLASH_segment_start__ ) ) |
\r
494 ( portMPU_REGION_ENABLE );
\r
496 /* Setup the first 16K for privileged only access (even though less
\r
497 than 10K is actually being used). This is where the kernel code is
\r
499 *portMPU_REGION_BASE_ADDRESS = ( ( uint32_t ) __FLASH_segment_start__ ) | /* Base address. */
\r
500 ( portMPU_REGION_VALID ) |
\r
501 ( portPRIVILEGED_FLASH_REGION );
\r
503 *portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_PRIVILEGED_READ_ONLY ) |
\r
504 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
\r
505 ( prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_functions_end__ - ( uint32_t ) __FLASH_segment_start__ ) ) |
\r
506 ( portMPU_REGION_ENABLE );
\r
508 /* Setup the privileged data RAM region. This is where the kernel data
\r
510 *portMPU_REGION_BASE_ADDRESS = ( ( uint32_t ) __privileged_data_start__ ) | /* Base address. */
\r
511 ( portMPU_REGION_VALID ) |
\r
512 ( portPRIVILEGED_RAM_REGION );
\r
514 *portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
\r
515 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
\r
516 prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) |
\r
517 ( portMPU_REGION_ENABLE );
\r
519 /* By default allow everything to access the general peripherals. The
\r
520 system peripherals and registers are protected. */
\r
521 *portMPU_REGION_BASE_ADDRESS = ( portPERIPHERALS_START_ADDRESS ) |
\r
522 ( portMPU_REGION_VALID ) |
\r
523 ( portGENERAL_PERIPHERALS_REGION );
\r
525 *portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_READ_WRITE | portMPU_REGION_EXECUTE_NEVER ) |
\r
526 ( prvGetMPURegionSizeSetting( portPERIPHERALS_END_ADDRESS - portPERIPHERALS_START_ADDRESS ) ) |
\r
527 ( portMPU_REGION_ENABLE );
\r
529 /* Enable the memory fault exception. */
\r
530 *portNVIC_SYS_CTRL_STATE |= portNVIC_MEM_FAULT_ENABLE;
\r
532 /* Enable the MPU with the background region configured. */
\r
533 *portMPU_CTRL |= ( portMPU_ENABLE | portMPU_BACKGROUND_ENABLE );
\r
536 /*-----------------------------------------------------------*/
\r
538 static uint32_t prvGetMPURegionSizeSetting( uint32_t ulActualSizeInBytes )
\r
540 uint32_t ulRegionSize, ulReturnValue = 4;
\r
542 /* 32 is the smallest region size, 31 is the largest valid value for
\r
544 for( ulRegionSize = 32UL; ulReturnValue < 31UL; ( ulRegionSize <<= 1UL ) )
\r
546 if( ulActualSizeInBytes <= ulRegionSize )
\r
556 /* Shift the code by one before returning so it can be written directly
\r
557 into the the correct bit position of the attribute register. */
\r
558 return ( ulReturnValue << 1UL );
\r
560 /*-----------------------------------------------------------*/
\r
562 static BaseType_t prvRaisePrivilege( void )
\r
566 " mrs r0, control \n"
\r
567 " tst r0, #1 \n" /* Is the task running privileged? */
\r
569 " movne r0, #0 \n" /* CONTROL[0]!=0, return false. */
\r
570 " svcne %0 \n" /* Switch to privileged. */
\r
571 " moveq r0, #1 \n" /* CONTROL[0]==0, return true. */
\r
573 :: "i" (portSVC_RAISE_PRIVILEGE) : "r0"
\r
578 /*-----------------------------------------------------------*/
\r
580 void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, StackType_t *pxBottomOfStack, uint16_t usStackDepth )
\r
582 extern uint32_t __SRAM_segment_start__[];
\r
583 extern uint32_t __SRAM_segment_end__[];
\r
584 extern uint32_t __privileged_data_start__[];
\r
585 extern uint32_t __privileged_data_end__[];
\r
589 if( xRegions == NULL )
\r
591 /* No MPU regions are specified so allow access to all RAM. */
\r
592 xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =
\r
593 ( ( uint32_t ) __SRAM_segment_start__ ) | /* Base address. */
\r
594 ( portMPU_REGION_VALID ) |
\r
595 ( portSTACK_REGION );
\r
597 xMPUSettings->xRegion[ 0 ].ulRegionAttribute =
\r
598 ( portMPU_REGION_READ_WRITE ) |
\r
599 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
\r
600 ( prvGetMPURegionSizeSetting( ( uint32_t ) __SRAM_segment_end__ - ( uint32_t ) __SRAM_segment_start__ ) ) |
\r
601 ( portMPU_REGION_ENABLE );
\r
603 /* Re-instate the privileged only RAM region as xRegion[ 0 ] will have
\r
604 just removed the privileged only parameters. */
\r
605 xMPUSettings->xRegion[ 1 ].ulRegionBaseAddress =
\r
606 ( ( uint32_t ) __privileged_data_start__ ) | /* Base address. */
\r
607 ( portMPU_REGION_VALID ) |
\r
608 ( portSTACK_REGION + 1 );
\r
610 xMPUSettings->xRegion[ 1 ].ulRegionAttribute =
\r
611 ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
\r
612 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
\r
613 prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) |
\r
614 ( portMPU_REGION_ENABLE );
\r
616 /* Invalidate all other regions. */
\r
617 for( ul = 2; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )
\r
619 xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;
\r
620 xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;
\r
625 /* This function is called automatically when the task is created - in
\r
626 which case the stack region parameters will be valid. At all other
\r
627 times the stack parameters will not be valid and it is assumed that the
\r
628 stack region has already been configured. */
\r
629 if( usStackDepth > 0 )
\r
631 /* Define the region that allows access to the stack. */
\r
632 xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =
\r
633 ( ( uint32_t ) pxBottomOfStack ) |
\r
634 ( portMPU_REGION_VALID ) |
\r
635 ( portSTACK_REGION ); /* Region number. */
\r
637 xMPUSettings->xRegion[ 0 ].ulRegionAttribute =
\r
638 ( portMPU_REGION_READ_WRITE ) | /* Read and write. */
\r
639 ( prvGetMPURegionSizeSetting( ( uint32_t ) usStackDepth * ( uint32_t ) sizeof( StackType_t ) ) ) |
\r
640 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
\r
641 ( portMPU_REGION_ENABLE );
\r
646 for( ul = 1; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )
\r
648 if( ( xRegions[ lIndex ] ).ulLengthInBytes > 0UL )
\r
650 /* Translate the generic region definition contained in
\r
651 xRegions into the CM3 specific MPU settings that are then
\r
652 stored in xMPUSettings. */
\r
653 xMPUSettings->xRegion[ ul ].ulRegionBaseAddress =
\r
654 ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) |
\r
655 ( portMPU_REGION_VALID ) |
\r
656 ( portSTACK_REGION + ul ); /* Region number. */
\r
658 xMPUSettings->xRegion[ ul ].ulRegionAttribute =
\r
659 ( prvGetMPURegionSizeSetting( xRegions[ lIndex ].ulLengthInBytes ) ) |
\r
660 ( xRegions[ lIndex ].ulParameters ) |
\r
661 ( portMPU_REGION_ENABLE );
\r
665 /* Invalidate the region. */
\r
666 xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;
\r
667 xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;
\r
674 /*-----------------------------------------------------------*/
\r
676 BaseType_t MPU_xTaskGenericCreate( TaskFunction_t pvTaskCode, const char * const pcName, uint16_t usStackDepth, void *pvParameters, UBaseType_t uxPriority, TaskHandle_t *pxCreatedTask, StackType_t *puxStackBuffer, const MemoryRegion_t * const xRegions )
\r
678 BaseType_t xReturn;
\r
679 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
681 xReturn = xTaskGenericCreate( pvTaskCode, pcName, usStackDepth, pvParameters, uxPriority, pxCreatedTask, puxStackBuffer, xRegions );
\r
682 portRESET_PRIVILEGE( xRunningPrivileged );
\r
685 /*-----------------------------------------------------------*/
\r
687 void MPU_vTaskAllocateMPURegions( TaskHandle_t xTask, const MemoryRegion_t * const xRegions )
\r
689 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
691 vTaskAllocateMPURegions( xTask, xRegions );
\r
692 portRESET_PRIVILEGE( xRunningPrivileged );
\r
694 /*-----------------------------------------------------------*/
\r
696 #if ( INCLUDE_vTaskDelete == 1 )
\r
697 void MPU_vTaskDelete( TaskHandle_t pxTaskToDelete )
\r
699 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
701 vTaskDelete( pxTaskToDelete );
\r
702 portRESET_PRIVILEGE( xRunningPrivileged );
\r
705 /*-----------------------------------------------------------*/
\r
707 #if ( INCLUDE_vTaskDelayUntil == 1 )
\r
708 void MPU_vTaskDelayUntil( TickType_t * const pxPreviousWakeTime, TickType_t xTimeIncrement )
\r
710 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
712 vTaskDelayUntil( pxPreviousWakeTime, xTimeIncrement );
\r
713 portRESET_PRIVILEGE( xRunningPrivileged );
\r
716 /*-----------------------------------------------------------*/
\r
718 #if ( INCLUDE_vTaskDelay == 1 )
\r
719 void MPU_vTaskDelay( TickType_t xTicksToDelay )
\r
721 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
723 vTaskDelay( xTicksToDelay );
\r
724 portRESET_PRIVILEGE( xRunningPrivileged );
\r
727 /*-----------------------------------------------------------*/
\r
729 #if ( INCLUDE_uxTaskPriorityGet == 1 )
\r
730 UBaseType_t MPU_uxTaskPriorityGet( TaskHandle_t pxTask )
\r
732 UBaseType_t uxReturn;
\r
733 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
735 uxReturn = uxTaskPriorityGet( pxTask );
\r
736 portRESET_PRIVILEGE( xRunningPrivileged );
\r
740 /*-----------------------------------------------------------*/
\r
742 #if ( INCLUDE_vTaskPrioritySet == 1 )
\r
743 void MPU_vTaskPrioritySet( TaskHandle_t pxTask, UBaseType_t uxNewPriority )
\r
745 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
747 vTaskPrioritySet( pxTask, uxNewPriority );
\r
748 portRESET_PRIVILEGE( xRunningPrivileged );
\r
751 /*-----------------------------------------------------------*/
\r
753 #if ( INCLUDE_eTaskGetState == 1 )
\r
754 eTaskState MPU_eTaskGetState( TaskHandle_t pxTask )
\r
756 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
757 eTaskState eReturn;
\r
759 eReturn = eTaskGetState( pxTask );
\r
760 portRESET_PRIVILEGE( xRunningPrivileged );
\r
764 /*-----------------------------------------------------------*/
\r
766 #if ( INCLUDE_xTaskGetIdleTaskHandle == 1 )
\r
767 TaskHandle_t MPU_xTaskGetIdleTaskHandle( void )
\r
769 TaskHandle_t xReturn;
\r
770 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
772 xReturn = xTaskGetIdleTaskHandle();
\r
773 portRESET_PRIVILEGE( xRunningPrivileged );
\r
777 /*-----------------------------------------------------------*/
\r
779 #if ( INCLUDE_vTaskSuspend == 1 )
\r
780 void MPU_vTaskSuspend( TaskHandle_t pxTaskToSuspend )
\r
782 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
784 vTaskSuspend( pxTaskToSuspend );
\r
785 portRESET_PRIVILEGE( xRunningPrivileged );
\r
788 /*-----------------------------------------------------------*/
\r
790 #if ( INCLUDE_vTaskSuspend == 1 )
\r
791 BaseType_t MPU_xTaskIsTaskSuspended( TaskHandle_t xTask )
\r
793 BaseType_t xReturn;
\r
794 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
796 xReturn = xTaskIsTaskSuspended( xTask );
\r
797 portRESET_PRIVILEGE( xRunningPrivileged );
\r
801 /*-----------------------------------------------------------*/
\r
803 #if ( INCLUDE_vTaskSuspend == 1 )
\r
804 void MPU_vTaskResume( TaskHandle_t pxTaskToResume )
\r
806 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
808 vTaskResume( pxTaskToResume );
\r
809 portRESET_PRIVILEGE( xRunningPrivileged );
\r
812 /*-----------------------------------------------------------*/
\r
814 void MPU_vTaskSuspendAll( void )
\r
816 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
819 portRESET_PRIVILEGE( xRunningPrivileged );
\r
821 /*-----------------------------------------------------------*/
\r
823 BaseType_t MPU_xTaskResumeAll( void )
\r
825 BaseType_t xReturn;
\r
826 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
828 xReturn = xTaskResumeAll();
\r
829 portRESET_PRIVILEGE( xRunningPrivileged );
\r
832 /*-----------------------------------------------------------*/
\r
834 TickType_t MPU_xTaskGetTickCount( void )
\r
836 TickType_t xReturn;
\r
837 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
839 xReturn = xTaskGetTickCount();
\r
840 portRESET_PRIVILEGE( xRunningPrivileged );
\r
843 /*-----------------------------------------------------------*/
\r
845 UBaseType_t MPU_uxTaskGetNumberOfTasks( void )
\r
847 UBaseType_t uxReturn;
\r
848 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
850 uxReturn = uxTaskGetNumberOfTasks();
\r
851 portRESET_PRIVILEGE( xRunningPrivileged );
\r
854 /*-----------------------------------------------------------*/
\r
856 #if ( configUSE_TRACE_FACILITY == 1 )
\r
857 void MPU_vTaskList( char *pcWriteBuffer )
\r
859 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
861 vTaskList( pcWriteBuffer );
\r
862 portRESET_PRIVILEGE( xRunningPrivileged );
\r
865 /*-----------------------------------------------------------*/
\r
867 #if ( configGENERATE_RUN_TIME_STATS == 1 )
\r
868 void MPU_vTaskGetRunTimeStats( char *pcWriteBuffer )
\r
870 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
872 vTaskGetRunTimeStats( pcWriteBuffer );
\r
873 portRESET_PRIVILEGE( xRunningPrivileged );
\r
876 /*-----------------------------------------------------------*/
\r
878 #if ( configUSE_APPLICATION_TASK_TAG == 1 )
\r
879 void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, TaskHookFunction_t pxTagValue )
\r
881 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
883 vTaskSetApplicationTaskTag( xTask, pxTagValue );
\r
884 portRESET_PRIVILEGE( xRunningPrivileged );
\r
887 /*-----------------------------------------------------------*/
\r
889 #if ( configUSE_APPLICATION_TASK_TAG == 1 )
\r
890 TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask )
\r
892 TaskHookFunction_t xReturn;
\r
893 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
895 xReturn = xTaskGetApplicationTaskTag( xTask );
\r
896 portRESET_PRIVILEGE( xRunningPrivileged );
\r
900 /*-----------------------------------------------------------*/
\r
902 #if ( configUSE_APPLICATION_TASK_TAG == 1 )
\r
903 BaseType_t MPU_xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter )
\r
905 BaseType_t xReturn;
\r
906 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
908 xReturn = xTaskCallApplicationTaskHook( xTask, pvParameter );
\r
909 portRESET_PRIVILEGE( xRunningPrivileged );
\r
913 /*-----------------------------------------------------------*/
\r
915 #if ( configUSE_TRACE_FACILITY == 1 )
\r
916 UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t *pxTaskStatusArray, UBaseType_t uxArraySize, uint32_t *pulTotalRunTime )
\r
918 UBaseType_t uxReturn;
\r
919 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
921 uxReturn = uxTaskGetSystemState( pxTaskStatusArray, uxArraySize, pulTotalRunTime );
\r
922 portRESET_PRIVILEGE( xRunningPrivileged );
\r
926 /*-----------------------------------------------------------*/
\r
928 #if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 )
\r
929 UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask )
\r
931 UBaseType_t uxReturn;
\r
932 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
934 uxReturn = uxTaskGetStackHighWaterMark( xTask );
\r
935 portRESET_PRIVILEGE( xRunningPrivileged );
\r
939 /*-----------------------------------------------------------*/
\r
941 #if ( INCLUDE_xTaskGetCurrentTaskHandle == 1 )
\r
942 TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void )
\r
944 TaskHandle_t xReturn;
\r
945 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
947 xReturn = xTaskGetCurrentTaskHandle();
\r
948 portRESET_PRIVILEGE( xRunningPrivileged );
\r
952 /*-----------------------------------------------------------*/
\r
954 #if ( INCLUDE_xTaskGetSchedulerState == 1 )
\r
955 BaseType_t MPU_xTaskGetSchedulerState( void )
\r
957 BaseType_t xReturn;
\r
958 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
960 xReturn = xTaskGetSchedulerState();
\r
961 portRESET_PRIVILEGE( xRunningPrivileged );
\r
965 /*-----------------------------------------------------------*/
\r
967 QueueHandle_t MPU_xQueueGenericCreate( UBaseType_t uxQueueLength, UBaseType_t uxItemSize, uint8_t ucQueueType )
\r
969 QueueHandle_t xReturn;
\r
970 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
972 xReturn = xQueueGenericCreate( uxQueueLength, uxItemSize, ucQueueType );
\r
973 portRESET_PRIVILEGE( xRunningPrivileged );
\r
976 /*-----------------------------------------------------------*/
\r
978 BaseType_t MPU_xQueueGenericReset( QueueHandle_t pxQueue, BaseType_t xNewQueue )
\r
980 BaseType_t xReturn;
\r
981 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
983 xReturn = xQueueGenericReset( pxQueue, xNewQueue );
\r
984 portRESET_PRIVILEGE( xRunningPrivileged );
\r
987 /*-----------------------------------------------------------*/
\r
989 BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, BaseType_t xCopyPosition )
\r
991 BaseType_t xReturn;
\r
992 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
994 xReturn = xQueueGenericSend( xQueue, pvItemToQueue, xTicksToWait, xCopyPosition );
\r
995 portRESET_PRIVILEGE( xRunningPrivileged );
\r
998 /*-----------------------------------------------------------*/
\r
1000 UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t pxQueue )
\r
1002 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
1003 UBaseType_t uxReturn;
\r
1005 uxReturn = uxQueueMessagesWaiting( pxQueue );
\r
1006 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1009 /*-----------------------------------------------------------*/
\r
1011 BaseType_t MPU_xQueueGenericReceive( QueueHandle_t pxQueue, void * const pvBuffer, TickType_t xTicksToWait, BaseType_t xJustPeeking )
\r
1013 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
1014 BaseType_t xReturn;
\r
1016 xReturn = xQueueGenericReceive( pxQueue, pvBuffer, xTicksToWait, xJustPeeking );
\r
1017 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1020 /*-----------------------------------------------------------*/
\r
1022 BaseType_t MPU_xQueuePeekFromISR( QueueHandle_t pxQueue, void * const pvBuffer )
\r
1024 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
1025 BaseType_t xReturn;
\r
1027 xReturn = xQueuePeekFromISR( pxQueue, pvBuffer );
\r
1028 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1031 /*-----------------------------------------------------------*/
\r
1033 #if ( configUSE_MUTEXES == 1 )
\r
1034 QueueHandle_t MPU_xQueueCreateMutex( void )
\r
1036 QueueHandle_t xReturn;
\r
1037 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
1039 xReturn = xQueueCreateMutex( queueQUEUE_TYPE_MUTEX );
\r
1040 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1044 /*-----------------------------------------------------------*/
\r
1046 #if configUSE_COUNTING_SEMAPHORES == 1
\r
1047 QueueHandle_t MPU_xQueueCreateCountingSemaphore( UBaseType_t uxCountValue, UBaseType_t uxInitialCount )
\r
1049 QueueHandle_t xReturn;
\r
1050 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
1052 xReturn = xQueueCreateCountingSemaphore( uxCountValue, uxInitialCount );
\r
1053 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1057 /*-----------------------------------------------------------*/
\r
1059 #if ( configUSE_MUTEXES == 1 )
\r
1060 BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, TickType_t xBlockTime )
\r
1062 BaseType_t xReturn;
\r
1063 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
1065 xReturn = xQueueTakeMutexRecursive( xMutex, xBlockTime );
\r
1066 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1070 /*-----------------------------------------------------------*/
\r
1072 #if ( configUSE_MUTEXES == 1 )
\r
1073 BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t xMutex )
\r
1075 BaseType_t xReturn;
\r
1076 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
1078 xReturn = xQueueGiveMutexRecursive( xMutex );
\r
1079 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1083 /*-----------------------------------------------------------*/
\r
1085 #if ( configUSE_QUEUE_SETS == 1 )
\r
1086 QueueSetHandle_t MPU_xQueueCreateSet( UBaseType_t uxEventQueueLength )
\r
1088 QueueSetHandle_t xReturn;
\r
1089 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
1091 xReturn = xQueueCreateSet( uxEventQueueLength );
\r
1092 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1096 /*-----------------------------------------------------------*/
\r
1098 #if ( configUSE_QUEUE_SETS == 1 )
\r
1099 QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, TickType_t xBlockTimeTicks )
\r
1101 QueueSetMemberHandle_t xReturn;
\r
1102 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
1104 xReturn = xQueueSelectFromSet( xQueueSet, xBlockTimeTicks );
\r
1105 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1109 /*-----------------------------------------------------------*/
\r
1111 #if ( configUSE_QUEUE_SETS == 1 )
\r
1112 BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet )
\r
1114 BaseType_t xReturn;
\r
1115 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
1117 xReturn = xQueueAddToSet( xQueueOrSemaphore, xQueueSet );
\r
1118 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1122 /*-----------------------------------------------------------*/
\r
1124 #if ( configUSE_QUEUE_SETS == 1 )
\r
1125 BaseType_t MPU_xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet )
\r
1127 BaseType_t xReturn;
\r
1128 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
1130 xReturn = xQueueRemoveFromSet( xQueueOrSemaphore, xQueueSet );
\r
1131 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1135 /*-----------------------------------------------------------*/
\r
1137 #if configUSE_ALTERNATIVE_API == 1
\r
1138 BaseType_t MPU_xQueueAltGenericSend( QueueHandle_t pxQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, BaseType_t xCopyPosition )
\r
1140 BaseType_t xReturn;
\r
1141 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
1143 xReturn = BaseType_t xQueueAltGenericSend( pxQueue, pvItemToQueue, xTicksToWait, xCopyPosition );
\r
1144 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1148 /*-----------------------------------------------------------*/
\r
1150 #if configUSE_ALTERNATIVE_API == 1
\r
1151 BaseType_t MPU_xQueueAltGenericReceive( QueueHandle_t pxQueue, void * const pvBuffer, TickType_t xTicksToWait, BaseType_t xJustPeeking )
\r
1153 BaseType_t xReturn;
\r
1154 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
1156 xReturn = xQueueAltGenericReceive( pxQueue, pvBuffer, xTicksToWait, xJustPeeking );
\r
1157 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1161 /*-----------------------------------------------------------*/
\r
1163 #if configQUEUE_REGISTRY_SIZE > 0
\r
1164 void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, char *pcName )
\r
1166 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
1168 vQueueAddToRegistry( xQueue, pcName );
\r
1170 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1173 /*-----------------------------------------------------------*/
\r
1175 void MPU_vQueueDelete( QueueHandle_t xQueue )
\r
1177 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
1179 vQueueDelete( xQueue );
\r
1181 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1183 /*-----------------------------------------------------------*/
\r
1185 void *MPU_pvPortMalloc( size_t xSize )
\r
1188 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
1190 pvReturn = pvPortMalloc( xSize );
\r
1192 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1196 /*-----------------------------------------------------------*/
\r
1198 void MPU_vPortFree( void *pv )
\r
1200 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
1204 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1206 /*-----------------------------------------------------------*/
\r
1208 void MPU_vPortInitialiseBlocks( void )
\r
1210 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
1212 vPortInitialiseBlocks();
\r
1214 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1216 /*-----------------------------------------------------------*/
\r
1218 size_t MPU_xPortGetFreeHeapSize( void )
\r
1221 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
1223 xReturn = xPortGetFreeHeapSize();
\r
1225 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1230 /* Functions that the application writer wants to execute in privileged mode
\r
1231 can be defined in application_defined_privileged_functions.h. The functions
\r
1232 must take the same format as those above whereby the privilege state on exit
\r
1233 equals the privilege state on entry. For example:
\r
1235 void MPU_FunctionName( [parameters ] )
\r
1237 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
1239 FunctionName( [parameters ] );
\r
1241 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1245 #if configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS == 1
\r
1246 #include "application_defined_privileged_functions.h"
\r