git.sur5r.net Git - freertos/blob - FreeRTOS/Source/portable/GCC/ARM_CM3_MPU/port.c

   1 /*\r
   2     FreeRTOS V7.4.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
   3 \r
   4     FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME.  PLEASE VISIT\r
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   6 \r
   7     ***************************************************************************\r
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  24     ***************************************************************************\r
  25 \r
  26 \r
  27     This file is part of the FreeRTOS distribution.\r
  28 \r
  29     FreeRTOS is free software; you can redistribute it and/or modify it under\r
  30     the terms of the GNU General Public License (version 2) as published by the\r
  31     Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
  32 \r
  33     >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to\r
  34     distribute a combined work that includes FreeRTOS without being obliged to\r
  35     provide the source code for proprietary components outside of the FreeRTOS\r
  36     kernel.\r
  37 \r
  38     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
  39     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
  40     FOR A PARTICULAR PURPOSE.  See the GNU General Public License for more\r
  41     details. You should have received a copy of the GNU General Public License\r
  42     and the FreeRTOS license exception along with FreeRTOS; if not itcan be\r
  43     viewed here: http://www.freertos.org/a00114.html and also obtained by\r
  44     writing to Real Time Engineers Ltd., contact details for whom are available\r
  45     on the FreeRTOS WEB site.\r
  46 \r
  47     1 tab == 4 spaces!\r
  48 \r
  49     ***************************************************************************\r
  50      *                                                                       *\r
  51      *    Having a problem?  Start by reading the FAQ "My application does   *\r
  52      *    not run, what could be wrong?"                                     *\r
  53      *                                                                       *\r
  54      *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
  55      *                                                                       *\r
  56     ***************************************************************************\r
  57 \r
  58 \r
  59     http://www.FreeRTOS.org - Documentation, books, training, latest versions, \r
  60     license and Real Time Engineers Ltd. contact details.\r
  61 \r
  62     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
  63     including FreeRTOS+Trace - an indispensable productivity tool, and our new\r
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  65 \r
  66     http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High \r
  67     Integrity Systems, who sell the code with commercial support, \r
  68     indemnification and middleware, under the OpenRTOS brand.\r
  69     \r
  70     http://www.SafeRTOS.com - High Integrity Systems also provide a safety \r
  71     engineered and independently SIL3 certified version for use in safety and \r
  72     mission critical applications that require provable dependability.\r
  73 */\r
  74 \r
  75 /*-----------------------------------------------------------\r
  76  * Implementation of functions defined in portable.h for the ARM CM3 port.\r
  77  *----------------------------------------------------------*/\r
  78 \r
  79 /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining\r
  80 all the API functions to use the MPU wrappers.  That should only be done when\r
  81 task.h is included from an application file. */\r
  82 #define MPU_WRAPPERS_INCLUDED_FROM_API_FILE\r
  83 \r
  84 /* Scheduler includes. */\r
  85 #include "FreeRTOS.h"\r
  86 #include "task.h"\r
  87 #include "queue.h"\r
  88 \r
  89 #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE\r
  90 \r
  91 /* Constants required to access and manipulate the NVIC. */\r
  92 #define portNVIC_SYSTICK_CTRL                                   ( ( volatile unsigned long * ) 0xe000e010 )\r
  93 #define portNVIC_SYSTICK_LOAD                                   ( ( volatile unsigned long * ) 0xe000e014 )\r
  94 #define portNVIC_SYSPRI2                                                ( ( volatile unsigned long * ) 0xe000ed20 )\r
  95 #define portNVIC_SYSPRI1                                                ( ( volatile unsigned long * ) 0xe000ed1c )\r
  96 #define portNVIC_SYS_CTRL_STATE                                 ( ( volatile unsigned long * ) 0xe000ed24 )\r
  97 #define portNVIC_MEM_FAULT_ENABLE                               ( 1UL << 16UL )\r
  98 \r
  99 /* Constants required to access and manipulate the MPU. */\r
 100 #define portMPU_TYPE                                                    ( ( volatile unsigned long * ) 0xe000ed90 )\r
 101 #define portMPU_REGION_BASE_ADDRESS                             ( ( volatile unsigned long * ) 0xe000ed9C )\r
 102 #define portMPU_REGION_ATTRIBUTE                                ( ( volatile unsigned long * ) 0xe000edA0 )\r
 103 #define portMPU_CTRL                                                    ( ( volatile unsigned long * ) 0xe000ed94 )\r
 104 #define portEXPECTED_MPU_TYPE_VALUE                             ( 8UL << 8UL ) /* 8 regions, unified. */\r
 105 #define portMPU_ENABLE                                                  ( 0x01UL )\r
 106 #define portMPU_BACKGROUND_ENABLE                               ( 1UL << 2UL )\r
 107 #define portPRIVILEGED_EXECUTION_START_ADDRESS  ( 0UL )\r
 108 #define portMPU_REGION_VALID                                    ( 0x10UL )\r
 109 #define portMPU_REGION_ENABLE                                   ( 0x01UL )\r
 110 #define portPERIPHERALS_START_ADDRESS                   0x40000000UL\r
 111 #define portPERIPHERALS_END_ADDRESS                             0x5FFFFFFFUL\r
 112 \r
 113 /* Constants required to access and manipulate the SysTick. */\r
 114 #define portNVIC_SYSTICK_CLK                                    ( 0x00000004UL )\r
 115 #define portNVIC_SYSTICK_INT                                    ( 0x00000002UL )\r
 116 #define portNVIC_SYSTICK_ENABLE                                 ( 0x00000001UL )\r
 117 #define portNVIC_PENDSV_PRI                                             ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )\r
 118 #define portNVIC_SYSTICK_PRI                                    ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )\r
 119 #define portNVIC_SVC_PRI                                                ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )\r
 120 \r
 121 /* Constants required to set up the initial stack. */\r
 122 #define portINITIAL_XPSR                                                ( 0x01000000 )\r
 123 #define portINITIAL_CONTROL_IF_UNPRIVILEGED             ( 0x03 )\r
 124 #define portINITIAL_CONTROL_IF_PRIVILEGED               ( 0x02 )\r
 125 \r
 126 /* Offsets in the stack to the parameters when inside the SVC handler. */\r
 127 #define portOFFSET_TO_PC                                                ( 6 )\r
 128 \r
 129 /* Set the privilege level to user mode if xRunningPrivileged is false. */\r
 130 #define portRESET_PRIVILEGE( xRunningPrivileged ) if( xRunningPrivileged != pdTRUE ) __asm volatile ( " mrs r0, control \n orr r0, #1 \n msr control, r0" :::"r0" )\r
 131 \r
 132 /* Each task maintains its own interrupt status in the critical nesting\r
 133 variable.  Note this is not saved as part of the task context as context\r
 134 switches can only occur when uxCriticalNesting is zero. */\r
 135 static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;\r
 136 \r
 137 /*\r
 138  * Setup the timer to generate the tick interrupts.\r
 139  */\r
 140 static void prvSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;\r
 141 \r
 142 /*\r
 143  * Configure a number of standard MPU regions that are used by all tasks.\r
 144  */\r
 145 static void prvSetupMPU( void ) PRIVILEGED_FUNCTION;\r
 146 \r
 147 /*\r
 148  * Return the smallest MPU region size that a given number of bytes will fit\r
 149  * into.  The region size is returned as the value that should be programmed\r
 150  * into the region attribute register for that region.\r
 151  */\r
 152 static unsigned long prvGetMPURegionSizeSetting( unsigned long ulActualSizeInBytes ) PRIVILEGED_FUNCTION;\r
 153 \r
 154 /*\r
 155  * Checks to see if being called from the context of an unprivileged task, and\r
 156  * if so raises the privilege level and returns false - otherwise does nothing\r
 157  * other than return true.\r
 158  */\r
 159 static portBASE_TYPE prvRaisePrivilege( void ) __attribute__(( naked ));\r
 160 \r
 161 /*\r
 162  * Standard FreeRTOS exception handlers.\r
 163  */\r
 164 void xPortPendSVHandler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;\r
 165 void xPortSysTickHandler( void )  __attribute__ ((optimize("3"))) PRIVILEGED_FUNCTION;\r
 166 void vPortSVCHandler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;\r
 167 \r
 168 /*\r
 169  * Starts the scheduler by restoring the context of the first task to run.\r
 170  */\r
 171 static void prvRestoreContextOfFirstTask( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION;\r
 172 \r
 173 /*\r
 174  * C portion of the SVC handler.  The SVC handler is split between an asm entry\r
 175  * and a C wrapper for simplicity of coding and maintenance.\r
 176  */\r
 177 static void prvSVCHandler( unsigned long *pulRegisters ) __attribute__(( noinline )) PRIVILEGED_FUNCTION;\r
 178 \r
 179 /*\r
 180  * Prototypes for all the MPU wrappers.\r
 181  */\r
 182 signed portBASE_TYPE MPU_xTaskGenericCreate( pdTASK_CODE pvTaskCode, const signed char * const pcName, unsigned short usStackDepth, void *pvParameters, unsigned portBASE_TYPE uxPriority, xTaskHandle *pxCreatedTask, portSTACK_TYPE *puxStackBuffer, const xMemoryRegion * const xRegions );\r
 183 void MPU_vTaskAllocateMPURegions( xTaskHandle xTask, const xMemoryRegion * const xRegions );\r
 184 void MPU_vTaskDelete( xTaskHandle pxTaskToDelete );\r
 185 void MPU_vTaskDelayUntil( portTickType * const pxPreviousWakeTime, portTickType xTimeIncrement );\r
 186 void MPU_vTaskDelay( portTickType xTicksToDelay );\r
 187 unsigned portBASE_TYPE MPU_uxTaskPriorityGet( xTaskHandle pxTask );\r
 188 void MPU_vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority );\r
 189 eTaskState MPU_eTaskGetState( xTaskHandle pxTask );\r
 190 void MPU_vTaskSuspend( xTaskHandle pxTaskToSuspend );\r
 191 signed portBASE_TYPE MPU_xTaskIsTaskSuspended( xTaskHandle xTask );\r
 192 void MPU_vTaskResume( xTaskHandle pxTaskToResume );\r
 193 void MPU_vTaskSuspendAll( void );\r
 194 signed portBASE_TYPE MPU_xTaskResumeAll( void );\r
 195 portTickType MPU_xTaskGetTickCount( void );\r
 196 unsigned portBASE_TYPE MPU_uxTaskGetNumberOfTasks( void );\r
 197 void MPU_vTaskList( signed char *pcWriteBuffer );\r
 198 void MPU_vTaskGetRunTimeStats( signed char *pcWriteBuffer );\r
 199 void MPU_vTaskSetApplicationTaskTag( xTaskHandle xTask, pdTASK_HOOK_CODE pxTagValue );\r
 200 pdTASK_HOOK_CODE MPU_xTaskGetApplicationTaskTag( xTaskHandle xTask );\r
 201 portBASE_TYPE MPU_xTaskCallApplicationTaskHook( xTaskHandle xTask, void *pvParameter );\r
 202 unsigned portBASE_TYPE MPU_uxTaskGetStackHighWaterMark( xTaskHandle xTask );\r
 203 xTaskHandle MPU_xTaskGetCurrentTaskHandle( void );\r
 204 portBASE_TYPE MPU_xTaskGetSchedulerState( void );\r
 205 xTaskHandle MPU_xTaskGetIdleTaskHandle( void );\r
 206 xQueueHandle MPU_xQueueGenericCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize, unsigned char ucQueueType );\r
 207 signed portBASE_TYPE MPU_xQueueGenericSend( xQueueHandle xQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition );\r
 208 portBASE_TYPE MPU_xQueueGenericReset( xQueueHandle pxQueue, portBASE_TYPE xNewQueue );\r
 209 unsigned portBASE_TYPE MPU_uxQueueMessagesWaiting( const xQueueHandle pxQueue );\r
 210 signed portBASE_TYPE MPU_xQueueGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking );\r
 211 xQueueHandle MPU_xQueueCreateMutex( void );\r
 212 xQueueHandle MPU_xQueueCreateCountingSemaphore( unsigned portBASE_TYPE uxCountValue, unsigned portBASE_TYPE uxInitialCount );\r
 213 portBASE_TYPE MPU_xQueueTakeMutexRecursive( xQueueHandle xMutex, portTickType xBlockTime );\r
 214 portBASE_TYPE MPU_xQueueGiveMutexRecursive( xQueueHandle xMutex );\r
 215 signed portBASE_TYPE MPU_xQueueAltGenericSend( xQueueHandle pxQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition );\r
 216 signed portBASE_TYPE MPU_xQueueAltGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking );\r
 217 void MPU_vQueueAddToRegistry( xQueueHandle xQueue, signed char *pcName );\r
 218 void MPU_vQueueDelete( xQueueHandle xQueue );\r
 219 void *MPU_pvPortMalloc( size_t xSize );\r
 220 void MPU_vPortFree( void *pv );\r
 221 void MPU_vPortInitialiseBlocks( void );\r
 222 size_t MPU_xPortGetFreeHeapSize( void );\r
 223 xQueueSetHandle MPU_xQueueCreateSet( unsigned portBASE_TYPE uxEventQueueLength );\r
 224 xQueueSetMemberHandle MPU_xQueueSelectFromSet( xQueueSetHandle xQueueSet, portTickType xBlockTimeTicks );\r
 225 portBASE_TYPE MPU_xQueueAddToSet( xQueueSetMemberHandle xQueueOrSemaphore, xQueueSetHandle xQueueSet );\r
 226 portBASE_TYPE MPU_xQueueRemoveFromSet( xQueueSetMemberHandle xQueueOrSemaphore, xQueueSetHandle xQueueSet );\r
 227 \r
 228 /*-----------------------------------------------------------*/\r
 229 \r
 230 /*\r
 231  * See header file for description.\r
 232  */\r
 233 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters, portBASE_TYPE xRunPrivileged )\r
 234 {\r
 235         /* Simulate the stack frame as it would be created by a context switch\r
 236         interrupt. */\r
 237         pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */\r
 238         *pxTopOfStack = portINITIAL_XPSR;       /* xPSR */\r
 239         pxTopOfStack--;\r
 240         *pxTopOfStack = ( portSTACK_TYPE ) pxCode;      /* PC */\r
 241         pxTopOfStack--;\r
 242         *pxTopOfStack = 0;      /* LR */\r
 243         pxTopOfStack -= 5;      /* R12, R3, R2 and R1. */\r
 244         *pxTopOfStack = ( portSTACK_TYPE ) pvParameters;        /* R0 */\r
 245         pxTopOfStack -= 9;      /* R11, R10, R9, R8, R7, R6, R5 and R4. */\r
 246 \r
 247         if( xRunPrivileged == pdTRUE )\r
 248         {\r
 249                 *pxTopOfStack = portINITIAL_CONTROL_IF_PRIVILEGED;\r
 250         }\r
 251         else\r
 252         {\r
 253                 *pxTopOfStack = portINITIAL_CONTROL_IF_UNPRIVILEGED;\r
 254         }\r
 255 \r
 256         return pxTopOfStack;\r
 257 }\r
 258 /*-----------------------------------------------------------*/\r
 259 \r
 260 void vPortSVCHandler( void )\r
 261 {\r
 262         /* Assumes psp was in use. */\r
 263         __asm volatile\r
 264         (\r
 265                 #ifndef USE_PROCESS_STACK       /* Code should not be required if a main() is using the process stack. */\r
 266                         "       tst lr, #4                                              \n"\r
 267                         "       ite eq                                                  \n"\r
 268                         "       mrseq r0, msp                                   \n"\r
 269                         "       mrsne r0, psp                                   \n"\r
 270                 #else\r
 271                         "       mrs r0, psp                                             \n"\r
 272                 #endif\r
 273                         "       b %0                                                    \n"\r
 274                         ::"i"(prvSVCHandler):"r0"\r
 275         );\r
 276 }\r
 277 /*-----------------------------------------------------------*/\r
 278 \r
 279 static void prvSVCHandler(      unsigned long *pulParam )\r
 280 {\r
 281 unsigned char ucSVCNumber;\r
 282 \r
 283         /* The stack contains: r0, r1, r2, r3, r12, r14, the return address and\r
 284         xPSR.  The first argument (r0) is pulParam[ 0 ]. */\r
 285         ucSVCNumber = ( ( unsigned char * ) pulParam[ portOFFSET_TO_PC ] )[ -2 ];\r
 286         switch( ucSVCNumber )\r
 287         {\r
 288                 case portSVC_START_SCHEDULER    :       *(portNVIC_SYSPRI1) |= portNVIC_SVC_PRI;\r
 289                                                                                         prvRestoreContextOfFirstTask();\r
 290                                                                                         break;\r
 291 \r
 292                 case portSVC_YIELD                              :       *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;\r
 293                                                                                         break;\r
 294 \r
 295                 case portSVC_RAISE_PRIVILEGE    :       __asm volatile\r
 296                                                                                         (\r
 297                                                                                                 "       mrs r1, control         \n" /* Obtain current control value. */\r
 298                                                                                                 "       bic r1, #1                      \n" /* Set privilege bit. */\r
 299                                                                                                 "       msr control, r1         \n" /* Write back new control value. */\r
 300                                                                                                 :::"r1"\r
 301                                                                                         );\r
 302                                                                                         break;\r
 303 \r
 304                 default                                                 :       /* Unknown SVC call. */\r
 305                                                                                         break;\r
 306         }\r
 307 }\r
 308 /*-----------------------------------------------------------*/\r
 309 \r
 310 static void prvRestoreContextOfFirstTask( void )\r
 311 {\r
 312         __asm volatile\r
 313         (\r
 314                 "       ldr r0, =0xE000ED08                             \n" /* Use the NVIC offset register to locate the stack. */\r
 315                 "       ldr r0, [r0]                                    \n"\r
 316                 "       ldr r0, [r0]                                    \n"\r
 317                 "       msr msp, r0                                             \n" /* Set the msp back to the start of the stack. */\r
 318                 "       ldr     r3, pxCurrentTCBConst2          \n" /* Restore the context. */\r
 319                 "       ldr r1, [r3]                                    \n"\r
 320                 "       ldr r0, [r1]                                    \n" /* The first item in the TCB is the task top of stack. */\r
 321                 "       add r1, r1, #4                                  \n" /* Move onto the second item in the TCB... */\r
 322                 "       ldr r2, =0xe000ed9c                             \n" /* Region Base Address register. */\r
 323                 "       ldmia r1!, {r4-r11}                             \n" /* Read 4 sets of MPU registers. */\r
 324                 "       stmia r2!, {r4-r11}                             \n" /* Write 4 sets of MPU registers. */\r
 325                 "       ldmia r0!, {r3, r4-r11}                 \n" /* Pop the registers that are not automatically saved on exception entry. */\r
 326                 "       msr control, r3                                 \n"\r
 327                 "       msr psp, r0                                             \n" /* Restore the task stack pointer. */\r
 328                 "       mov r0, #0                                              \n"\r
 329                 "       msr     basepri, r0                                     \n"\r
 330                 "       ldr r14, =0xfffffffd                    \n" /* Load exec return code. */\r
 331                 "       bx r14                                                  \n"\r
 332                 "                                                                       \n"\r
 333                 "       .align 2                                                \n"\r
 334                 "pxCurrentTCBConst2: .word pxCurrentTCB \n"\r
 335         );\r
 336 }\r
 337 /*-----------------------------------------------------------*/\r
 338 \r
 339 /*\r
 340  * See header file for description.\r
 341  */\r
 342 portBASE_TYPE xPortStartScheduler( void )\r
 343 {\r
 344         /* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.  See\r
 345         http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */\r
 346         configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) );\r
 347 \r
 348         /* Make PendSV and SysTick the same priority as the kernel. */\r
 349         *(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;\r
 350         *(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;\r
 351 \r
 352         /* Configure the regions in the MPU that are common to all tasks. */\r
 353         prvSetupMPU();\r
 354 \r
 355         /* Start the timer that generates the tick ISR.  Interrupts are disabled\r
 356         here already. */\r
 357         prvSetupTimerInterrupt();\r
 358 \r
 359         /* Initialise the critical nesting count ready for the first task. */\r
 360         uxCriticalNesting = 0;\r
 361 \r
 362         /* Start the first task. */\r
 363         __asm volatile( "       svc %0                  \n"\r
 364                                         :: "i" (portSVC_START_SCHEDULER) );\r
 365 \r
 366         /* Should not get here! */\r
 367         return 0;\r
 368 }\r
 369 /*-----------------------------------------------------------*/\r
 370 \r
 371 void vPortEndScheduler( void )\r
 372 {\r
 373         /* It is unlikely that the CM3 port will require this function as there\r
 374         is nothing to return to.  */\r
 375 }\r
 376 /*-----------------------------------------------------------*/\r
 377 \r
 378 void vPortEnterCritical( void )\r
 379 {\r
 380 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 381 \r
 382         portDISABLE_INTERRUPTS();\r
 383         uxCriticalNesting++;\r
 384 \r
 385         portRESET_PRIVILEGE( xRunningPrivileged );\r
 386 }\r
 387 /*-----------------------------------------------------------*/\r
 388 \r
 389 void vPortExitCritical( void )\r
 390 {\r
 391 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 392 \r
 393         uxCriticalNesting--;\r
 394         if( uxCriticalNesting == 0 )\r
 395         {\r
 396                 portENABLE_INTERRUPTS();\r
 397         }\r
 398         portRESET_PRIVILEGE( xRunningPrivileged );\r
 399 }\r
 400 /*-----------------------------------------------------------*/\r
 401 \r
 402 void xPortPendSVHandler( void )\r
 403 {\r
 404         /* This is a naked function. */\r
 405 \r
 406         __asm volatile\r
 407         (\r
 408                 "       mrs r0, psp                                                     \n"\r
 409                 "                                                                               \n"\r
 410                 "       ldr     r3, pxCurrentTCBConst                   \n" /* Get the location of the current TCB. */\r
 411                 "       ldr     r2, [r3]                                                \n"\r
 412                 "                                                                               \n"\r
 413                 "       mrs r1, control                                         \n"\r
 414                 "       stmdb r0!, {r1, r4-r11}                         \n" /* Save the remaining registers. */\r
 415                 "       str r0, [r2]                                            \n" /* Save the new top of stack into the first member of the TCB. */\r
 416                 "                                                                               \n"\r
 417                 "       stmdb sp!, {r3, r14}                            \n"\r
 418                 "       mov r0, %0                                                      \n"\r
 419                 "       msr basepri, r0                                         \n"\r
 420                 "       bl vTaskSwitchContext                           \n"\r
 421                 "       mov r0, #0                                                      \n"\r
 422                 "       msr basepri, r0                                         \n"\r
 423                 "       ldmia sp!, {r3, r14}                            \n"\r
 424                 "                                                                               \n"     /* Restore the context. */\r
 425                 "       ldr r1, [r3]                                            \n"\r
 426                 "       ldr r0, [r1]                                            \n" /* The first item in the TCB is the task top of stack. */\r
 427                 "       add r1, r1, #4                                          \n" /* Move onto the second item in the TCB... */\r
 428                 "       ldr r2, =0xe000ed9c                                     \n" /* Region Base Address register. */\r
 429                 "       ldmia r1!, {r4-r11}                                     \n" /* Read 4 sets of MPU registers. */\r
 430                 "       stmia r2!, {r4-r11}                                     \n" /* Write 4 sets of MPU registers. */\r
 431                 "       ldmia r0!, {r3, r4-r11}                         \n" /* Pop the registers that are not automatically saved on exception entry. */\r
 432                 "       msr control, r3                                         \n"\r
 433                 "                                                                               \n"\r
 434                 "       msr psp, r0                                                     \n"\r
 435                 "       bx r14                                                          \n"\r
 436                 "                                                                               \n"\r
 437                 "       .align 2                                                        \n"\r
 438                 "pxCurrentTCBConst: .word pxCurrentTCB  \n"\r
 439                 ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)\r
 440         );\r
 441 }\r
 442 /*-----------------------------------------------------------*/\r
 443 \r
 444 void xPortSysTickHandler( void )\r
 445 {\r
 446 unsigned long ulDummy;\r
 447 \r
 448         /* If using preemption, also force a context switch. */\r
 449         #if configUSE_PREEMPTION == 1\r
 450                 *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;\r
 451         #endif\r
 452 \r
 453         ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();\r
 454         {\r
 455                 vTaskIncrementTick();\r
 456         }\r
 457         portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy );\r
 458 }\r
 459 /*-----------------------------------------------------------*/\r
 460 \r
 461 /*\r
 462  * Setup the systick timer to generate the tick interrupts at the required\r
 463  * frequency.\r
 464  */\r
 465 static void prvSetupTimerInterrupt( void )\r
 466 {\r
 467         /* Configure SysTick to interrupt at the requested rate. */\r
 468         *(portNVIC_SYSTICK_LOAD) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;\r
 469         *(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;\r
 470 }\r
 471 /*-----------------------------------------------------------*/\r
 472 \r
 473 static void prvSetupMPU( void )\r
 474 {\r
 475 extern unsigned long __privileged_functions_end__[];\r
 476 extern unsigned long __FLASH_segment_start__[];\r
 477 extern unsigned long __FLASH_segment_end__[];\r
 478 extern unsigned long __privileged_data_start__[];\r
 479 extern unsigned long __privileged_data_end__[];\r
 480 \r
 481         /* Check the expected MPU is present. */\r
 482         if( *portMPU_TYPE == portEXPECTED_MPU_TYPE_VALUE )\r
 483         {\r
 484                 /* First setup the entire flash for unprivileged read only access. */\r
 485         *portMPU_REGION_BASE_ADDRESS =  ( ( unsigned long ) __FLASH_segment_start__ ) | /* Base address. */\r
 486                                                                                 ( portMPU_REGION_VALID ) |\r
 487                                                                                 ( portUNPRIVILEGED_FLASH_REGION );\r
 488 \r
 489                 *portMPU_REGION_ATTRIBUTE =             ( portMPU_REGION_READ_ONLY ) |\r
 490                                                                                 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 491                                                                                 ( prvGetMPURegionSizeSetting( ( unsigned long ) __FLASH_segment_end__ - ( unsigned long ) __FLASH_segment_start__ ) ) |\r
 492                                                                                 ( portMPU_REGION_ENABLE );\r
 493 \r
 494                 /* Setup the first 16K for privileged only access (even though less\r
 495                 than 10K is actually being used).  This is where the kernel code is\r
 496                 placed. */\r
 497         *portMPU_REGION_BASE_ADDRESS =  ( ( unsigned long ) __FLASH_segment_start__ ) | /* Base address. */\r
 498                                                                                 ( portMPU_REGION_VALID ) |\r
 499                                                                                 ( portPRIVILEGED_FLASH_REGION );\r
 500 \r
 501                 *portMPU_REGION_ATTRIBUTE =             ( portMPU_REGION_PRIVILEGED_READ_ONLY ) |\r
 502                                                                                 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 503                                                                                 ( prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_functions_end__ - ( unsigned long ) __FLASH_segment_start__ ) ) |\r
 504                                                                                 ( portMPU_REGION_ENABLE );\r
 505 \r
 506                 /* Setup the privileged data RAM region.  This is where the kernel data\r
 507                 is placed. */\r
 508                 *portMPU_REGION_BASE_ADDRESS =  ( ( unsigned long ) __privileged_data_start__ ) | /* Base address. */\r
 509                                                                                 ( portMPU_REGION_VALID ) |\r
 510                                                                                 ( portPRIVILEGED_RAM_REGION );\r
 511 \r
 512                 *portMPU_REGION_ATTRIBUTE =             ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |\r
 513                                                                                 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 514                                                                                 prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_data_end__ - ( unsigned long ) __privileged_data_start__ ) |\r
 515                                                                                 ( portMPU_REGION_ENABLE );\r
 516 \r
 517                 /* By default allow everything to access the general peripherals.  The\r
 518                 system peripherals and registers are protected. */\r
 519                 *portMPU_REGION_BASE_ADDRESS =  ( portPERIPHERALS_START_ADDRESS ) |\r
 520                                                                                 ( portMPU_REGION_VALID ) |\r
 521                                                                                 ( portGENERAL_PERIPHERALS_REGION );\r
 522 \r
 523                 *portMPU_REGION_ATTRIBUTE =             ( portMPU_REGION_READ_WRITE | portMPU_REGION_EXECUTE_NEVER ) |\r
 524                                                                                 ( prvGetMPURegionSizeSetting( portPERIPHERALS_END_ADDRESS - portPERIPHERALS_START_ADDRESS ) ) |\r
 525                                                                                 ( portMPU_REGION_ENABLE );\r
 526 \r
 527                 /* Enable the memory fault exception. */\r
 528                 *portNVIC_SYS_CTRL_STATE |= portNVIC_MEM_FAULT_ENABLE;\r
 529 \r
 530                 /* Enable the MPU with the background region configured. */\r
 531                 *portMPU_CTRL |= ( portMPU_ENABLE | portMPU_BACKGROUND_ENABLE );\r
 532         }\r
 533 }\r
 534 /*-----------------------------------------------------------*/\r
 535 \r
 536 static unsigned long prvGetMPURegionSizeSetting( unsigned long ulActualSizeInBytes )\r
 537 {\r
 538 unsigned long ulRegionSize, ulReturnValue = 4;\r
 539 \r
 540         /* 32 is the smallest region size, 31 is the largest valid value for\r
 541         ulReturnValue. */\r
 542         for( ulRegionSize = 32UL; ulReturnValue < 31UL; ( ulRegionSize <<= 1UL ) )\r
 543         {\r
 544                 if( ulActualSizeInBytes <= ulRegionSize )\r
 545                 {\r
 546                         break;\r
 547                 }\r
 548                 else\r
 549                 {\r
 550                         ulReturnValue++;\r
 551                 }\r
 552         }\r
 553 \r
 554         /* Shift the code by one before returning so it can be written directly\r
 555         into the the correct bit position of the attribute register. */\r
 556         return ( ulReturnValue << 1UL );\r
 557 }\r
 558 /*-----------------------------------------------------------*/\r
 559 \r
 560 static portBASE_TYPE prvRaisePrivilege( void )\r
 561 {\r
 562         __asm volatile\r
 563         (\r
 564                 "       mrs r0, control                                         \n"\r
 565                 "       tst r0, #1                                                      \n" /* Is the task running privileged? */\r
 566                 "       itte ne                                                         \n"\r
 567                 "       movne r0, #0                                            \n" /* CONTROL[0]!=0, return false. */\r
 568                 "       svcne %0                                                        \n" /* Switch to privileged. */\r
 569                 "       moveq r0, #1                                            \n" /* CONTROL[0]==0, return true. */\r
 570                 "       bx lr                                                           \n"\r
 571                 :: "i" (portSVC_RAISE_PRIVILEGE) : "r0"\r
 572         );\r
 573 \r
 574         return 0;\r
 575 }\r
 576 /*-----------------------------------------------------------*/\r
 577 \r
 578 void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, portSTACK_TYPE *pxBottomOfStack, unsigned short usStackDepth )\r
 579 {\r
 580 extern unsigned long __SRAM_segment_start__[];\r
 581 extern unsigned long __SRAM_segment_end__[];\r
 582 extern unsigned long __privileged_data_start__[];\r
 583 extern unsigned long __privileged_data_end__[];\r
 584 long lIndex;\r
 585 unsigned long ul;\r
 586 \r
 587         if( xRegions == NULL )\r
 588         {\r
 589                 /* No MPU regions are specified so allow access to all RAM. */\r
 590         xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =\r
 591                                 ( ( unsigned long ) __SRAM_segment_start__ ) | /* Base address. */\r
 592                                 ( portMPU_REGION_VALID ) |\r
 593                                 ( portSTACK_REGION );\r
 594 \r
 595                 xMPUSettings->xRegion[ 0 ].ulRegionAttribute =\r
 596                                 ( portMPU_REGION_READ_WRITE ) |\r
 597                                 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 598                                 ( prvGetMPURegionSizeSetting( ( unsigned long ) __SRAM_segment_end__ - ( unsigned long ) __SRAM_segment_start__ ) ) |\r
 599                                 ( portMPU_REGION_ENABLE );\r
 600 \r
 601                 /* Re-instate the privileged only RAM region as xRegion[ 0 ] will have\r
 602                 just removed the privileged only parameters. */\r
 603                 xMPUSettings->xRegion[ 1 ].ulRegionBaseAddress =\r
 604                                 ( ( unsigned long ) __privileged_data_start__ ) | /* Base address. */\r
 605                                 ( portMPU_REGION_VALID ) |\r
 606                                 ( portSTACK_REGION + 1 );\r
 607 \r
 608                 xMPUSettings->xRegion[ 1 ].ulRegionAttribute =\r
 609                                 ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |\r
 610                                 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 611                                 prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_data_end__ - ( unsigned long ) __privileged_data_start__ ) |\r
 612                                 ( portMPU_REGION_ENABLE );\r
 613 \r
 614                 /* Invalidate all other regions. */\r
 615                 for( ul = 2; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )\r
 616                 {\r
 617                         xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;\r
 618                         xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;\r
 619                 }\r
 620         }\r
 621         else\r
 622         {\r
 623                 /* This function is called automatically when the task is created - in\r
 624                 which case the stack region parameters will be valid.  At all other\r
 625                 times the stack parameters will not be valid and it is assumed that the\r
 626                 stack region has already been configured. */\r
 627                 if( usStackDepth > 0 )\r
 628                 {\r
 629                         /* Define the region that allows access to the stack. */\r
 630                         xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =\r
 631                                         ( ( unsigned long ) pxBottomOfStack ) |\r
 632                                         ( portMPU_REGION_VALID ) |\r
 633                                         ( portSTACK_REGION ); /* Region number. */\r
 634 \r
 635                         xMPUSettings->xRegion[ 0 ].ulRegionAttribute =\r
 636                                         ( portMPU_REGION_READ_WRITE ) | /* Read and write. */\r
 637                                         ( prvGetMPURegionSizeSetting( ( unsigned long ) usStackDepth * ( unsigned long ) sizeof( portSTACK_TYPE ) ) ) |\r
 638                                         ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 639                                         ( portMPU_REGION_ENABLE );\r
 640                 }\r
 641 \r
 642                 lIndex = 0;\r
 643 \r
 644                 for( ul = 1; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )\r
 645                 {\r
 646                         if( ( xRegions[ lIndex ] ).ulLengthInBytes > 0UL )\r
 647                         {\r
 648                                 /* Translate the generic region definition contained in\r
 649                                 xRegions into the CM3 specific MPU settings that are then\r
 650                                 stored in xMPUSettings. */\r
 651                                 xMPUSettings->xRegion[ ul ].ulRegionBaseAddress =\r
 652                                                 ( ( unsigned long ) xRegions[ lIndex ].pvBaseAddress ) |\r
 653                                                 ( portMPU_REGION_VALID ) |\r
 654                                                 ( portSTACK_REGION + ul ); /* Region number. */\r
 655 \r
 656                                 xMPUSettings->xRegion[ ul ].ulRegionAttribute =\r
 657                                                 ( prvGetMPURegionSizeSetting( xRegions[ lIndex ].ulLengthInBytes ) ) |\r
 658                                                 ( xRegions[ lIndex ].ulParameters ) |\r
 659                                                 ( portMPU_REGION_ENABLE );\r
 660                         }\r
 661                         else\r
 662                         {\r
 663                                 /* Invalidate the region. */\r
 664                                 xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;\r
 665                                 xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;\r
 666                         }\r
 667 \r
 668                         lIndex++;\r
 669                 }\r
 670         }\r
 671 }\r
 672 /*-----------------------------------------------------------*/\r
 673 \r
 674 signed portBASE_TYPE MPU_xTaskGenericCreate( pdTASK_CODE pvTaskCode, const signed char * const pcName, unsigned short usStackDepth, void *pvParameters, unsigned portBASE_TYPE uxPriority, xTaskHandle *pxCreatedTask, portSTACK_TYPE *puxStackBuffer, const xMemoryRegion * const xRegions )\r
 675 {\r
 676 signed portBASE_TYPE xReturn;\r
 677 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 678 \r
 679         xReturn = xTaskGenericCreate( pvTaskCode, pcName, usStackDepth, pvParameters, uxPriority, pxCreatedTask, puxStackBuffer, xRegions );\r
 680         portRESET_PRIVILEGE( xRunningPrivileged );\r
 681         return xReturn;\r
 682 }\r
 683 /*-----------------------------------------------------------*/\r
 684 \r
 685 void MPU_vTaskAllocateMPURegions( xTaskHandle xTask, const xMemoryRegion * const xRegions )\r
 686 {\r
 687 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 688 \r
 689         vTaskAllocateMPURegions( xTask, xRegions );\r
 690         portRESET_PRIVILEGE( xRunningPrivileged );\r
 691 }\r
 692 /*-----------------------------------------------------------*/\r
 693 \r
 694 #if ( INCLUDE_vTaskDelete == 1 )\r
 695         void MPU_vTaskDelete( xTaskHandle pxTaskToDelete )\r
 696         {\r
 697     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 698 \r
 699                 vTaskDelete( pxTaskToDelete );\r
 700         portRESET_PRIVILEGE( xRunningPrivileged );\r
 701         }\r
 702 #endif\r
 703 /*-----------------------------------------------------------*/\r
 704 \r
 705 #if ( INCLUDE_vTaskDelayUntil == 1 )\r
 706         void MPU_vTaskDelayUntil( portTickType * const pxPreviousWakeTime, portTickType xTimeIncrement )\r
 707         {\r
 708     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 709 \r
 710                 vTaskDelayUntil( pxPreviousWakeTime, xTimeIncrement );\r
 711         portRESET_PRIVILEGE( xRunningPrivileged );\r
 712         }\r
 713 #endif\r
 714 /*-----------------------------------------------------------*/\r
 715 \r
 716 #if ( INCLUDE_vTaskDelay == 1 )\r
 717         void MPU_vTaskDelay( portTickType xTicksToDelay )\r
 718         {\r
 719     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 720 \r
 721                 vTaskDelay( xTicksToDelay );\r
 722         portRESET_PRIVILEGE( xRunningPrivileged );\r
 723         }\r
 724 #endif\r
 725 /*-----------------------------------------------------------*/\r
 726 \r
 727 #if ( INCLUDE_uxTaskPriorityGet == 1 )\r
 728         unsigned portBASE_TYPE MPU_uxTaskPriorityGet( xTaskHandle pxTask )\r
 729         {\r
 730         unsigned portBASE_TYPE uxReturn;\r
 731     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 732 \r
 733                 uxReturn = uxTaskPriorityGet( pxTask );\r
 734         portRESET_PRIVILEGE( xRunningPrivileged );\r
 735                 return uxReturn;\r
 736         }\r
 737 #endif\r
 738 /*-----------------------------------------------------------*/\r
 739 \r
 740 #if ( INCLUDE_vTaskPrioritySet == 1 )\r
 741         void MPU_vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority )\r
 742         {\r
 743     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 744 \r
 745                 vTaskPrioritySet( pxTask, uxNewPriority );\r
 746         portRESET_PRIVILEGE( xRunningPrivileged );\r
 747         }\r
 748 #endif\r
 749 /*-----------------------------------------------------------*/\r
 750 \r
 751 #if ( INCLUDE_eTaskGetState == 1 )\r
 752         eTaskState MPU_eTaskGetState( xTaskHandle pxTask )\r
 753         {\r
 754     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 755         eTaskState eReturn;\r
 756 \r
 757                 eReturn = eTaskGetState( pxTask );\r
 758         portRESET_PRIVILEGE( xRunningPrivileged );\r
 759                 return eReturn;\r
 760         }\r
 761 #endif\r
 762 /*-----------------------------------------------------------*/\r
 763 \r
 764 #if ( INCLUDE_xTaskGetIdleTaskHandle == 1 )\r
 765         xTaskHandle MPU_xTaskGetIdleTaskHandle( void )\r
 766         {\r
 767         xTaskHandle xReturn;\r
 768     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 769 \r
 770                 xReturn = xTaskGetIdleTaskHandle();\r
 771         portRESET_PRIVILEGE( xRunningPrivileged );\r
 772                 return eReturn;\r
 773         }\r
 774 #endif\r
 775 /*-----------------------------------------------------------*/\r
 776 \r
 777 #if ( INCLUDE_vTaskSuspend == 1 )\r
 778         void MPU_vTaskSuspend( xTaskHandle pxTaskToSuspend )\r
 779         {\r
 780     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 781 \r
 782                 vTaskSuspend( pxTaskToSuspend );\r
 783         portRESET_PRIVILEGE( xRunningPrivileged );\r
 784         }\r
 785 #endif\r
 786 /*-----------------------------------------------------------*/\r
 787 \r
 788 #if ( INCLUDE_vTaskSuspend == 1 )\r
 789         signed portBASE_TYPE MPU_xTaskIsTaskSuspended( xTaskHandle xTask )\r
 790         {\r
 791         signed portBASE_TYPE xReturn;\r
 792     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 793 \r
 794                 xReturn = xTaskIsTaskSuspended( xTask );\r
 795         portRESET_PRIVILEGE( xRunningPrivileged );\r
 796                 return xReturn;\r
 797         }\r
 798 #endif\r
 799 /*-----------------------------------------------------------*/\r
 800 \r
 801 #if ( INCLUDE_vTaskSuspend == 1 )\r
 802         void MPU_vTaskResume( xTaskHandle pxTaskToResume )\r
 803         {\r
 804     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 805 \r
 806                 vTaskResume( pxTaskToResume );\r
 807         portRESET_PRIVILEGE( xRunningPrivileged );\r
 808         }\r
 809 #endif\r
 810 /*-----------------------------------------------------------*/\r
 811 \r
 812 void MPU_vTaskSuspendAll( void )\r
 813 {\r
 814 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 815 \r
 816         vTaskSuspendAll();\r
 817     portRESET_PRIVILEGE( xRunningPrivileged );\r
 818 }\r
 819 /*-----------------------------------------------------------*/\r
 820 \r
 821 signed portBASE_TYPE MPU_xTaskResumeAll( void )\r
 822 {\r
 823 signed portBASE_TYPE xReturn;\r
 824 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 825 \r
 826         xReturn = xTaskResumeAll();\r
 827     portRESET_PRIVILEGE( xRunningPrivileged );\r
 828     return xReturn;\r
 829 }\r
 830 /*-----------------------------------------------------------*/\r
 831 \r
 832 portTickType MPU_xTaskGetTickCount( void )\r
 833 {\r
 834 portTickType xReturn;\r
 835 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 836 \r
 837         xReturn = xTaskGetTickCount();\r
 838     portRESET_PRIVILEGE( xRunningPrivileged );\r
 839         return xReturn;\r
 840 }\r
 841 /*-----------------------------------------------------------*/\r
 842 \r
 843 unsigned portBASE_TYPE MPU_uxTaskGetNumberOfTasks( void )\r
 844 {\r
 845 unsigned portBASE_TYPE uxReturn;\r
 846 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 847 \r
 848         uxReturn = uxTaskGetNumberOfTasks();\r
 849     portRESET_PRIVILEGE( xRunningPrivileged );\r
 850         return uxReturn;\r
 851 }\r
 852 /*-----------------------------------------------------------*/\r
 853 \r
 854 #if ( configUSE_TRACE_FACILITY == 1 )\r
 855         void MPU_vTaskList( signed char *pcWriteBuffer )\r
 856         {\r
 857         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 858 \r
 859                 vTaskList( pcWriteBuffer );\r
 860                 portRESET_PRIVILEGE( xRunningPrivileged );\r
 861         }\r
 862 #endif\r
 863 /*-----------------------------------------------------------*/\r
 864 \r
 865 #if ( configGENERATE_RUN_TIME_STATS == 1 )\r
 866         void MPU_vTaskGetRunTimeStats( signed char *pcWriteBuffer )\r
 867         {\r
 868     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 869 \r
 870                 vTaskGetRunTimeStats( pcWriteBuffer );\r
 871         portRESET_PRIVILEGE( xRunningPrivileged );\r
 872         }\r
 873 #endif\r
 874 /*-----------------------------------------------------------*/\r
 875 \r
 876 #if ( configUSE_APPLICATION_TASK_TAG == 1 )\r
 877         void MPU_vTaskSetApplicationTaskTag( xTaskHandle xTask, pdTASK_HOOK_CODE pxTagValue )\r
 878         {\r
 879     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 880 \r
 881                 vTaskSetApplicationTaskTag( xTask, pxTagValue );\r
 882         portRESET_PRIVILEGE( xRunningPrivileged );\r
 883         }\r
 884 #endif\r
 885 /*-----------------------------------------------------------*/\r
 886 \r
 887 #if ( configUSE_APPLICATION_TASK_TAG == 1 )\r
 888         pdTASK_HOOK_CODE MPU_xTaskGetApplicationTaskTag( xTaskHandle xTask )\r
 889         {\r
 890         pdTASK_HOOK_CODE xReturn;\r
 891     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 892 \r
 893                 xReturn = xTaskGetApplicationTaskTag( xTask );\r
 894         portRESET_PRIVILEGE( xRunningPrivileged );\r
 895                 return xReturn;\r
 896         }\r
 897 #endif\r
 898 /*-----------------------------------------------------------*/\r
 899 \r
 900 #if ( configUSE_APPLICATION_TASK_TAG == 1 )\r
 901         portBASE_TYPE MPU_xTaskCallApplicationTaskHook( xTaskHandle xTask, void *pvParameter )\r
 902         {\r
 903         portBASE_TYPE xReturn;\r
 904     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 905 \r
 906                 xReturn = xTaskCallApplicationTaskHook( xTask, pvParameter );\r
 907         portRESET_PRIVILEGE( xRunningPrivileged );\r
 908                 return xReturn;\r
 909         }\r
 910 #endif\r
 911 /*-----------------------------------------------------------*/\r
 912 \r
 913 #if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 )\r
 914         unsigned portBASE_TYPE MPU_uxTaskGetStackHighWaterMark( xTaskHandle xTask )\r
 915         {\r
 916         unsigned portBASE_TYPE uxReturn;\r
 917     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 918 \r
 919                 uxReturn = uxTaskGetStackHighWaterMark( xTask );\r
 920         portRESET_PRIVILEGE( xRunningPrivileged );\r
 921                 return uxReturn;\r
 922         }\r
 923 #endif\r
 924 /*-----------------------------------------------------------*/\r
 925 \r
 926 #if ( INCLUDE_xTaskGetCurrentTaskHandle == 1 )\r
 927         xTaskHandle MPU_xTaskGetCurrentTaskHandle( void )\r
 928         {\r
 929         xTaskHandle xReturn;\r
 930     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 931 \r
 932                 xReturn = xTaskGetCurrentTaskHandle();\r
 933         portRESET_PRIVILEGE( xRunningPrivileged );\r
 934                 return xReturn;\r
 935         }\r
 936 #endif\r
 937 /*-----------------------------------------------------------*/\r
 938 \r
 939 #if ( INCLUDE_xTaskGetSchedulerState == 1 )\r
 940         portBASE_TYPE MPU_xTaskGetSchedulerState( void )\r
 941         {\r
 942         portBASE_TYPE xReturn;\r
 943     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 944 \r
 945                 xReturn = xTaskGetSchedulerState();\r
 946         portRESET_PRIVILEGE( xRunningPrivileged );\r
 947                 return xReturn;\r
 948         }\r
 949 #endif\r
 950 /*-----------------------------------------------------------*/\r
 951 \r
 952 xQueueHandle MPU_xQueueGenericCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize, unsigned char ucQueueType )\r
 953 {\r
 954 xQueueHandle xReturn;\r
 955 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 956 \r
 957         xReturn = xQueueGenericCreate( uxQueueLength, uxItemSize, ucQueueType );\r
 958         portRESET_PRIVILEGE( xRunningPrivileged );\r
 959         return xReturn;\r
 960 }\r
 961 /*-----------------------------------------------------------*/\r
 962 \r
 963 portBASE_TYPE MPU_xQueueGenericReset( xQueueHandle pxQueue, portBASE_TYPE xNewQueue )\r
 964 {\r
 965 portBASE_TYPE xReturn;\r
 966 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 967 \r
 968         xReturn = xQueueGenericReset( pxQueue, xNewQueue );\r
 969         portRESET_PRIVILEGE( xRunningPrivileged );\r
 970         return xReturn;\r
 971 }\r
 972 /*-----------------------------------------------------------*/\r
 973 \r
 974 signed portBASE_TYPE MPU_xQueueGenericSend( xQueueHandle xQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition )\r
 975 {\r
 976 signed portBASE_TYPE xReturn;\r
 977 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 978 \r
 979         xReturn = xQueueGenericSend( xQueue, pvItemToQueue, xTicksToWait, xCopyPosition );\r
 980         portRESET_PRIVILEGE( xRunningPrivileged );\r
 981         return xReturn;\r
 982 }\r
 983 /*-----------------------------------------------------------*/\r
 984 \r
 985 unsigned portBASE_TYPE MPU_uxQueueMessagesWaiting( const xQueueHandle pxQueue )\r
 986 {\r
 987 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 988 unsigned portBASE_TYPE uxReturn;\r
 989 \r
 990         uxReturn = uxQueueMessagesWaiting( pxQueue );\r
 991         portRESET_PRIVILEGE( xRunningPrivileged );\r
 992         return uxReturn;\r
 993 }\r
 994 /*-----------------------------------------------------------*/\r
 995 \r
 996 signed portBASE_TYPE MPU_xQueueGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking )\r
 997 {\r
 998 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 999 signed portBASE_TYPE xReturn;\r
1000 \r
1001         xReturn = xQueueGenericReceive( pxQueue, pvBuffer, xTicksToWait, xJustPeeking );\r
1002         portRESET_PRIVILEGE( xRunningPrivileged );\r
1003         return xReturn;\r
1004 }\r
1005 /*-----------------------------------------------------------*/\r
1006 \r
1007 #if ( configUSE_MUTEXES == 1 )\r
1008         xQueueHandle MPU_xQueueCreateMutex( void )\r
1009         {\r
1010     xQueueHandle xReturn;\r
1011         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1012 \r
1013                 xReturn = xQueueCreateMutex( queueQUEUE_TYPE_MUTEX );\r
1014                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1015                 return xReturn;\r
1016         }\r
1017 #endif\r
1018 /*-----------------------------------------------------------*/\r
1019 \r
1020 #if configUSE_COUNTING_SEMAPHORES == 1\r
1021         xQueueHandle MPU_xQueueCreateCountingSemaphore( unsigned portBASE_TYPE uxCountValue, unsigned portBASE_TYPE uxInitialCount )\r
1022         {\r
1023     xQueueHandle xReturn;\r
1024         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1025 \r
1026                 xReturn = xQueueCreateCountingSemaphore( uxCountValue, uxInitialCount );\r
1027                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1028                 return xReturn;\r
1029         }\r
1030 #endif\r
1031 /*-----------------------------------------------------------*/\r
1032 \r
1033 #if ( configUSE_MUTEXES == 1 )\r
1034         portBASE_TYPE MPU_xQueueTakeMutexRecursive( xQueueHandle xMutex, portTickType xBlockTime )\r
1035         {\r
1036         portBASE_TYPE xReturn;\r
1037         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1038 \r
1039                 xReturn = xQueueTakeMutexRecursive( xMutex, xBlockTime );\r
1040                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1041                 return xReturn;\r
1042         }\r
1043 #endif\r
1044 /*-----------------------------------------------------------*/\r
1045 \r
1046 #if ( configUSE_MUTEXES == 1 )\r
1047         portBASE_TYPE MPU_xQueueGiveMutexRecursive( xQueueHandle xMutex )\r
1048         {\r
1049         portBASE_TYPE xReturn;\r
1050         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1051 \r
1052                 xReturn = xQueueGiveMutexRecursive( xMutex );\r
1053                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1054                 return xReturn;\r
1055         }\r
1056 #endif\r
1057 /*-----------------------------------------------------------*/\r
1058 \r
1059 #if ( configUSE_QUEUE_SETS == 1 )\r
1060         xQueueSetHandle MPU_xQueueCreateSet( unsigned portBASE_TYPE uxEventQueueLength )\r
1061         {\r
1062         xQueueSetHandle xReturn;\r
1063         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1064 \r
1065                 xReturn = xQueueCreateSet( uxEventQueueLength );\r
1066                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1067                 return xReturn;\r
1068         }\r
1069 #endif\r
1070 /*-----------------------------------------------------------*/\r
1071 \r
1072 #if ( configUSE_QUEUE_SETS == 1 )\r
1073         xQueueSetMemberHandle MPU_xQueueSelectFromSet( xQueueSetHandle xQueueSet, portTickType xBlockTimeTicks )\r
1074         {\r
1075         xQueueSetMemberHandle xReturn;\r
1076         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1077 \r
1078                 xReturn = xQueueSelectFromSet( xQueueSet, xBlockTimeTicks );\r
1079                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1080                 return xReturn;\r
1081         }\r
1082 #endif\r
1083 /*-----------------------------------------------------------*/\r
1084 \r
1085 #if ( configUSE_QUEUE_SETS == 1 )\r
1086         portBASE_TYPE MPU_xQueueAddToSet( xQueueSetMemberHandle xQueueOrSemaphore, xQueueSetHandle xQueueSet )\r
1087         {\r
1088         portBASE_TYPE xReturn;\r
1089         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1090 \r
1091                 xReturn = xQueueAddToSet( xQueueOrSemaphore, xQueueSet );\r
1092                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1093                 return xReturn;\r
1094         }\r
1095 #endif\r
1096 /*-----------------------------------------------------------*/\r
1097 \r
1098 #if ( configUSE_QUEUE_SETS == 1 )\r
1099         portBASE_TYPE MPU_xQueueRemoveFromSet( xQueueSetMemberHandle xQueueOrSemaphore, xQueueSetHandle xQueueSet )\r
1100         {\r
1101         portBASE_TYPE xReturn;\r
1102         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1103 \r
1104                 xReturn = xQueueRemoveFromSet( xQueueOrSemaphore, xQueueSet );\r
1105                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1106                 return xReturn;\r
1107         }\r
1108 #endif\r
1109 /*-----------------------------------------------------------*/\r
1110 \r
1111 #if configUSE_ALTERNATIVE_API == 1\r
1112         signed portBASE_TYPE MPU_xQueueAltGenericSend( xQueueHandle pxQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition )\r
1113         {\r
1114         signed portBASE_TYPE xReturn;\r
1115         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1116 \r
1117                 xReturn =       signed portBASE_TYPE xQueueAltGenericSend( pxQueue, pvItemToQueue, xTicksToWait, xCopyPosition );\r
1118                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1119                 return xReturn;\r
1120         }\r
1121 #endif\r
1122 /*-----------------------------------------------------------*/\r
1123 \r
1124 #if configUSE_ALTERNATIVE_API == 1\r
1125         signed portBASE_TYPE MPU_xQueueAltGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking )\r
1126         {\r
1127     signed portBASE_TYPE xReturn;\r
1128         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1129 \r
1130                 xReturn = xQueueAltGenericReceive( pxQueue, pvBuffer, xTicksToWait, xJustPeeking );\r
1131                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1132                 return xReturn;\r
1133         }\r
1134 #endif\r
1135 /*-----------------------------------------------------------*/\r
1136 \r
1137 #if configQUEUE_REGISTRY_SIZE > 0\r
1138         void MPU_vQueueAddToRegistry( xQueueHandle xQueue, signed char *pcName )\r
1139         {\r
1140         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1141 \r
1142                 vQueueAddToRegistry( xQueue, pcName );\r
1143 \r
1144                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1145         }\r
1146 #endif\r
1147 /*-----------------------------------------------------------*/\r
1148 \r
1149 void MPU_vQueueDelete( xQueueHandle xQueue )\r
1150 {\r
1151 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1152 \r
1153         vQueueDelete( xQueue );\r
1154 \r
1155         portRESET_PRIVILEGE( xRunningPrivileged );\r
1156 }\r
1157 /*-----------------------------------------------------------*/\r
1158 \r
1159 void *MPU_pvPortMalloc( size_t xSize )\r
1160 {\r
1161 void *pvReturn;\r
1162 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1163 \r
1164         pvReturn = pvPortMalloc( xSize );\r
1165 \r
1166         portRESET_PRIVILEGE( xRunningPrivileged );\r
1167 \r
1168         return pvReturn;\r
1169 }\r
1170 /*-----------------------------------------------------------*/\r
1171 \r
1172 void MPU_vPortFree( void *pv )\r
1173 {\r
1174 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1175 \r
1176         vPortFree( pv );\r
1177 \r
1178         portRESET_PRIVILEGE( xRunningPrivileged );\r
1179 }\r
1180 /*-----------------------------------------------------------*/\r
1181 \r
1182 void MPU_vPortInitialiseBlocks( void )\r
1183 {\r
1184 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1185 \r
1186         vPortInitialiseBlocks();\r
1187 \r
1188         portRESET_PRIVILEGE( xRunningPrivileged );\r
1189 }\r
1190 /*-----------------------------------------------------------*/\r
1191 \r
1192 size_t MPU_xPortGetFreeHeapSize( void )\r
1193 {\r
1194 size_t xReturn;\r
1195 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1196 \r
1197         xReturn = xPortGetFreeHeapSize();\r
1198 \r
1199         portRESET_PRIVILEGE( xRunningPrivileged );\r
1200 \r
1201         return xReturn;\r
1202 }\r
1203 \r