2 FreeRTOS V8.2.0 - Copyright (C) 2015 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 This file is part of the FreeRTOS distribution.
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9 FreeRTOS is free software; you can redistribute it and/or modify it under
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10 the terms of the GNU General Public License (version 2) as published by the
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11 Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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13 ***************************************************************************
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14 >>! NOTE: The modification to the GPL is included to allow you to !<<
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15 >>! distribute a combined work that includes FreeRTOS without being !<<
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16 >>! obliged to provide the source code for proprietary components !<<
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17 >>! outside of the FreeRTOS kernel. !<<
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18 ***************************************************************************
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20 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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21 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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22 FOR A PARTICULAR PURPOSE. Full license text is available on the following
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23 link: http://www.freertos.org/a00114.html
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25 ***************************************************************************
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27 * FreeRTOS provides completely free yet professionally developed, *
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28 * robust, strictly quality controlled, supported, and cross *
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29 * platform software that is more than just the market leader, it *
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30 * is the industry's de facto standard. *
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32 * Help yourself get started quickly while simultaneously helping *
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33 * to support the FreeRTOS project by purchasing a FreeRTOS *
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34 * tutorial book, reference manual, or both: *
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35 * http://www.FreeRTOS.org/Documentation *
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37 ***************************************************************************
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39 http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
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40 the FAQ page "My application does not run, what could be wrong?". Have you
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41 defined configASSERT()?
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43 http://www.FreeRTOS.org/support - In return for receiving this top quality
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44 embedded software for free we request you assist our global community by
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45 participating in the support forum.
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47 http://www.FreeRTOS.org/training - Investing in training allows your team to
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48 be as productive as possible as early as possible. Now you can receive
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49 FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
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50 Ltd, and the world's leading authority on the world's leading RTOS.
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52 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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53 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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54 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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56 http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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57 Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
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59 http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
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60 Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
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61 licenses offer ticketed support, indemnification and commercial middleware.
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63 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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64 engineered and independently SIL3 certified version for use in safety and
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65 mission critical applications that require provable dependability.
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70 /*-----------------------------------------------------------
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71 * Implementation of functions defined in portable.h for the ARM CM3 port.
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72 *----------------------------------------------------------*/
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74 /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
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75 all the API functions to use the MPU wrappers. That should only be done when
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76 task.h is included from an application file. */
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77 #define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
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79 /* Scheduler includes. */
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80 #include "FreeRTOS.h"
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84 #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
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86 /* Constants required to access and manipulate the NVIC. */
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87 #define portNVIC_SYSTICK_CTRL ( ( volatile uint32_t * ) 0xe000e010 )
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88 #define portNVIC_SYSTICK_LOAD ( ( volatile uint32_t * ) 0xe000e014 )
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89 #define portNVIC_SYSPRI2 ( ( volatile uint32_t * ) 0xe000ed20 )
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90 #define portNVIC_SYSPRI1 ( ( volatile uint32_t * ) 0xe000ed1c )
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91 #define portNVIC_SYS_CTRL_STATE ( ( volatile uint32_t * ) 0xe000ed24 )
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92 #define portNVIC_MEM_FAULT_ENABLE ( 1UL << 16UL )
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94 /* Constants required to access and manipulate the MPU. */
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95 #define portMPU_TYPE ( ( volatile uint32_t * ) 0xe000ed90 )
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96 #define portMPU_REGION_BASE_ADDRESS ( ( volatile uint32_t * ) 0xe000ed9C )
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97 #define portMPU_REGION_ATTRIBUTE ( ( volatile uint32_t * ) 0xe000edA0 )
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98 #define portMPU_CTRL ( ( volatile uint32_t * ) 0xe000ed94 )
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99 #define portEXPECTED_MPU_TYPE_VALUE ( 8UL << 8UL ) /* 8 regions, unified. */
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100 #define portMPU_ENABLE ( 0x01UL )
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101 #define portMPU_BACKGROUND_ENABLE ( 1UL << 2UL )
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102 #define portPRIVILEGED_EXECUTION_START_ADDRESS ( 0UL )
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103 #define portMPU_REGION_VALID ( 0x10UL )
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104 #define portMPU_REGION_ENABLE ( 0x01UL )
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105 #define portPERIPHERALS_START_ADDRESS 0x40000000UL
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106 #define portPERIPHERALS_END_ADDRESS 0x5FFFFFFFUL
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108 /* Constants required to access and manipulate the SysTick. */
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109 #define portNVIC_SYSTICK_CLK ( 0x00000004UL )
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110 #define portNVIC_SYSTICK_INT ( 0x00000002UL )
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111 #define portNVIC_SYSTICK_ENABLE ( 0x00000001UL )
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112 #define portNVIC_PENDSV_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
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113 #define portNVIC_SYSTICK_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
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114 #define portNVIC_SVC_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
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116 /* Constants required to set up the initial stack. */
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117 #define portINITIAL_XPSR ( 0x01000000 )
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118 #define portINITIAL_CONTROL_IF_UNPRIVILEGED ( 0x03 )
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119 #define portINITIAL_CONTROL_IF_PRIVILEGED ( 0x02 )
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121 /* Offsets in the stack to the parameters when inside the SVC handler. */
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122 #define portOFFSET_TO_PC ( 6 )
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124 /* Set the privilege level to user mode if xRunningPrivileged is false. */
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125 #define portRESET_PRIVILEGE( xRunningPrivileged ) if( xRunningPrivileged != pdTRUE ) __asm volatile ( " mrs r0, control \n orr r0, #1 \n msr control, r0" :::"r0" )
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127 /* Each task maintains its own interrupt status in the critical nesting
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128 variable. Note this is not saved as part of the task context as context
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129 switches can only occur when uxCriticalNesting is zero. */
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130 static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
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133 * Setup the timer to generate the tick interrupts.
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135 static void prvSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;
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138 * Configure a number of standard MPU regions that are used by all tasks.
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140 static void prvSetupMPU( void ) PRIVILEGED_FUNCTION;
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143 * Return the smallest MPU region size that a given number of bytes will fit
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144 * into. The region size is returned as the value that should be programmed
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145 * into the region attribute register for that region.
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147 static uint32_t prvGetMPURegionSizeSetting( uint32_t ulActualSizeInBytes ) PRIVILEGED_FUNCTION;
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150 * Checks to see if being called from the context of an unprivileged task, and
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151 * if so raises the privilege level and returns false - otherwise does nothing
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152 * other than return true.
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154 static BaseType_t prvRaisePrivilege( void ) __attribute__(( naked ));
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157 * Standard FreeRTOS exception handlers.
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159 void xPortPendSVHandler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
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160 void xPortSysTickHandler( void ) __attribute__ ((optimize("3"))) PRIVILEGED_FUNCTION;
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161 void vPortSVCHandler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
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164 * Starts the scheduler by restoring the context of the first task to run.
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166 static void prvRestoreContextOfFirstTask( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION;
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169 * C portion of the SVC handler. The SVC handler is split between an asm entry
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170 * and a C wrapper for simplicity of coding and maintenance.
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172 static void prvSVCHandler( uint32_t *pulRegisters ) __attribute__(( noinline )) PRIVILEGED_FUNCTION;
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175 * Prototypes for all the MPU wrappers.
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177 BaseType_t MPU_xTaskGenericCreate( TaskFunction_t pvTaskCode, const char * const pcName, uint16_t usStackDepth, void *pvParameters, UBaseType_t uxPriority, TaskHandle_t *pxCreatedTask, StackType_t *puxStackBuffer, const MemoryRegion_t * const xRegions );
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178 void MPU_vTaskAllocateMPURegions( TaskHandle_t xTask, const MemoryRegion_t * const xRegions );
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179 void MPU_vTaskDelete( TaskHandle_t pxTaskToDelete );
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180 void MPU_vTaskDelayUntil( TickType_t * const pxPreviousWakeTime, TickType_t xTimeIncrement );
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181 void MPU_vTaskDelay( TickType_t xTicksToDelay );
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182 UBaseType_t MPU_uxTaskPriorityGet( TaskHandle_t pxTask );
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183 void MPU_vTaskPrioritySet( TaskHandle_t pxTask, UBaseType_t uxNewPriority );
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184 eTaskState MPU_eTaskGetState( TaskHandle_t pxTask );
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185 void MPU_vTaskSuspend( TaskHandle_t pxTaskToSuspend );
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186 void MPU_vTaskResume( TaskHandle_t pxTaskToResume );
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187 void MPU_vTaskSuspendAll( void );
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188 BaseType_t MPU_xTaskResumeAll( void );
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189 TickType_t MPU_xTaskGetTickCount( void );
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190 UBaseType_t MPU_uxTaskGetNumberOfTasks( void );
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191 void MPU_vTaskList( char *pcWriteBuffer );
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192 void MPU_vTaskGetRunTimeStats( char *pcWriteBuffer );
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193 void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, TaskHookFunction_t pxTagValue );
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194 TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask );
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195 BaseType_t MPU_xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter );
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196 UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask );
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197 TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void );
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198 BaseType_t MPU_xTaskGetSchedulerState( void );
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199 TaskHandle_t MPU_xTaskGetIdleTaskHandle( void );
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200 UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t *pxTaskStatusArray, UBaseType_t uxArraySize, uint32_t *pulTotalRunTime );
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201 QueueHandle_t MPU_xQueueGenericCreate( UBaseType_t uxQueueLength, UBaseType_t uxItemSize, uint8_t ucQueueType );
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202 BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, BaseType_t xCopyPosition );
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203 BaseType_t MPU_xQueueGenericReset( QueueHandle_t pxQueue, BaseType_t xNewQueue );
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204 UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t pxQueue );
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205 BaseType_t MPU_xQueueGenericReceive( QueueHandle_t pxQueue, void * const pvBuffer, TickType_t xTicksToWait, BaseType_t xJustPeeking );
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206 QueueHandle_t MPU_xQueueCreateMutex( void );
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207 QueueHandle_t MPU_xQueueCreateCountingSemaphore( UBaseType_t uxCountValue, UBaseType_t uxInitialCount );
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208 BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, TickType_t xBlockTime );
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209 BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t xMutex );
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210 BaseType_t MPU_xQueueAltGenericSend( QueueHandle_t pxQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, BaseType_t xCopyPosition );
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211 BaseType_t MPU_xQueueAltGenericReceive( QueueHandle_t pxQueue, void * const pvBuffer, TickType_t xTicksToWait, BaseType_t xJustPeeking );
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212 void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, char *pcName );
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213 void MPU_vQueueDelete( QueueHandle_t xQueue );
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214 void *MPU_pvPortMalloc( size_t xSize );
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215 void MPU_vPortFree( void *pv );
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216 void MPU_vPortInitialiseBlocks( void );
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217 size_t MPU_xPortGetFreeHeapSize( void );
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218 QueueSetHandle_t MPU_xQueueCreateSet( UBaseType_t uxEventQueueLength );
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219 QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, TickType_t xBlockTimeTicks );
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220 BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet );
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221 BaseType_t MPU_xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet );
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222 BaseType_t MPU_xQueuePeekFromISR( QueueHandle_t xQueue, void * const pvBuffer );
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223 void* MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore );
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225 /*-----------------------------------------------------------*/
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228 * See header file for description.
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230 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters, BaseType_t xRunPrivileged )
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232 /* Simulate the stack frame as it would be created by a context switch
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234 pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
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235 *pxTopOfStack = portINITIAL_XPSR; /* xPSR */
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237 *pxTopOfStack = ( StackType_t ) pxCode; /* PC */
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239 *pxTopOfStack = 0; /* LR */
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240 pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
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241 *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
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242 pxTopOfStack -= 9; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
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244 if( xRunPrivileged == pdTRUE )
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246 *pxTopOfStack = portINITIAL_CONTROL_IF_PRIVILEGED;
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250 *pxTopOfStack = portINITIAL_CONTROL_IF_UNPRIVILEGED;
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253 return pxTopOfStack;
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255 /*-----------------------------------------------------------*/
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257 void vPortSVCHandler( void )
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259 /* Assumes psp was in use. */
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262 #ifndef USE_PROCESS_STACK /* Code should not be required if a main() is using the process stack. */
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265 " mrseq r0, msp \n"
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266 " mrsne r0, psp \n"
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271 ::"i"(prvSVCHandler):"r0"
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274 /*-----------------------------------------------------------*/
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276 static void prvSVCHandler( uint32_t *pulParam )
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278 uint8_t ucSVCNumber;
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280 /* The stack contains: r0, r1, r2, r3, r12, r14, the return address and
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281 xPSR. The first argument (r0) is pulParam[ 0 ]. */
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282 ucSVCNumber = ( ( uint8_t * ) pulParam[ portOFFSET_TO_PC ] )[ -2 ];
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283 switch( ucSVCNumber )
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285 case portSVC_START_SCHEDULER : *(portNVIC_SYSPRI1) |= portNVIC_SVC_PRI;
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286 prvRestoreContextOfFirstTask();
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289 case portSVC_YIELD : *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
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290 /* Barriers are normally not required
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291 but do ensure the code is completely
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292 within the specified behaviour for the
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294 __asm volatile( "dsb" );
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295 __asm volatile( "isb" );
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299 case portSVC_RAISE_PRIVILEGE : __asm volatile
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301 " mrs r1, control \n" /* Obtain current control value. */
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302 " bic r1, #1 \n" /* Set privilege bit. */
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303 " msr control, r1 \n" /* Write back new control value. */
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308 default : /* Unknown SVC call. */
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312 /*-----------------------------------------------------------*/
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314 static void prvRestoreContextOfFirstTask( void )
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318 " ldr r0, =0xE000ED08 \n" /* Use the NVIC offset register to locate the stack. */
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321 " msr msp, r0 \n" /* Set the msp back to the start of the stack. */
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322 " ldr r3, pxCurrentTCBConst2 \n" /* Restore the context. */
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324 " ldr r0, [r1] \n" /* The first item in the TCB is the task top of stack. */
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325 " add r1, r1, #4 \n" /* Move onto the second item in the TCB... */
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326 " ldr r2, =0xe000ed9c \n" /* Region Base Address register. */
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327 " ldmia r1!, {r4-r11} \n" /* Read 4 sets of MPU registers. */
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328 " stmia r2!, {r4-r11} \n" /* Write 4 sets of MPU registers. */
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329 " ldmia r0!, {r3, r4-r11} \n" /* Pop the registers that are not automatically saved on exception entry. */
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330 " msr control, r3 \n"
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331 " msr psp, r0 \n" /* Restore the task stack pointer. */
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333 " msr basepri, r0 \n"
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334 " ldr r14, =0xfffffffd \n" /* Load exec return code. */
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338 "pxCurrentTCBConst2: .word pxCurrentTCB \n"
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341 /*-----------------------------------------------------------*/
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344 * See header file for description.
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346 BaseType_t xPortStartScheduler( void )
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348 /* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0. See
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349 http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
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350 configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) );
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352 /* Make PendSV and SysTick the same priority as the kernel. */
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353 *(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;
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354 *(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;
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356 /* Configure the regions in the MPU that are common to all tasks. */
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359 /* Start the timer that generates the tick ISR. Interrupts are disabled
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361 prvSetupTimerInterrupt();
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363 /* Initialise the critical nesting count ready for the first task. */
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364 uxCriticalNesting = 0;
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366 /* Start the first task. */
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367 __asm volatile( " svc %0 \n"
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368 :: "i" (portSVC_START_SCHEDULER) );
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370 /* Should not get here! */
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373 /*-----------------------------------------------------------*/
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375 void vPortEndScheduler( void )
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377 /* Not implemented in ports where there is nothing to return to.
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378 Artificially force an assert. */
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379 configASSERT( uxCriticalNesting == 1000UL );
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381 /*-----------------------------------------------------------*/
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383 void vPortEnterCritical( void )
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385 BaseType_t xRunningPrivileged = prvRaisePrivilege();
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387 portDISABLE_INTERRUPTS();
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388 uxCriticalNesting++;
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390 portRESET_PRIVILEGE( xRunningPrivileged );
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392 /*-----------------------------------------------------------*/
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394 void vPortExitCritical( void )
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396 BaseType_t xRunningPrivileged = prvRaisePrivilege();
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398 configASSERT( uxCriticalNesting );
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399 uxCriticalNesting--;
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400 if( uxCriticalNesting == 0 )
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402 portENABLE_INTERRUPTS();
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404 portRESET_PRIVILEGE( xRunningPrivileged );
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406 /*-----------------------------------------------------------*/
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408 void xPortPendSVHandler( void )
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410 /* This is a naked function. */
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416 " ldr r3, pxCurrentTCBConst \n" /* Get the location of the current TCB. */
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419 " mrs r1, control \n"
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420 " stmdb r0!, {r1, r4-r11} \n" /* Save the remaining registers. */
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421 " str r0, [r2] \n" /* Save the new top of stack into the first member of the TCB. */
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423 " stmdb sp!, {r3, r14} \n"
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425 " msr basepri, r0 \n"
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426 " bl vTaskSwitchContext \n"
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428 " msr basepri, r0 \n"
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429 " ldmia sp!, {r3, r14} \n"
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430 " \n" /* Restore the context. */
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432 " ldr r0, [r1] \n" /* The first item in the TCB is the task top of stack. */
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433 " add r1, r1, #4 \n" /* Move onto the second item in the TCB... */
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434 " ldr r2, =0xe000ed9c \n" /* Region Base Address register. */
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435 " ldmia r1!, {r4-r11} \n" /* Read 4 sets of MPU registers. */
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436 " stmia r2!, {r4-r11} \n" /* Write 4 sets of MPU registers. */
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437 " ldmia r0!, {r3, r4-r11} \n" /* Pop the registers that are not automatically saved on exception entry. */
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438 " msr control, r3 \n"
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444 "pxCurrentTCBConst: .word pxCurrentTCB \n"
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445 ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)
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448 /*-----------------------------------------------------------*/
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450 void xPortSysTickHandler( void )
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454 ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();
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456 /* Increment the RTOS tick. */
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457 if( xTaskIncrementTick() != pdFALSE )
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459 /* Pend a context switch. */
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460 *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
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463 portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy );
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465 /*-----------------------------------------------------------*/
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468 * Setup the systick timer to generate the tick interrupts at the required
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471 static void prvSetupTimerInterrupt( void )
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473 /* Configure SysTick to interrupt at the requested rate. */
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474 *(portNVIC_SYSTICK_LOAD) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
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475 *(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;
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477 /*-----------------------------------------------------------*/
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479 static void prvSetupMPU( void )
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481 extern uint32_t __privileged_functions_end__[];
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482 extern uint32_t __FLASH_segment_start__[];
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483 extern uint32_t __FLASH_segment_end__[];
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484 extern uint32_t __privileged_data_start__[];
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485 extern uint32_t __privileged_data_end__[];
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487 /* Check the expected MPU is present. */
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488 if( *portMPU_TYPE == portEXPECTED_MPU_TYPE_VALUE )
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490 /* First setup the entire flash for unprivileged read only access. */
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491 *portMPU_REGION_BASE_ADDRESS = ( ( uint32_t ) __FLASH_segment_start__ ) | /* Base address. */
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492 ( portMPU_REGION_VALID ) |
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493 ( portUNPRIVILEGED_FLASH_REGION );
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495 *portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_READ_ONLY ) |
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496 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
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497 ( prvGetMPURegionSizeSetting( ( uint32_t ) __FLASH_segment_end__ - ( uint32_t ) __FLASH_segment_start__ ) ) |
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498 ( portMPU_REGION_ENABLE );
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500 /* Setup the first 16K for privileged only access (even though less
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501 than 10K is actually being used). This is where the kernel code is
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503 *portMPU_REGION_BASE_ADDRESS = ( ( uint32_t ) __FLASH_segment_start__ ) | /* Base address. */
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504 ( portMPU_REGION_VALID ) |
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505 ( portPRIVILEGED_FLASH_REGION );
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507 *portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_PRIVILEGED_READ_ONLY ) |
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508 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
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509 ( prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_functions_end__ - ( uint32_t ) __FLASH_segment_start__ ) ) |
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510 ( portMPU_REGION_ENABLE );
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512 /* Setup the privileged data RAM region. This is where the kernel data
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514 *portMPU_REGION_BASE_ADDRESS = ( ( uint32_t ) __privileged_data_start__ ) | /* Base address. */
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515 ( portMPU_REGION_VALID ) |
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516 ( portPRIVILEGED_RAM_REGION );
\r
518 *portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
\r
519 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
\r
520 prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) |
\r
521 ( portMPU_REGION_ENABLE );
\r
523 /* By default allow everything to access the general peripherals. The
\r
524 system peripherals and registers are protected. */
\r
525 *portMPU_REGION_BASE_ADDRESS = ( portPERIPHERALS_START_ADDRESS ) |
\r
526 ( portMPU_REGION_VALID ) |
\r
527 ( portGENERAL_PERIPHERALS_REGION );
\r
529 *portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_READ_WRITE | portMPU_REGION_EXECUTE_NEVER ) |
\r
530 ( prvGetMPURegionSizeSetting( portPERIPHERALS_END_ADDRESS - portPERIPHERALS_START_ADDRESS ) ) |
\r
531 ( portMPU_REGION_ENABLE );
\r
533 /* Enable the memory fault exception. */
\r
534 *portNVIC_SYS_CTRL_STATE |= portNVIC_MEM_FAULT_ENABLE;
\r
536 /* Enable the MPU with the background region configured. */
\r
537 *portMPU_CTRL |= ( portMPU_ENABLE | portMPU_BACKGROUND_ENABLE );
\r
540 /*-----------------------------------------------------------*/
\r
542 static uint32_t prvGetMPURegionSizeSetting( uint32_t ulActualSizeInBytes )
\r
544 uint32_t ulRegionSize, ulReturnValue = 4;
\r
546 /* 32 is the smallest region size, 31 is the largest valid value for
\r
548 for( ulRegionSize = 32UL; ulReturnValue < 31UL; ( ulRegionSize <<= 1UL ) )
\r
550 if( ulActualSizeInBytes <= ulRegionSize )
\r
560 /* Shift the code by one before returning so it can be written directly
\r
561 into the the correct bit position of the attribute register. */
\r
562 return ( ulReturnValue << 1UL );
\r
564 /*-----------------------------------------------------------*/
\r
566 static BaseType_t prvRaisePrivilege( void )
\r
570 " mrs r0, control \n"
\r
571 " tst r0, #1 \n" /* Is the task running privileged? */
\r
573 " movne r0, #0 \n" /* CONTROL[0]!=0, return false. */
\r
574 " svcne %0 \n" /* Switch to privileged. */
\r
575 " moveq r0, #1 \n" /* CONTROL[0]==0, return true. */
\r
577 :: "i" (portSVC_RAISE_PRIVILEGE) : "r0"
\r
582 /*-----------------------------------------------------------*/
\r
584 void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, StackType_t *pxBottomOfStack, uint16_t usStackDepth )
\r
586 extern uint32_t __SRAM_segment_start__[];
\r
587 extern uint32_t __SRAM_segment_end__[];
\r
588 extern uint32_t __privileged_data_start__[];
\r
589 extern uint32_t __privileged_data_end__[];
\r
593 if( xRegions == NULL )
\r
595 /* No MPU regions are specified so allow access to all RAM. */
\r
596 xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =
\r
597 ( ( uint32_t ) __SRAM_segment_start__ ) | /* Base address. */
\r
598 ( portMPU_REGION_VALID ) |
\r
599 ( portSTACK_REGION );
\r
601 xMPUSettings->xRegion[ 0 ].ulRegionAttribute =
\r
602 ( portMPU_REGION_READ_WRITE ) |
\r
603 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
\r
604 ( prvGetMPURegionSizeSetting( ( uint32_t ) __SRAM_segment_end__ - ( uint32_t ) __SRAM_segment_start__ ) ) |
\r
605 ( portMPU_REGION_ENABLE );
\r
607 /* Re-instate the privileged only RAM region as xRegion[ 0 ] will have
\r
608 just removed the privileged only parameters. */
\r
609 xMPUSettings->xRegion[ 1 ].ulRegionBaseAddress =
\r
610 ( ( uint32_t ) __privileged_data_start__ ) | /* Base address. */
\r
611 ( portMPU_REGION_VALID ) |
\r
612 ( portSTACK_REGION + 1 );
\r
614 xMPUSettings->xRegion[ 1 ].ulRegionAttribute =
\r
615 ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
\r
616 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
\r
617 prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) |
\r
618 ( portMPU_REGION_ENABLE );
\r
620 /* Invalidate all other regions. */
\r
621 for( ul = 2; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )
\r
623 xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;
\r
624 xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;
\r
629 /* This function is called automatically when the task is created - in
\r
630 which case the stack region parameters will be valid. At all other
\r
631 times the stack parameters will not be valid and it is assumed that the
\r
632 stack region has already been configured. */
\r
633 if( usStackDepth > 0 )
\r
635 /* Define the region that allows access to the stack. */
\r
636 xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =
\r
637 ( ( uint32_t ) pxBottomOfStack ) |
\r
638 ( portMPU_REGION_VALID ) |
\r
639 ( portSTACK_REGION ); /* Region number. */
\r
641 xMPUSettings->xRegion[ 0 ].ulRegionAttribute =
\r
642 ( portMPU_REGION_READ_WRITE ) | /* Read and write. */
\r
643 ( prvGetMPURegionSizeSetting( ( uint32_t ) usStackDepth * ( uint32_t ) sizeof( StackType_t ) ) ) |
\r
644 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
\r
645 ( portMPU_REGION_ENABLE );
\r
650 for( ul = 1; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )
\r
652 if( ( xRegions[ lIndex ] ).ulLengthInBytes > 0UL )
\r
654 /* Translate the generic region definition contained in
\r
655 xRegions into the CM3 specific MPU settings that are then
\r
656 stored in xMPUSettings. */
\r
657 xMPUSettings->xRegion[ ul ].ulRegionBaseAddress =
\r
658 ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) |
\r
659 ( portMPU_REGION_VALID ) |
\r
660 ( portSTACK_REGION + ul ); /* Region number. */
\r
662 xMPUSettings->xRegion[ ul ].ulRegionAttribute =
\r
663 ( prvGetMPURegionSizeSetting( xRegions[ lIndex ].ulLengthInBytes ) ) |
\r
664 ( xRegions[ lIndex ].ulParameters ) |
\r
665 ( portMPU_REGION_ENABLE );
\r
669 /* Invalidate the region. */
\r
670 xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;
\r
671 xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;
\r
678 /*-----------------------------------------------------------*/
\r
680 BaseType_t MPU_xTaskGenericCreate( TaskFunction_t pvTaskCode, const char * const pcName, uint16_t usStackDepth, void *pvParameters, UBaseType_t uxPriority, TaskHandle_t *pxCreatedTask, StackType_t *puxStackBuffer, const MemoryRegion_t * const xRegions )
\r
682 BaseType_t xReturn;
\r
683 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
685 xReturn = xTaskGenericCreate( pvTaskCode, pcName, usStackDepth, pvParameters, uxPriority, pxCreatedTask, puxStackBuffer, xRegions );
\r
686 portRESET_PRIVILEGE( xRunningPrivileged );
\r
689 /*-----------------------------------------------------------*/
\r
691 void MPU_vTaskAllocateMPURegions( TaskHandle_t xTask, const MemoryRegion_t * const xRegions )
\r
693 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
695 vTaskAllocateMPURegions( xTask, xRegions );
\r
696 portRESET_PRIVILEGE( xRunningPrivileged );
\r
698 /*-----------------------------------------------------------*/
\r
700 #if ( INCLUDE_vTaskDelete == 1 )
\r
701 void MPU_vTaskDelete( TaskHandle_t pxTaskToDelete )
\r
703 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
705 vTaskDelete( pxTaskToDelete );
\r
706 portRESET_PRIVILEGE( xRunningPrivileged );
\r
709 /*-----------------------------------------------------------*/
\r
711 #if ( INCLUDE_vTaskDelayUntil == 1 )
\r
712 void MPU_vTaskDelayUntil( TickType_t * const pxPreviousWakeTime, TickType_t xTimeIncrement )
\r
714 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
716 vTaskDelayUntil( pxPreviousWakeTime, xTimeIncrement );
\r
717 portRESET_PRIVILEGE( xRunningPrivileged );
\r
720 /*-----------------------------------------------------------*/
\r
722 #if ( INCLUDE_vTaskDelay == 1 )
\r
723 void MPU_vTaskDelay( TickType_t xTicksToDelay )
\r
725 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
727 vTaskDelay( xTicksToDelay );
\r
728 portRESET_PRIVILEGE( xRunningPrivileged );
\r
731 /*-----------------------------------------------------------*/
\r
733 #if ( INCLUDE_uxTaskPriorityGet == 1 )
\r
734 UBaseType_t MPU_uxTaskPriorityGet( TaskHandle_t pxTask )
\r
736 UBaseType_t uxReturn;
\r
737 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
739 uxReturn = uxTaskPriorityGet( pxTask );
\r
740 portRESET_PRIVILEGE( xRunningPrivileged );
\r
744 /*-----------------------------------------------------------*/
\r
746 #if ( INCLUDE_vTaskPrioritySet == 1 )
\r
747 void MPU_vTaskPrioritySet( TaskHandle_t pxTask, UBaseType_t uxNewPriority )
\r
749 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
751 vTaskPrioritySet( pxTask, uxNewPriority );
\r
752 portRESET_PRIVILEGE( xRunningPrivileged );
\r
755 /*-----------------------------------------------------------*/
\r
757 #if ( INCLUDE_eTaskGetState == 1 )
\r
758 eTaskState MPU_eTaskGetState( TaskHandle_t pxTask )
\r
760 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
761 eTaskState eReturn;
\r
763 eReturn = eTaskGetState( pxTask );
\r
764 portRESET_PRIVILEGE( xRunningPrivileged );
\r
768 /*-----------------------------------------------------------*/
\r
770 #if ( INCLUDE_xTaskGetIdleTaskHandle == 1 )
\r
771 TaskHandle_t MPU_xTaskGetIdleTaskHandle( void )
\r
773 TaskHandle_t xReturn;
\r
774 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
776 xReturn = xTaskGetIdleTaskHandle();
\r
777 portRESET_PRIVILEGE( xRunningPrivileged );
\r
781 /*-----------------------------------------------------------*/
\r
783 #if ( INCLUDE_vTaskSuspend == 1 )
\r
784 void MPU_vTaskSuspend( TaskHandle_t pxTaskToSuspend )
\r
786 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
788 vTaskSuspend( pxTaskToSuspend );
\r
789 portRESET_PRIVILEGE( xRunningPrivileged );
\r
792 /*-----------------------------------------------------------*/
\r
794 #if ( INCLUDE_vTaskSuspend == 1 )
\r
795 void MPU_vTaskResume( TaskHandle_t pxTaskToResume )
\r
797 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
799 vTaskResume( pxTaskToResume );
\r
800 portRESET_PRIVILEGE( xRunningPrivileged );
\r
803 /*-----------------------------------------------------------*/
\r
805 void MPU_vTaskSuspendAll( void )
\r
807 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
810 portRESET_PRIVILEGE( xRunningPrivileged );
\r
812 /*-----------------------------------------------------------*/
\r
814 BaseType_t MPU_xTaskResumeAll( void )
\r
816 BaseType_t xReturn;
\r
817 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
819 xReturn = xTaskResumeAll();
\r
820 portRESET_PRIVILEGE( xRunningPrivileged );
\r
823 /*-----------------------------------------------------------*/
\r
825 TickType_t MPU_xTaskGetTickCount( void )
\r
827 TickType_t xReturn;
\r
828 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
830 xReturn = xTaskGetTickCount();
\r
831 portRESET_PRIVILEGE( xRunningPrivileged );
\r
834 /*-----------------------------------------------------------*/
\r
836 UBaseType_t MPU_uxTaskGetNumberOfTasks( void )
\r
838 UBaseType_t uxReturn;
\r
839 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
841 uxReturn = uxTaskGetNumberOfTasks();
\r
842 portRESET_PRIVILEGE( xRunningPrivileged );
\r
845 /*-----------------------------------------------------------*/
\r
847 #if ( configUSE_TRACE_FACILITY == 1 )
\r
848 void MPU_vTaskList( char *pcWriteBuffer )
\r
850 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
852 vTaskList( pcWriteBuffer );
\r
853 portRESET_PRIVILEGE( xRunningPrivileged );
\r
856 /*-----------------------------------------------------------*/
\r
858 #if ( configGENERATE_RUN_TIME_STATS == 1 )
\r
859 void MPU_vTaskGetRunTimeStats( char *pcWriteBuffer )
\r
861 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
863 vTaskGetRunTimeStats( pcWriteBuffer );
\r
864 portRESET_PRIVILEGE( xRunningPrivileged );
\r
867 /*-----------------------------------------------------------*/
\r
869 #if ( configUSE_APPLICATION_TASK_TAG == 1 )
\r
870 void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, TaskHookFunction_t pxTagValue )
\r
872 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
874 vTaskSetApplicationTaskTag( xTask, pxTagValue );
\r
875 portRESET_PRIVILEGE( xRunningPrivileged );
\r
878 /*-----------------------------------------------------------*/
\r
880 #if ( configUSE_APPLICATION_TASK_TAG == 1 )
\r
881 TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask )
\r
883 TaskHookFunction_t xReturn;
\r
884 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
886 xReturn = xTaskGetApplicationTaskTag( xTask );
\r
887 portRESET_PRIVILEGE( xRunningPrivileged );
\r
891 /*-----------------------------------------------------------*/
\r
893 #if ( configUSE_APPLICATION_TASK_TAG == 1 )
\r
894 BaseType_t MPU_xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter )
\r
896 BaseType_t xReturn;
\r
897 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
899 xReturn = xTaskCallApplicationTaskHook( xTask, pvParameter );
\r
900 portRESET_PRIVILEGE( xRunningPrivileged );
\r
904 /*-----------------------------------------------------------*/
\r
906 #if ( configUSE_TRACE_FACILITY == 1 )
\r
907 UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t *pxTaskStatusArray, UBaseType_t uxArraySize, uint32_t *pulTotalRunTime )
\r
909 UBaseType_t uxReturn;
\r
910 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
912 uxReturn = uxTaskGetSystemState( pxTaskStatusArray, uxArraySize, pulTotalRunTime );
\r
913 portRESET_PRIVILEGE( xRunningPrivileged );
\r
917 /*-----------------------------------------------------------*/
\r
919 #if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 )
\r
920 UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask )
\r
922 UBaseType_t uxReturn;
\r
923 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
925 uxReturn = uxTaskGetStackHighWaterMark( xTask );
\r
926 portRESET_PRIVILEGE( xRunningPrivileged );
\r
930 /*-----------------------------------------------------------*/
\r
932 #if ( INCLUDE_xTaskGetCurrentTaskHandle == 1 )
\r
933 TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void )
\r
935 TaskHandle_t xReturn;
\r
936 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
938 xReturn = xTaskGetCurrentTaskHandle();
\r
939 portRESET_PRIVILEGE( xRunningPrivileged );
\r
943 /*-----------------------------------------------------------*/
\r
945 #if ( INCLUDE_xTaskGetSchedulerState == 1 )
\r
946 BaseType_t MPU_xTaskGetSchedulerState( void )
\r
948 BaseType_t xReturn;
\r
949 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
951 xReturn = xTaskGetSchedulerState();
\r
952 portRESET_PRIVILEGE( xRunningPrivileged );
\r
956 /*-----------------------------------------------------------*/
\r
958 QueueHandle_t MPU_xQueueGenericCreate( UBaseType_t uxQueueLength, UBaseType_t uxItemSize, uint8_t ucQueueType )
\r
960 QueueHandle_t xReturn;
\r
961 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
963 xReturn = xQueueGenericCreate( uxQueueLength, uxItemSize, ucQueueType );
\r
964 portRESET_PRIVILEGE( xRunningPrivileged );
\r
967 /*-----------------------------------------------------------*/
\r
969 BaseType_t MPU_xQueueGenericReset( QueueHandle_t pxQueue, BaseType_t xNewQueue )
\r
971 BaseType_t xReturn;
\r
972 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
974 xReturn = xQueueGenericReset( pxQueue, xNewQueue );
\r
975 portRESET_PRIVILEGE( xRunningPrivileged );
\r
978 /*-----------------------------------------------------------*/
\r
980 BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, BaseType_t xCopyPosition )
\r
982 BaseType_t xReturn;
\r
983 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
985 xReturn = xQueueGenericSend( xQueue, pvItemToQueue, xTicksToWait, xCopyPosition );
\r
986 portRESET_PRIVILEGE( xRunningPrivileged );
\r
989 /*-----------------------------------------------------------*/
\r
991 UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t pxQueue )
\r
993 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
994 UBaseType_t uxReturn;
\r
996 uxReturn = uxQueueMessagesWaiting( pxQueue );
\r
997 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1000 /*-----------------------------------------------------------*/
\r
1002 BaseType_t MPU_xQueueGenericReceive( QueueHandle_t pxQueue, void * const pvBuffer, TickType_t xTicksToWait, BaseType_t xJustPeeking )
\r
1004 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
1005 BaseType_t xReturn;
\r
1007 xReturn = xQueueGenericReceive( pxQueue, pvBuffer, xTicksToWait, xJustPeeking );
\r
1008 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1011 /*-----------------------------------------------------------*/
\r
1013 BaseType_t MPU_xQueuePeekFromISR( QueueHandle_t pxQueue, void * const pvBuffer )
\r
1015 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
1016 BaseType_t xReturn;
\r
1018 xReturn = xQueuePeekFromISR( pxQueue, pvBuffer );
\r
1019 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1022 /*-----------------------------------------------------------*/
\r
1024 void* MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore )
\r
1026 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
1029 xReturn = ( void * ) xQueueGetMutexHolder( xSemaphore );
\r
1030 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1033 /*-----------------------------------------------------------*/
\r
1035 #if ( configUSE_MUTEXES == 1 )
\r
1036 QueueHandle_t MPU_xQueueCreateMutex( void )
\r
1038 QueueHandle_t xReturn;
\r
1039 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
1041 xReturn = xQueueCreateMutex( queueQUEUE_TYPE_MUTEX );
\r
1042 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1046 /*-----------------------------------------------------------*/
\r
1048 #if configUSE_COUNTING_SEMAPHORES == 1
\r
1049 QueueHandle_t MPU_xQueueCreateCountingSemaphore( UBaseType_t uxCountValue, UBaseType_t uxInitialCount )
\r
1051 QueueHandle_t xReturn;
\r
1052 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
1054 xReturn = xQueueCreateCountingSemaphore( uxCountValue, uxInitialCount );
\r
1055 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1059 /*-----------------------------------------------------------*/
\r
1061 #if ( configUSE_MUTEXES == 1 )
\r
1062 BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, TickType_t xBlockTime )
\r
1064 BaseType_t xReturn;
\r
1065 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
1067 xReturn = xQueueTakeMutexRecursive( xMutex, xBlockTime );
\r
1068 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1072 /*-----------------------------------------------------------*/
\r
1074 #if ( configUSE_MUTEXES == 1 )
\r
1075 BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t xMutex )
\r
1077 BaseType_t xReturn;
\r
1078 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
1080 xReturn = xQueueGiveMutexRecursive( xMutex );
\r
1081 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1085 /*-----------------------------------------------------------*/
\r
1087 #if ( configUSE_QUEUE_SETS == 1 )
\r
1088 QueueSetHandle_t MPU_xQueueCreateSet( UBaseType_t uxEventQueueLength )
\r
1090 QueueSetHandle_t xReturn;
\r
1091 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
1093 xReturn = xQueueCreateSet( uxEventQueueLength );
\r
1094 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1098 /*-----------------------------------------------------------*/
\r
1100 #if ( configUSE_QUEUE_SETS == 1 )
\r
1101 QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, TickType_t xBlockTimeTicks )
\r
1103 QueueSetMemberHandle_t xReturn;
\r
1104 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
1106 xReturn = xQueueSelectFromSet( xQueueSet, xBlockTimeTicks );
\r
1107 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1111 /*-----------------------------------------------------------*/
\r
1113 #if ( configUSE_QUEUE_SETS == 1 )
\r
1114 BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet )
\r
1116 BaseType_t xReturn;
\r
1117 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
1119 xReturn = xQueueAddToSet( xQueueOrSemaphore, xQueueSet );
\r
1120 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1124 /*-----------------------------------------------------------*/
\r
1126 #if ( configUSE_QUEUE_SETS == 1 )
\r
1127 BaseType_t MPU_xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet )
\r
1129 BaseType_t xReturn;
\r
1130 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
1132 xReturn = xQueueRemoveFromSet( xQueueOrSemaphore, xQueueSet );
\r
1133 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1137 /*-----------------------------------------------------------*/
\r
1139 #if configUSE_ALTERNATIVE_API == 1
\r
1140 BaseType_t MPU_xQueueAltGenericSend( QueueHandle_t pxQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, BaseType_t xCopyPosition )
\r
1142 BaseType_t xReturn;
\r
1143 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
1145 xReturn = BaseType_t xQueueAltGenericSend( pxQueue, pvItemToQueue, xTicksToWait, xCopyPosition );
\r
1146 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1150 /*-----------------------------------------------------------*/
\r
1152 #if configUSE_ALTERNATIVE_API == 1
\r
1153 BaseType_t MPU_xQueueAltGenericReceive( QueueHandle_t pxQueue, void * const pvBuffer, TickType_t xTicksToWait, BaseType_t xJustPeeking )
\r
1155 BaseType_t xReturn;
\r
1156 BaseType_t xRunningPrivileged = prvRaisePrivilege();
\r
1158 xReturn = xQueueAltGenericReceive( pxQueue, pvBuffer, xTicksToWait, xJustPeeking );
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1159 portRESET_PRIVILEGE( xRunningPrivileged );
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1163 /*-----------------------------------------------------------*/
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1165 #if configQUEUE_REGISTRY_SIZE > 0
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1166 void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, char *pcName )
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1168 BaseType_t xRunningPrivileged = prvRaisePrivilege();
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1170 vQueueAddToRegistry( xQueue, pcName );
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1172 portRESET_PRIVILEGE( xRunningPrivileged );
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1175 /*-----------------------------------------------------------*/
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1177 void MPU_vQueueDelete( QueueHandle_t xQueue )
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1179 BaseType_t xRunningPrivileged = prvRaisePrivilege();
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1181 vQueueDelete( xQueue );
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1183 portRESET_PRIVILEGE( xRunningPrivileged );
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1185 /*-----------------------------------------------------------*/
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1187 void *MPU_pvPortMalloc( size_t xSize )
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1190 BaseType_t xRunningPrivileged = prvRaisePrivilege();
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1192 pvReturn = pvPortMalloc( xSize );
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1194 portRESET_PRIVILEGE( xRunningPrivileged );
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1198 /*-----------------------------------------------------------*/
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1200 void MPU_vPortFree( void *pv )
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1202 BaseType_t xRunningPrivileged = prvRaisePrivilege();
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1206 portRESET_PRIVILEGE( xRunningPrivileged );
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1208 /*-----------------------------------------------------------*/
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1210 void MPU_vPortInitialiseBlocks( void )
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1212 BaseType_t xRunningPrivileged = prvRaisePrivilege();
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1214 vPortInitialiseBlocks();
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1216 portRESET_PRIVILEGE( xRunningPrivileged );
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1218 /*-----------------------------------------------------------*/
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1220 size_t MPU_xPortGetFreeHeapSize( void )
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1223 BaseType_t xRunningPrivileged = prvRaisePrivilege();
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1225 xReturn = xPortGetFreeHeapSize();
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1227 portRESET_PRIVILEGE( xRunningPrivileged );
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1232 /* Functions that the application writer wants to execute in privileged mode
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1233 can be defined in application_defined_privileged_functions.h. The functions
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1234 must take the same format as those above whereby the privilege state on exit
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1235 equals the privilege state on entry. For example:
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1237 void MPU_FunctionName( [parameters ] )
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1239 BaseType_t xRunningPrivileged = prvRaisePrivilege();
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1241 FunctionName( [parameters ] );
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1243 portRESET_PRIVILEGE( xRunningPrivileged );
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1247 #if configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS == 1
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1248 #include "application_defined_privileged_functions.h"
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