2 FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 ***************************************************************************
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9 * FreeRTOS provides completely free yet professionally developed, *
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10 * robust, strictly quality controlled, supported, and cross *
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11 * platform software that has become a de facto standard. *
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13 * Help yourself get started quickly and support the FreeRTOS *
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14 * project by purchasing a FreeRTOS tutorial book, reference *
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15 * manual, or both from: http://www.FreeRTOS.org/Documentation *
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19 ***************************************************************************
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21 This file is part of the FreeRTOS distribution.
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23 FreeRTOS is free software; you can redistribute it and/or modify it under
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24 the terms of the GNU General Public License (version 2) as published by the
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25 Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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27 >>! NOTE: The modification to the GPL is included to allow you to distribute
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28 >>! a combined work that includes FreeRTOS without being obliged to provide
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29 >>! the source code for proprietary components outside of the FreeRTOS
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32 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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33 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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34 FOR A PARTICULAR PURPOSE. Full license text is available from the following
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35 link: http://www.freertos.org/a00114.html
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39 ***************************************************************************
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41 * Having a problem? Start by reading the FAQ "My application does *
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42 * not run, what could be wrong?" *
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44 * http://www.FreeRTOS.org/FAQHelp.html *
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46 ***************************************************************************
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48 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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49 license and Real Time Engineers Ltd. contact details.
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51 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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52 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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53 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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55 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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56 Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
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57 licenses offer ticketed support, indemnification and middleware.
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59 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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60 engineered and independently SIL3 certified version for use in safety and
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61 mission critical applications that require provable dependability.
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66 /*-----------------------------------------------------------
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67 * Implementation of functions defined in portable.h for the ARM CM3 port.
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68 *----------------------------------------------------------*/
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70 /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
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71 all the API functions to use the MPU wrappers. That should only be done when
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72 task.h is included from an application file. */
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73 #define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
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75 /* Scheduler includes. */
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76 #include "FreeRTOS.h"
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80 #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
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82 /* Constants required to access and manipulate the NVIC. */
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83 #define portNVIC_SYSTICK_CTRL ( ( volatile unsigned long * ) 0xe000e010 )
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84 #define portNVIC_SYSTICK_LOAD ( ( volatile unsigned long * ) 0xe000e014 )
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85 #define portNVIC_SYSPRI2 ( ( volatile unsigned long * ) 0xe000ed20 )
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86 #define portNVIC_SYSPRI1 ( ( volatile unsigned long * ) 0xe000ed1c )
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87 #define portNVIC_SYS_CTRL_STATE ( ( volatile unsigned long * ) 0xe000ed24 )
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88 #define portNVIC_MEM_FAULT_ENABLE ( 1UL << 16UL )
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90 /* Constants required to access and manipulate the MPU. */
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91 #define portMPU_TYPE ( ( volatile unsigned long * ) 0xe000ed90 )
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92 #define portMPU_REGION_BASE_ADDRESS ( ( volatile unsigned long * ) 0xe000ed9C )
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93 #define portMPU_REGION_ATTRIBUTE ( ( volatile unsigned long * ) 0xe000edA0 )
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94 #define portMPU_CTRL ( ( volatile unsigned long * ) 0xe000ed94 )
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95 #define portEXPECTED_MPU_TYPE_VALUE ( 8UL << 8UL ) /* 8 regions, unified. */
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96 #define portMPU_ENABLE ( 0x01UL )
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97 #define portMPU_BACKGROUND_ENABLE ( 1UL << 2UL )
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98 #define portPRIVILEGED_EXECUTION_START_ADDRESS ( 0UL )
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99 #define portMPU_REGION_VALID ( 0x10UL )
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100 #define portMPU_REGION_ENABLE ( 0x01UL )
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101 #define portPERIPHERALS_START_ADDRESS 0x40000000UL
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102 #define portPERIPHERALS_END_ADDRESS 0x5FFFFFFFUL
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104 /* Constants required to access and manipulate the SysTick. */
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105 #define portNVIC_SYSTICK_CLK ( 0x00000004UL )
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106 #define portNVIC_SYSTICK_INT ( 0x00000002UL )
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107 #define portNVIC_SYSTICK_ENABLE ( 0x00000001UL )
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108 #define portNVIC_PENDSV_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
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109 #define portNVIC_SYSTICK_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
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110 #define portNVIC_SVC_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
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112 /* Constants required to set up the initial stack. */
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113 #define portINITIAL_XPSR ( 0x01000000 )
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114 #define portINITIAL_CONTROL_IF_UNPRIVILEGED ( 0x03 )
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115 #define portINITIAL_CONTROL_IF_PRIVILEGED ( 0x02 )
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117 /* Offsets in the stack to the parameters when inside the SVC handler. */
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118 #define portOFFSET_TO_PC ( 6 )
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120 /* Set the privilege level to user mode if xRunningPrivileged is false. */
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121 #define portRESET_PRIVILEGE( xRunningPrivileged ) if( xRunningPrivileged != pdTRUE ) __asm volatile ( " mrs r0, control \n orr r0, #1 \n msr control, r0" :::"r0" )
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123 /* Each task maintains its own interrupt status in the critical nesting
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124 variable. Note this is not saved as part of the task context as context
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125 switches can only occur when uxCriticalNesting is zero. */
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126 static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;
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129 * Setup the timer to generate the tick interrupts.
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131 static void prvSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;
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134 * Configure a number of standard MPU regions that are used by all tasks.
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136 static void prvSetupMPU( void ) PRIVILEGED_FUNCTION;
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139 * Return the smallest MPU region size that a given number of bytes will fit
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140 * into. The region size is returned as the value that should be programmed
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141 * into the region attribute register for that region.
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143 static unsigned long prvGetMPURegionSizeSetting( unsigned long ulActualSizeInBytes ) PRIVILEGED_FUNCTION;
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146 * Checks to see if being called from the context of an unprivileged task, and
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147 * if so raises the privilege level and returns false - otherwise does nothing
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148 * other than return true.
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150 static portBASE_TYPE prvRaisePrivilege( void ) __attribute__(( naked ));
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153 * Standard FreeRTOS exception handlers.
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155 void xPortPendSVHandler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
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156 void xPortSysTickHandler( void ) __attribute__ ((optimize("3"))) PRIVILEGED_FUNCTION;
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157 void vPortSVCHandler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
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160 * Starts the scheduler by restoring the context of the first task to run.
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162 static void prvRestoreContextOfFirstTask( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION;
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165 * C portion of the SVC handler. The SVC handler is split between an asm entry
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166 * and a C wrapper for simplicity of coding and maintenance.
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168 static void prvSVCHandler( unsigned long *pulRegisters ) __attribute__(( noinline )) PRIVILEGED_FUNCTION;
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171 * Prototypes for all the MPU wrappers.
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173 signed portBASE_TYPE MPU_xTaskGenericCreate( pdTASK_CODE pvTaskCode, const signed char * const pcName, unsigned short usStackDepth, void *pvParameters, unsigned portBASE_TYPE uxPriority, xTaskHandle *pxCreatedTask, portSTACK_TYPE *puxStackBuffer, const xMemoryRegion * const xRegions );
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174 void MPU_vTaskAllocateMPURegions( xTaskHandle xTask, const xMemoryRegion * const xRegions );
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175 void MPU_vTaskDelete( xTaskHandle pxTaskToDelete );
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176 void MPU_vTaskDelayUntil( portTickType * const pxPreviousWakeTime, portTickType xTimeIncrement );
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177 void MPU_vTaskDelay( portTickType xTicksToDelay );
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178 unsigned portBASE_TYPE MPU_uxTaskPriorityGet( xTaskHandle pxTask );
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179 void MPU_vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority );
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180 eTaskState MPU_eTaskGetState( xTaskHandle pxTask );
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181 void MPU_vTaskSuspend( xTaskHandle pxTaskToSuspend );
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182 signed portBASE_TYPE MPU_xTaskIsTaskSuspended( xTaskHandle xTask );
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183 void MPU_vTaskResume( xTaskHandle pxTaskToResume );
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184 void MPU_vTaskSuspendAll( void );
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185 signed portBASE_TYPE MPU_xTaskResumeAll( void );
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186 portTickType MPU_xTaskGetTickCount( void );
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187 unsigned portBASE_TYPE MPU_uxTaskGetNumberOfTasks( void );
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188 void MPU_vTaskList( signed char *pcWriteBuffer );
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189 void MPU_vTaskGetRunTimeStats( signed char *pcWriteBuffer );
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190 void MPU_vTaskSetApplicationTaskTag( xTaskHandle xTask, pdTASK_HOOK_CODE pxTagValue );
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191 pdTASK_HOOK_CODE MPU_xTaskGetApplicationTaskTag( xTaskHandle xTask );
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192 portBASE_TYPE MPU_xTaskCallApplicationTaskHook( xTaskHandle xTask, void *pvParameter );
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193 unsigned portBASE_TYPE MPU_uxTaskGetStackHighWaterMark( xTaskHandle xTask );
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194 xTaskHandle MPU_xTaskGetCurrentTaskHandle( void );
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195 portBASE_TYPE MPU_xTaskGetSchedulerState( void );
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196 xTaskHandle MPU_xTaskGetIdleTaskHandle( void );
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197 unsigned portBASE_TYPE MPU_uxTaskGetSystemState( xTaskStatusType *pxTaskStatusArray, unsigned portBASE_TYPE uxArraySize, unsigned long *pulTotalRunTime );
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198 xQueueHandle MPU_xQueueGenericCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize, unsigned char ucQueueType );
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199 signed portBASE_TYPE MPU_xQueueGenericSend( xQueueHandle xQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition );
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200 portBASE_TYPE MPU_xQueueGenericReset( xQueueHandle pxQueue, portBASE_TYPE xNewQueue );
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201 unsigned portBASE_TYPE MPU_uxQueueMessagesWaiting( const xQueueHandle pxQueue );
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202 signed portBASE_TYPE MPU_xQueueGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking );
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203 xQueueHandle MPU_xQueueCreateMutex( void );
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204 xQueueHandle MPU_xQueueCreateCountingSemaphore( unsigned portBASE_TYPE uxCountValue, unsigned portBASE_TYPE uxInitialCount );
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205 portBASE_TYPE MPU_xQueueTakeMutexRecursive( xQueueHandle xMutex, portTickType xBlockTime );
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206 portBASE_TYPE MPU_xQueueGiveMutexRecursive( xQueueHandle xMutex );
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207 signed portBASE_TYPE MPU_xQueueAltGenericSend( xQueueHandle pxQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition );
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208 signed portBASE_TYPE MPU_xQueueAltGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking );
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209 void MPU_vQueueAddToRegistry( xQueueHandle xQueue, signed char *pcName );
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210 void MPU_vQueueDelete( xQueueHandle xQueue );
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211 void *MPU_pvPortMalloc( size_t xSize );
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212 void MPU_vPortFree( void *pv );
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213 void MPU_vPortInitialiseBlocks( void );
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214 size_t MPU_xPortGetFreeHeapSize( void );
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215 xQueueSetHandle MPU_xQueueCreateSet( unsigned portBASE_TYPE uxEventQueueLength );
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216 xQueueSetMemberHandle MPU_xQueueSelectFromSet( xQueueSetHandle xQueueSet, portTickType xBlockTimeTicks );
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217 portBASE_TYPE MPU_xQueueAddToSet( xQueueSetMemberHandle xQueueOrSemaphore, xQueueSetHandle xQueueSet );
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218 portBASE_TYPE MPU_xQueueRemoveFromSet( xQueueSetMemberHandle xQueueOrSemaphore, xQueueSetHandle xQueueSet );
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219 signed portBASE_TYPE MPU_xQueuePeekFromISR( xQueueHandle xQueue, void * const pvBuffer );
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221 /*-----------------------------------------------------------*/
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224 * See header file for description.
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226 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters, portBASE_TYPE xRunPrivileged )
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228 /* Simulate the stack frame as it would be created by a context switch
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230 pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
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231 *pxTopOfStack = portINITIAL_XPSR; /* xPSR */
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233 *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* PC */
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235 *pxTopOfStack = 0; /* LR */
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236 pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
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237 *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
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238 pxTopOfStack -= 9; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
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240 if( xRunPrivileged == pdTRUE )
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242 *pxTopOfStack = portINITIAL_CONTROL_IF_PRIVILEGED;
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246 *pxTopOfStack = portINITIAL_CONTROL_IF_UNPRIVILEGED;
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249 return pxTopOfStack;
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251 /*-----------------------------------------------------------*/
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253 void vPortSVCHandler( void )
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255 /* Assumes psp was in use. */
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258 #ifndef USE_PROCESS_STACK /* Code should not be required if a main() is using the process stack. */
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261 " mrseq r0, msp \n"
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262 " mrsne r0, psp \n"
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267 ::"i"(prvSVCHandler):"r0"
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270 /*-----------------------------------------------------------*/
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272 static void prvSVCHandler( unsigned long *pulParam )
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274 unsigned char ucSVCNumber;
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276 /* The stack contains: r0, r1, r2, r3, r12, r14, the return address and
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277 xPSR. The first argument (r0) is pulParam[ 0 ]. */
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278 ucSVCNumber = ( ( unsigned char * ) pulParam[ portOFFSET_TO_PC ] )[ -2 ];
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279 switch( ucSVCNumber )
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281 case portSVC_START_SCHEDULER : *(portNVIC_SYSPRI1) |= portNVIC_SVC_PRI;
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282 prvRestoreContextOfFirstTask();
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285 case portSVC_YIELD : *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
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286 /* Barriers are normally not required
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287 but do ensure the code is completely
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288 within the specified behaviour for the
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290 __asm volatile( "dsb" );
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291 __asm volatile( "isb" );
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295 case portSVC_RAISE_PRIVILEGE : __asm volatile
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297 " mrs r1, control \n" /* Obtain current control value. */
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298 " bic r1, #1 \n" /* Set privilege bit. */
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299 " msr control, r1 \n" /* Write back new control value. */
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304 default : /* Unknown SVC call. */
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308 /*-----------------------------------------------------------*/
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310 static void prvRestoreContextOfFirstTask( void )
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314 " ldr r0, =0xE000ED08 \n" /* Use the NVIC offset register to locate the stack. */
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317 " msr msp, r0 \n" /* Set the msp back to the start of the stack. */
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318 " ldr r3, pxCurrentTCBConst2 \n" /* Restore the context. */
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320 " ldr r0, [r1] \n" /* The first item in the TCB is the task top of stack. */
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321 " add r1, r1, #4 \n" /* Move onto the second item in the TCB... */
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322 " ldr r2, =0xe000ed9c \n" /* Region Base Address register. */
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323 " ldmia r1!, {r4-r11} \n" /* Read 4 sets of MPU registers. */
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324 " stmia r2!, {r4-r11} \n" /* Write 4 sets of MPU registers. */
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325 " ldmia r0!, {r3, r4-r11} \n" /* Pop the registers that are not automatically saved on exception entry. */
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326 " msr control, r3 \n"
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327 " msr psp, r0 \n" /* Restore the task stack pointer. */
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329 " msr basepri, r0 \n"
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330 " ldr r14, =0xfffffffd \n" /* Load exec return code. */
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334 "pxCurrentTCBConst2: .word pxCurrentTCB \n"
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337 /*-----------------------------------------------------------*/
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340 * See header file for description.
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342 portBASE_TYPE xPortStartScheduler( void )
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344 /* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0. See
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345 http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
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346 configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) );
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348 /* Make PendSV and SysTick the same priority as the kernel. */
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349 *(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;
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350 *(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;
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352 /* Configure the regions in the MPU that are common to all tasks. */
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355 /* Start the timer that generates the tick ISR. Interrupts are disabled
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357 prvSetupTimerInterrupt();
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359 /* Initialise the critical nesting count ready for the first task. */
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360 uxCriticalNesting = 0;
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362 /* Start the first task. */
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363 __asm volatile( " svc %0 \n"
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364 :: "i" (portSVC_START_SCHEDULER) );
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366 /* Should not get here! */
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369 /*-----------------------------------------------------------*/
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371 void vPortEndScheduler( void )
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373 /* Not implemented in ports where there is nothing to return to.
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374 Artificially force an assert. */
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375 configASSERT( uxCriticalNesting == 1000UL );
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377 /*-----------------------------------------------------------*/
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379 void vPortEnterCritical( void )
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381 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
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383 portDISABLE_INTERRUPTS();
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384 uxCriticalNesting++;
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386 portRESET_PRIVILEGE( xRunningPrivileged );
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388 /*-----------------------------------------------------------*/
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390 void vPortExitCritical( void )
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392 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
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394 configASSERT( uxCriticalNesting );
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395 uxCriticalNesting--;
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396 if( uxCriticalNesting == 0 )
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398 portENABLE_INTERRUPTS();
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400 portRESET_PRIVILEGE( xRunningPrivileged );
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402 /*-----------------------------------------------------------*/
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404 void xPortPendSVHandler( void )
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406 /* This is a naked function. */
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412 " ldr r3, pxCurrentTCBConst \n" /* Get the location of the current TCB. */
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415 " mrs r1, control \n"
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416 " stmdb r0!, {r1, r4-r11} \n" /* Save the remaining registers. */
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417 " str r0, [r2] \n" /* Save the new top of stack into the first member of the TCB. */
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419 " stmdb sp!, {r3, r14} \n"
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421 " msr basepri, r0 \n"
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422 " bl vTaskSwitchContext \n"
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424 " msr basepri, r0 \n"
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425 " ldmia sp!, {r3, r14} \n"
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426 " \n" /* Restore the context. */
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428 " ldr r0, [r1] \n" /* The first item in the TCB is the task top of stack. */
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429 " add r1, r1, #4 \n" /* Move onto the second item in the TCB... */
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430 " ldr r2, =0xe000ed9c \n" /* Region Base Address register. */
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431 " ldmia r1!, {r4-r11} \n" /* Read 4 sets of MPU registers. */
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432 " stmia r2!, {r4-r11} \n" /* Write 4 sets of MPU registers. */
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433 " ldmia r0!, {r3, r4-r11} \n" /* Pop the registers that are not automatically saved on exception entry. */
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434 " msr control, r3 \n"
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440 "pxCurrentTCBConst: .word pxCurrentTCB \n"
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441 ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)
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444 /*-----------------------------------------------------------*/
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446 void xPortSysTickHandler( void )
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448 unsigned long ulDummy;
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450 ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();
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452 /* Increment the RTOS tick. */
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453 if( xTaskIncrementTick() != pdFALSE )
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455 /* Pend a context switch. */
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456 *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
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459 portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy );
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461 /*-----------------------------------------------------------*/
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464 * Setup the systick timer to generate the tick interrupts at the required
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467 static void prvSetupTimerInterrupt( void )
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469 /* Configure SysTick to interrupt at the requested rate. */
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470 *(portNVIC_SYSTICK_LOAD) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
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471 *(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;
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473 /*-----------------------------------------------------------*/
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475 static void prvSetupMPU( void )
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477 extern unsigned long __privileged_functions_end__[];
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478 extern unsigned long __FLASH_segment_start__[];
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479 extern unsigned long __FLASH_segment_end__[];
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480 extern unsigned long __privileged_data_start__[];
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481 extern unsigned long __privileged_data_end__[];
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483 /* Check the expected MPU is present. */
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484 if( *portMPU_TYPE == portEXPECTED_MPU_TYPE_VALUE )
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486 /* First setup the entire flash for unprivileged read only access. */
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487 *portMPU_REGION_BASE_ADDRESS = ( ( unsigned long ) __FLASH_segment_start__ ) | /* Base address. */
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488 ( portMPU_REGION_VALID ) |
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489 ( portUNPRIVILEGED_FLASH_REGION );
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491 *portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_READ_ONLY ) |
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492 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
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493 ( prvGetMPURegionSizeSetting( ( unsigned long ) __FLASH_segment_end__ - ( unsigned long ) __FLASH_segment_start__ ) ) |
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494 ( portMPU_REGION_ENABLE );
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496 /* Setup the first 16K for privileged only access (even though less
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497 than 10K is actually being used). This is where the kernel code is
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499 *portMPU_REGION_BASE_ADDRESS = ( ( unsigned long ) __FLASH_segment_start__ ) | /* Base address. */
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500 ( portMPU_REGION_VALID ) |
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501 ( portPRIVILEGED_FLASH_REGION );
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503 *portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_PRIVILEGED_READ_ONLY ) |
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504 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
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505 ( prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_functions_end__ - ( unsigned long ) __FLASH_segment_start__ ) ) |
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506 ( portMPU_REGION_ENABLE );
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508 /* Setup the privileged data RAM region. This is where the kernel data
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510 *portMPU_REGION_BASE_ADDRESS = ( ( unsigned long ) __privileged_data_start__ ) | /* Base address. */
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511 ( portMPU_REGION_VALID ) |
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512 ( portPRIVILEGED_RAM_REGION );
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514 *portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
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515 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
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516 prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_data_end__ - ( unsigned long ) __privileged_data_start__ ) |
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517 ( portMPU_REGION_ENABLE );
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519 /* By default allow everything to access the general peripherals. The
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520 system peripherals and registers are protected. */
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521 *portMPU_REGION_BASE_ADDRESS = ( portPERIPHERALS_START_ADDRESS ) |
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522 ( portMPU_REGION_VALID ) |
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523 ( portGENERAL_PERIPHERALS_REGION );
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525 *portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_READ_WRITE | portMPU_REGION_EXECUTE_NEVER ) |
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526 ( prvGetMPURegionSizeSetting( portPERIPHERALS_END_ADDRESS - portPERIPHERALS_START_ADDRESS ) ) |
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527 ( portMPU_REGION_ENABLE );
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529 /* Enable the memory fault exception. */
\r
530 *portNVIC_SYS_CTRL_STATE |= portNVIC_MEM_FAULT_ENABLE;
\r
532 /* Enable the MPU with the background region configured. */
\r
533 *portMPU_CTRL |= ( portMPU_ENABLE | portMPU_BACKGROUND_ENABLE );
\r
536 /*-----------------------------------------------------------*/
\r
538 static unsigned long prvGetMPURegionSizeSetting( unsigned long ulActualSizeInBytes )
\r
540 unsigned long ulRegionSize, ulReturnValue = 4;
\r
542 /* 32 is the smallest region size, 31 is the largest valid value for
\r
544 for( ulRegionSize = 32UL; ulReturnValue < 31UL; ( ulRegionSize <<= 1UL ) )
\r
546 if( ulActualSizeInBytes <= ulRegionSize )
\r
556 /* Shift the code by one before returning so it can be written directly
\r
557 into the the correct bit position of the attribute register. */
\r
558 return ( ulReturnValue << 1UL );
\r
560 /*-----------------------------------------------------------*/
\r
562 static portBASE_TYPE prvRaisePrivilege( void )
\r
566 " mrs r0, control \n"
\r
567 " tst r0, #1 \n" /* Is the task running privileged? */
\r
569 " movne r0, #0 \n" /* CONTROL[0]!=0, return false. */
\r
570 " svcne %0 \n" /* Switch to privileged. */
\r
571 " moveq r0, #1 \n" /* CONTROL[0]==0, return true. */
\r
573 :: "i" (portSVC_RAISE_PRIVILEGE) : "r0"
\r
578 /*-----------------------------------------------------------*/
\r
580 void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, portSTACK_TYPE *pxBottomOfStack, unsigned short usStackDepth )
\r
582 extern unsigned long __SRAM_segment_start__[];
\r
583 extern unsigned long __SRAM_segment_end__[];
\r
584 extern unsigned long __privileged_data_start__[];
\r
585 extern unsigned long __privileged_data_end__[];
\r
589 if( xRegions == NULL )
\r
591 /* No MPU regions are specified so allow access to all RAM. */
\r
592 xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =
\r
593 ( ( unsigned long ) __SRAM_segment_start__ ) | /* Base address. */
\r
594 ( portMPU_REGION_VALID ) |
\r
595 ( portSTACK_REGION );
\r
597 xMPUSettings->xRegion[ 0 ].ulRegionAttribute =
\r
598 ( portMPU_REGION_READ_WRITE ) |
\r
599 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
\r
600 ( prvGetMPURegionSizeSetting( ( unsigned long ) __SRAM_segment_end__ - ( unsigned long ) __SRAM_segment_start__ ) ) |
\r
601 ( portMPU_REGION_ENABLE );
\r
603 /* Re-instate the privileged only RAM region as xRegion[ 0 ] will have
\r
604 just removed the privileged only parameters. */
\r
605 xMPUSettings->xRegion[ 1 ].ulRegionBaseAddress =
\r
606 ( ( unsigned long ) __privileged_data_start__ ) | /* Base address. */
\r
607 ( portMPU_REGION_VALID ) |
\r
608 ( portSTACK_REGION + 1 );
\r
610 xMPUSettings->xRegion[ 1 ].ulRegionAttribute =
\r
611 ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
\r
612 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
\r
613 prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_data_end__ - ( unsigned long ) __privileged_data_start__ ) |
\r
614 ( portMPU_REGION_ENABLE );
\r
616 /* Invalidate all other regions. */
\r
617 for( ul = 2; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )
\r
619 xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;
\r
620 xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;
\r
625 /* This function is called automatically when the task is created - in
\r
626 which case the stack region parameters will be valid. At all other
\r
627 times the stack parameters will not be valid and it is assumed that the
\r
628 stack region has already been configured. */
\r
629 if( usStackDepth > 0 )
\r
631 /* Define the region that allows access to the stack. */
\r
632 xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =
\r
633 ( ( unsigned long ) pxBottomOfStack ) |
\r
634 ( portMPU_REGION_VALID ) |
\r
635 ( portSTACK_REGION ); /* Region number. */
\r
637 xMPUSettings->xRegion[ 0 ].ulRegionAttribute =
\r
638 ( portMPU_REGION_READ_WRITE ) | /* Read and write. */
\r
639 ( prvGetMPURegionSizeSetting( ( unsigned long ) usStackDepth * ( unsigned long ) sizeof( portSTACK_TYPE ) ) ) |
\r
640 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
\r
641 ( portMPU_REGION_ENABLE );
\r
646 for( ul = 1; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )
\r
648 if( ( xRegions[ lIndex ] ).ulLengthInBytes > 0UL )
\r
650 /* Translate the generic region definition contained in
\r
651 xRegions into the CM3 specific MPU settings that are then
\r
652 stored in xMPUSettings. */
\r
653 xMPUSettings->xRegion[ ul ].ulRegionBaseAddress =
\r
654 ( ( unsigned long ) xRegions[ lIndex ].pvBaseAddress ) |
\r
655 ( portMPU_REGION_VALID ) |
\r
656 ( portSTACK_REGION + ul ); /* Region number. */
\r
658 xMPUSettings->xRegion[ ul ].ulRegionAttribute =
\r
659 ( prvGetMPURegionSizeSetting( xRegions[ lIndex ].ulLengthInBytes ) ) |
\r
660 ( xRegions[ lIndex ].ulParameters ) |
\r
661 ( portMPU_REGION_ENABLE );
\r
665 /* Invalidate the region. */
\r
666 xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;
\r
667 xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;
\r
674 /*-----------------------------------------------------------*/
\r
676 signed portBASE_TYPE MPU_xTaskGenericCreate( pdTASK_CODE pvTaskCode, const signed char * const pcName, unsigned short usStackDepth, void *pvParameters, unsigned portBASE_TYPE uxPriority, xTaskHandle *pxCreatedTask, portSTACK_TYPE *puxStackBuffer, const xMemoryRegion * const xRegions )
\r
678 signed portBASE_TYPE xReturn;
\r
679 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
681 xReturn = xTaskGenericCreate( pvTaskCode, pcName, usStackDepth, pvParameters, uxPriority, pxCreatedTask, puxStackBuffer, xRegions );
\r
682 portRESET_PRIVILEGE( xRunningPrivileged );
\r
685 /*-----------------------------------------------------------*/
\r
687 void MPU_vTaskAllocateMPURegions( xTaskHandle xTask, const xMemoryRegion * const xRegions )
\r
689 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
691 vTaskAllocateMPURegions( xTask, xRegions );
\r
692 portRESET_PRIVILEGE( xRunningPrivileged );
\r
694 /*-----------------------------------------------------------*/
\r
696 #if ( INCLUDE_vTaskDelete == 1 )
\r
697 void MPU_vTaskDelete( xTaskHandle pxTaskToDelete )
\r
699 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
701 vTaskDelete( pxTaskToDelete );
\r
702 portRESET_PRIVILEGE( xRunningPrivileged );
\r
705 /*-----------------------------------------------------------*/
\r
707 #if ( INCLUDE_vTaskDelayUntil == 1 )
\r
708 void MPU_vTaskDelayUntil( portTickType * const pxPreviousWakeTime, portTickType xTimeIncrement )
\r
710 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
712 vTaskDelayUntil( pxPreviousWakeTime, xTimeIncrement );
\r
713 portRESET_PRIVILEGE( xRunningPrivileged );
\r
716 /*-----------------------------------------------------------*/
\r
718 #if ( INCLUDE_vTaskDelay == 1 )
\r
719 void MPU_vTaskDelay( portTickType xTicksToDelay )
\r
721 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
723 vTaskDelay( xTicksToDelay );
\r
724 portRESET_PRIVILEGE( xRunningPrivileged );
\r
727 /*-----------------------------------------------------------*/
\r
729 #if ( INCLUDE_uxTaskPriorityGet == 1 )
\r
730 unsigned portBASE_TYPE MPU_uxTaskPriorityGet( xTaskHandle pxTask )
\r
732 unsigned portBASE_TYPE uxReturn;
\r
733 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
735 uxReturn = uxTaskPriorityGet( pxTask );
\r
736 portRESET_PRIVILEGE( xRunningPrivileged );
\r
740 /*-----------------------------------------------------------*/
\r
742 #if ( INCLUDE_vTaskPrioritySet == 1 )
\r
743 void MPU_vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority )
\r
745 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
747 vTaskPrioritySet( pxTask, uxNewPriority );
\r
748 portRESET_PRIVILEGE( xRunningPrivileged );
\r
751 /*-----------------------------------------------------------*/
\r
753 #if ( INCLUDE_eTaskGetState == 1 )
\r
754 eTaskState MPU_eTaskGetState( xTaskHandle pxTask )
\r
756 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
757 eTaskState eReturn;
\r
759 eReturn = eTaskGetState( pxTask );
\r
760 portRESET_PRIVILEGE( xRunningPrivileged );
\r
764 /*-----------------------------------------------------------*/
\r
766 #if ( INCLUDE_xTaskGetIdleTaskHandle == 1 )
\r
767 xTaskHandle MPU_xTaskGetIdleTaskHandle( void )
\r
769 xTaskHandle xReturn;
\r
770 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
772 xReturn = xTaskGetIdleTaskHandle();
\r
773 portRESET_PRIVILEGE( xRunningPrivileged );
\r
777 /*-----------------------------------------------------------*/
\r
779 #if ( INCLUDE_vTaskSuspend == 1 )
\r
780 void MPU_vTaskSuspend( xTaskHandle pxTaskToSuspend )
\r
782 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
784 vTaskSuspend( pxTaskToSuspend );
\r
785 portRESET_PRIVILEGE( xRunningPrivileged );
\r
788 /*-----------------------------------------------------------*/
\r
790 #if ( INCLUDE_vTaskSuspend == 1 )
\r
791 signed portBASE_TYPE MPU_xTaskIsTaskSuspended( xTaskHandle xTask )
\r
793 signed portBASE_TYPE xReturn;
\r
794 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
796 xReturn = xTaskIsTaskSuspended( xTask );
\r
797 portRESET_PRIVILEGE( xRunningPrivileged );
\r
801 /*-----------------------------------------------------------*/
\r
803 #if ( INCLUDE_vTaskSuspend == 1 )
\r
804 void MPU_vTaskResume( xTaskHandle pxTaskToResume )
\r
806 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
808 vTaskResume( pxTaskToResume );
\r
809 portRESET_PRIVILEGE( xRunningPrivileged );
\r
812 /*-----------------------------------------------------------*/
\r
814 void MPU_vTaskSuspendAll( void )
\r
816 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
819 portRESET_PRIVILEGE( xRunningPrivileged );
\r
821 /*-----------------------------------------------------------*/
\r
823 signed portBASE_TYPE MPU_xTaskResumeAll( void )
\r
825 signed portBASE_TYPE xReturn;
\r
826 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
828 xReturn = xTaskResumeAll();
\r
829 portRESET_PRIVILEGE( xRunningPrivileged );
\r
832 /*-----------------------------------------------------------*/
\r
834 portTickType MPU_xTaskGetTickCount( void )
\r
836 portTickType xReturn;
\r
837 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
839 xReturn = xTaskGetTickCount();
\r
840 portRESET_PRIVILEGE( xRunningPrivileged );
\r
843 /*-----------------------------------------------------------*/
\r
845 unsigned portBASE_TYPE MPU_uxTaskGetNumberOfTasks( void )
\r
847 unsigned portBASE_TYPE uxReturn;
\r
848 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
850 uxReturn = uxTaskGetNumberOfTasks();
\r
851 portRESET_PRIVILEGE( xRunningPrivileged );
\r
854 /*-----------------------------------------------------------*/
\r
856 #if ( configUSE_TRACE_FACILITY == 1 )
\r
857 void MPU_vTaskList( signed char *pcWriteBuffer )
\r
859 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
861 vTaskList( pcWriteBuffer );
\r
862 portRESET_PRIVILEGE( xRunningPrivileged );
\r
865 /*-----------------------------------------------------------*/
\r
867 #if ( configGENERATE_RUN_TIME_STATS == 1 )
\r
868 void MPU_vTaskGetRunTimeStats( signed char *pcWriteBuffer )
\r
870 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
872 vTaskGetRunTimeStats( pcWriteBuffer );
\r
873 portRESET_PRIVILEGE( xRunningPrivileged );
\r
876 /*-----------------------------------------------------------*/
\r
878 #if ( configUSE_APPLICATION_TASK_TAG == 1 )
\r
879 void MPU_vTaskSetApplicationTaskTag( xTaskHandle xTask, pdTASK_HOOK_CODE pxTagValue )
\r
881 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
883 vTaskSetApplicationTaskTag( xTask, pxTagValue );
\r
884 portRESET_PRIVILEGE( xRunningPrivileged );
\r
887 /*-----------------------------------------------------------*/
\r
889 #if ( configUSE_APPLICATION_TASK_TAG == 1 )
\r
890 pdTASK_HOOK_CODE MPU_xTaskGetApplicationTaskTag( xTaskHandle xTask )
\r
892 pdTASK_HOOK_CODE xReturn;
\r
893 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
895 xReturn = xTaskGetApplicationTaskTag( xTask );
\r
896 portRESET_PRIVILEGE( xRunningPrivileged );
\r
900 /*-----------------------------------------------------------*/
\r
902 #if ( configUSE_APPLICATION_TASK_TAG == 1 )
\r
903 portBASE_TYPE MPU_xTaskCallApplicationTaskHook( xTaskHandle xTask, void *pvParameter )
\r
905 portBASE_TYPE xReturn;
\r
906 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
908 xReturn = xTaskCallApplicationTaskHook( xTask, pvParameter );
\r
909 portRESET_PRIVILEGE( xRunningPrivileged );
\r
913 /*-----------------------------------------------------------*/
\r
915 #if ( configUSE_TRACE_FACILITY == 1 )
\r
916 unsigned portBASE_TYPE MPU_uxTaskGetSystemState( xTaskStatusType *pxTaskStatusArray, unsigned portBASE_TYPE uxArraySize, unsigned long *pulTotalRunTime )
\r
918 unsigned portBASE_TYPE uxReturn;
\r
919 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
921 uxReturn = uxTaskGetSystemState( pxTaskStatusArray, uxArraySize, pulTotalRunTime );
\r
922 portRESET_PRIVILEGE( xRunningPrivileged );
\r
926 /*-----------------------------------------------------------*/
\r
928 #if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 )
\r
929 unsigned portBASE_TYPE MPU_uxTaskGetStackHighWaterMark( xTaskHandle xTask )
\r
931 unsigned portBASE_TYPE uxReturn;
\r
932 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
934 uxReturn = uxTaskGetStackHighWaterMark( xTask );
\r
935 portRESET_PRIVILEGE( xRunningPrivileged );
\r
939 /*-----------------------------------------------------------*/
\r
941 #if ( INCLUDE_xTaskGetCurrentTaskHandle == 1 )
\r
942 xTaskHandle MPU_xTaskGetCurrentTaskHandle( void )
\r
944 xTaskHandle xReturn;
\r
945 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
947 xReturn = xTaskGetCurrentTaskHandle();
\r
948 portRESET_PRIVILEGE( xRunningPrivileged );
\r
952 /*-----------------------------------------------------------*/
\r
954 #if ( INCLUDE_xTaskGetSchedulerState == 1 )
\r
955 portBASE_TYPE MPU_xTaskGetSchedulerState( void )
\r
957 portBASE_TYPE xReturn;
\r
958 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
960 xReturn = xTaskGetSchedulerState();
\r
961 portRESET_PRIVILEGE( xRunningPrivileged );
\r
965 /*-----------------------------------------------------------*/
\r
967 xQueueHandle MPU_xQueueGenericCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize, unsigned char ucQueueType )
\r
969 xQueueHandle xReturn;
\r
970 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
972 xReturn = xQueueGenericCreate( uxQueueLength, uxItemSize, ucQueueType );
\r
973 portRESET_PRIVILEGE( xRunningPrivileged );
\r
976 /*-----------------------------------------------------------*/
\r
978 portBASE_TYPE MPU_xQueueGenericReset( xQueueHandle pxQueue, portBASE_TYPE xNewQueue )
\r
980 portBASE_TYPE xReturn;
\r
981 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
983 xReturn = xQueueGenericReset( pxQueue, xNewQueue );
\r
984 portRESET_PRIVILEGE( xRunningPrivileged );
\r
987 /*-----------------------------------------------------------*/
\r
989 signed portBASE_TYPE MPU_xQueueGenericSend( xQueueHandle xQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition )
\r
991 signed portBASE_TYPE xReturn;
\r
992 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
994 xReturn = xQueueGenericSend( xQueue, pvItemToQueue, xTicksToWait, xCopyPosition );
\r
995 portRESET_PRIVILEGE( xRunningPrivileged );
\r
998 /*-----------------------------------------------------------*/
\r
1000 unsigned portBASE_TYPE MPU_uxQueueMessagesWaiting( const xQueueHandle pxQueue )
\r
1002 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
1003 unsigned portBASE_TYPE uxReturn;
\r
1005 uxReturn = uxQueueMessagesWaiting( pxQueue );
\r
1006 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1009 /*-----------------------------------------------------------*/
\r
1011 signed portBASE_TYPE MPU_xQueueGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking )
\r
1013 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
1014 signed portBASE_TYPE xReturn;
\r
1016 xReturn = xQueueGenericReceive( pxQueue, pvBuffer, xTicksToWait, xJustPeeking );
\r
1017 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1020 /*-----------------------------------------------------------*/
\r
1022 signed portBASE_TYPE MPU_xQueuePeekFromISR( xQueueHandle pxQueue, void * const pvBuffer )
\r
1024 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
1025 signed portBASE_TYPE xReturn;
\r
1027 xReturn = xQueuePeekFromISR( pxQueue, pvBuffer );
\r
1028 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1031 /*-----------------------------------------------------------*/
\r
1033 #if ( configUSE_MUTEXES == 1 )
\r
1034 xQueueHandle MPU_xQueueCreateMutex( void )
\r
1036 xQueueHandle xReturn;
\r
1037 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
1039 xReturn = xQueueCreateMutex( queueQUEUE_TYPE_MUTEX );
\r
1040 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1044 /*-----------------------------------------------------------*/
\r
1046 #if configUSE_COUNTING_SEMAPHORES == 1
\r
1047 xQueueHandle MPU_xQueueCreateCountingSemaphore( unsigned portBASE_TYPE uxCountValue, unsigned portBASE_TYPE uxInitialCount )
\r
1049 xQueueHandle xReturn;
\r
1050 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
1052 xReturn = xQueueCreateCountingSemaphore( uxCountValue, uxInitialCount );
\r
1053 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1057 /*-----------------------------------------------------------*/
\r
1059 #if ( configUSE_MUTEXES == 1 )
\r
1060 portBASE_TYPE MPU_xQueueTakeMutexRecursive( xQueueHandle xMutex, portTickType xBlockTime )
\r
1062 portBASE_TYPE xReturn;
\r
1063 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
1065 xReturn = xQueueTakeMutexRecursive( xMutex, xBlockTime );
\r
1066 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1070 /*-----------------------------------------------------------*/
\r
1072 #if ( configUSE_MUTEXES == 1 )
\r
1073 portBASE_TYPE MPU_xQueueGiveMutexRecursive( xQueueHandle xMutex )
\r
1075 portBASE_TYPE xReturn;
\r
1076 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
1078 xReturn = xQueueGiveMutexRecursive( xMutex );
\r
1079 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1083 /*-----------------------------------------------------------*/
\r
1085 #if ( configUSE_QUEUE_SETS == 1 )
\r
1086 xQueueSetHandle MPU_xQueueCreateSet( unsigned portBASE_TYPE uxEventQueueLength )
\r
1088 xQueueSetHandle xReturn;
\r
1089 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
1091 xReturn = xQueueCreateSet( uxEventQueueLength );
\r
1092 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1096 /*-----------------------------------------------------------*/
\r
1098 #if ( configUSE_QUEUE_SETS == 1 )
\r
1099 xQueueSetMemberHandle MPU_xQueueSelectFromSet( xQueueSetHandle xQueueSet, portTickType xBlockTimeTicks )
\r
1101 xQueueSetMemberHandle xReturn;
\r
1102 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
1104 xReturn = xQueueSelectFromSet( xQueueSet, xBlockTimeTicks );
\r
1105 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1109 /*-----------------------------------------------------------*/
\r
1111 #if ( configUSE_QUEUE_SETS == 1 )
\r
1112 portBASE_TYPE MPU_xQueueAddToSet( xQueueSetMemberHandle xQueueOrSemaphore, xQueueSetHandle xQueueSet )
\r
1114 portBASE_TYPE xReturn;
\r
1115 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
1117 xReturn = xQueueAddToSet( xQueueOrSemaphore, xQueueSet );
\r
1118 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1122 /*-----------------------------------------------------------*/
\r
1124 #if ( configUSE_QUEUE_SETS == 1 )
\r
1125 portBASE_TYPE MPU_xQueueRemoveFromSet( xQueueSetMemberHandle xQueueOrSemaphore, xQueueSetHandle xQueueSet )
\r
1127 portBASE_TYPE xReturn;
\r
1128 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
1130 xReturn = xQueueRemoveFromSet( xQueueOrSemaphore, xQueueSet );
\r
1131 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1135 /*-----------------------------------------------------------*/
\r
1137 #if configUSE_ALTERNATIVE_API == 1
\r
1138 signed portBASE_TYPE MPU_xQueueAltGenericSend( xQueueHandle pxQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition )
\r
1140 signed portBASE_TYPE xReturn;
\r
1141 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
1143 xReturn = signed portBASE_TYPE xQueueAltGenericSend( pxQueue, pvItemToQueue, xTicksToWait, xCopyPosition );
\r
1144 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1148 /*-----------------------------------------------------------*/
\r
1150 #if configUSE_ALTERNATIVE_API == 1
\r
1151 signed portBASE_TYPE MPU_xQueueAltGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking )
\r
1153 signed portBASE_TYPE xReturn;
\r
1154 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
1156 xReturn = xQueueAltGenericReceive( pxQueue, pvBuffer, xTicksToWait, xJustPeeking );
\r
1157 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1161 /*-----------------------------------------------------------*/
\r
1163 #if configQUEUE_REGISTRY_SIZE > 0
\r
1164 void MPU_vQueueAddToRegistry( xQueueHandle xQueue, signed char *pcName )
\r
1166 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
1168 vQueueAddToRegistry( xQueue, pcName );
\r
1170 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1173 /*-----------------------------------------------------------*/
\r
1175 void MPU_vQueueDelete( xQueueHandle xQueue )
\r
1177 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
1179 vQueueDelete( xQueue );
\r
1181 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1183 /*-----------------------------------------------------------*/
\r
1185 void *MPU_pvPortMalloc( size_t xSize )
\r
1188 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
1190 pvReturn = pvPortMalloc( xSize );
\r
1192 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1196 /*-----------------------------------------------------------*/
\r
1198 void MPU_vPortFree( void *pv )
\r
1200 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
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1204 portRESET_PRIVILEGE( xRunningPrivileged );
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1206 /*-----------------------------------------------------------*/
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1208 void MPU_vPortInitialiseBlocks( void )
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1210 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
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1212 vPortInitialiseBlocks();
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1214 portRESET_PRIVILEGE( xRunningPrivileged );
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1216 /*-----------------------------------------------------------*/
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1218 size_t MPU_xPortGetFreeHeapSize( void )
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1221 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
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1223 xReturn = xPortGetFreeHeapSize();
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1225 portRESET_PRIVILEGE( xRunningPrivileged );
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1230 /* Functions that the application writer wants to execute in privileged mode
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1231 can be defined in application_defined_privileged_functions.h. The functions
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1232 must take the same format as those above whereby the privilege state on exit
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1233 equals the privilege state on entry. For example:
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1235 void MPU_FunctionName( [parameters ] )
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1237 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
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1239 FunctionName( [parameters ] );
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1241 portRESET_PRIVILEGE( xRunningPrivileged );
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1245 #if configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS == 1
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1246 #include "application_defined_privileged_functions.h"
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