git.sur5r.net Git - freertos/blob - FreeRTOS/Source/portable/GCC/ARM_CM3_MPU/port.c

   1 /*\r
   2     FreeRTOS V7.4.2 - Copyright (C) 2013 Real Time Engineers Ltd.\r
   3 \r
   4     FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME.  PLEASE VISIT\r
   5     http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
   6 \r
   7     ***************************************************************************\r
   8      *                                                                       *\r
   9      *    FreeRTOS tutorial books are available in pdf and paperback.        *\r
  10      *    Complete, revised, and edited pdf reference manuals are also       *\r
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  12      *                                                                       *\r
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  14      *    ensuring you get running as quickly as possible and with an        *\r
  15      *    in-depth knowledge of how to use FreeRTOS, it will also help       *\r
  16      *    the FreeRTOS project to continue with its mission of providing     *\r
  17      *    professional grade, cross platform, de facto standard solutions    *\r
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  22      *    Thank you for using FreeRTOS, and thank you for your support!      *\r
  23      *                                                                       *\r
  24     ***************************************************************************\r
  25 \r
  26 \r
  27     This file is part of the FreeRTOS distribution.\r
  28 \r
  29     FreeRTOS is free software; you can redistribute it and/or modify it under\r
  30     the terms of the GNU General Public License (version 2) as published by the\r
  31     Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
  32 \r
  33     >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to\r
  34     distribute a combined work that includes FreeRTOS without being obliged to\r
  35     provide the source code for proprietary components outside of the FreeRTOS\r
  36     kernel.\r
  37 \r
  38     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
  39     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
  40     FOR A PARTICULAR PURPOSE.  See the GNU General Public License for more\r
  41     details. You should have received a copy of the GNU General Public License\r
  42     and the FreeRTOS license exception along with FreeRTOS; if not it can be\r
  43     viewed here: http://www.freertos.org/a00114.html and also obtained by\r
  44     writing to Real Time Engineers Ltd., contact details for whom are available\r
  45     on the FreeRTOS WEB site.\r
  46 \r
  47     1 tab == 4 spaces!\r
  48 \r
  49     ***************************************************************************\r
  50      *                                                                       *\r
  51      *    Having a problem?  Start by reading the FAQ "My application does   *\r
  52      *    not run, what could be wrong?"                                     *\r
  53      *                                                                       *\r
  54      *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
  55      *                                                                       *\r
  56     ***************************************************************************\r
  57 \r
  58 \r
  59     http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
  60     license and Real Time Engineers Ltd. contact details.\r
  61 \r
  62     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
  63     including FreeRTOS+Trace - an indispensable productivity tool, and our new\r
  64     fully thread aware and reentrant UDP/IP stack.\r
  65 \r
  66     http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
  67     Integrity Systems, who sell the code with commercial support,\r
  68     indemnification and middleware, under the OpenRTOS brand.\r
  69 \r
  70     http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
  71     engineered and independently SIL3 certified version for use in safety and\r
  72     mission critical applications that require provable dependability.\r
  73 */\r
  74 \r
  75 /*-----------------------------------------------------------\r
  76  * Implementation of functions defined in portable.h for the ARM CM3 port.\r
  77  *----------------------------------------------------------*/\r
  78 \r
  79 /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining\r
  80 all the API functions to use the MPU wrappers.  That should only be done when\r
  81 task.h is included from an application file. */\r
  82 #define MPU_WRAPPERS_INCLUDED_FROM_API_FILE\r
  83 \r
  84 /* Scheduler includes. */\r
  85 #include "FreeRTOS.h"\r
  86 #include "task.h"\r
  87 #include "queue.h"\r
  88 \r
  89 #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE\r
  90 \r
  91 /* Constants required to access and manipulate the NVIC. */\r
  92 #define portNVIC_SYSTICK_CTRL                                   ( ( volatile unsigned long * ) 0xe000e010 )\r
  93 #define portNVIC_SYSTICK_LOAD                                   ( ( volatile unsigned long * ) 0xe000e014 )\r
  94 #define portNVIC_SYSPRI2                                                ( ( volatile unsigned long * ) 0xe000ed20 )\r
  95 #define portNVIC_SYSPRI1                                                ( ( volatile unsigned long * ) 0xe000ed1c )\r
  96 #define portNVIC_SYS_CTRL_STATE                                 ( ( volatile unsigned long * ) 0xe000ed24 )\r
  97 #define portNVIC_MEM_FAULT_ENABLE                               ( 1UL << 16UL )\r
  98 \r
  99 /* Constants required to access and manipulate the MPU. */\r
 100 #define portMPU_TYPE                                                    ( ( volatile unsigned long * ) 0xe000ed90 )\r
 101 #define portMPU_REGION_BASE_ADDRESS                             ( ( volatile unsigned long * ) 0xe000ed9C )\r
 102 #define portMPU_REGION_ATTRIBUTE                                ( ( volatile unsigned long * ) 0xe000edA0 )\r
 103 #define portMPU_CTRL                                                    ( ( volatile unsigned long * ) 0xe000ed94 )\r
 104 #define portEXPECTED_MPU_TYPE_VALUE                             ( 8UL << 8UL ) /* 8 regions, unified. */\r
 105 #define portMPU_ENABLE                                                  ( 0x01UL )\r
 106 #define portMPU_BACKGROUND_ENABLE                               ( 1UL << 2UL )\r
 107 #define portPRIVILEGED_EXECUTION_START_ADDRESS  ( 0UL )\r
 108 #define portMPU_REGION_VALID                                    ( 0x10UL )\r
 109 #define portMPU_REGION_ENABLE                                   ( 0x01UL )\r
 110 #define portPERIPHERALS_START_ADDRESS                   0x40000000UL\r
 111 #define portPERIPHERALS_END_ADDRESS                             0x5FFFFFFFUL\r
 112 \r
 113 /* Constants required to access and manipulate the SysTick. */\r
 114 #define portNVIC_SYSTICK_CLK                                    ( 0x00000004UL )\r
 115 #define portNVIC_SYSTICK_INT                                    ( 0x00000002UL )\r
 116 #define portNVIC_SYSTICK_ENABLE                                 ( 0x00000001UL )\r
 117 #define portNVIC_PENDSV_PRI                                             ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )\r
 118 #define portNVIC_SYSTICK_PRI                                    ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )\r
 119 #define portNVIC_SVC_PRI                                                ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )\r
 120 \r
 121 /* Constants required to set up the initial stack. */\r
 122 #define portINITIAL_XPSR                                                ( 0x01000000 )\r
 123 #define portINITIAL_CONTROL_IF_UNPRIVILEGED             ( 0x03 )\r
 124 #define portINITIAL_CONTROL_IF_PRIVILEGED               ( 0x02 )\r
 125 \r
 126 /* Offsets in the stack to the parameters when inside the SVC handler. */\r
 127 #define portOFFSET_TO_PC                                                ( 6 )\r
 128 \r
 129 /* Set the privilege level to user mode if xRunningPrivileged is false. */\r
 130 #define portRESET_PRIVILEGE( xRunningPrivileged ) if( xRunningPrivileged != pdTRUE ) __asm volatile ( " mrs r0, control \n orr r0, #1 \n msr control, r0" :::"r0" )\r
 131 \r
 132 /* Each task maintains its own interrupt status in the critical nesting\r
 133 variable.  Note this is not saved as part of the task context as context\r
 134 switches can only occur when uxCriticalNesting is zero. */\r
 135 static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;\r
 136 \r
 137 /*\r
 138  * Setup the timer to generate the tick interrupts.\r
 139  */\r
 140 static void prvSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;\r
 141 \r
 142 /*\r
 143  * Configure a number of standard MPU regions that are used by all tasks.\r
 144  */\r
 145 static void prvSetupMPU( void ) PRIVILEGED_FUNCTION;\r
 146 \r
 147 /*\r
 148  * Return the smallest MPU region size that a given number of bytes will fit\r
 149  * into.  The region size is returned as the value that should be programmed\r
 150  * into the region attribute register for that region.\r
 151  */\r
 152 static unsigned long prvGetMPURegionSizeSetting( unsigned long ulActualSizeInBytes ) PRIVILEGED_FUNCTION;\r
 153 \r
 154 /*\r
 155  * Checks to see if being called from the context of an unprivileged task, and\r
 156  * if so raises the privilege level and returns false - otherwise does nothing\r
 157  * other than return true.\r
 158  */\r
 159 static portBASE_TYPE prvRaisePrivilege( void ) __attribute__(( naked ));\r
 160 \r
 161 /*\r
 162  * Standard FreeRTOS exception handlers.\r
 163  */\r
 164 void xPortPendSVHandler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;\r
 165 void xPortSysTickHandler( void )  __attribute__ ((optimize("3"))) PRIVILEGED_FUNCTION;\r
 166 void vPortSVCHandler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;\r
 167 \r
 168 /*\r
 169  * Starts the scheduler by restoring the context of the first task to run.\r
 170  */\r
 171 static void prvRestoreContextOfFirstTask( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION;\r
 172 \r
 173 /*\r
 174  * C portion of the SVC handler.  The SVC handler is split between an asm entry\r
 175  * and a C wrapper for simplicity of coding and maintenance.\r
 176  */\r
 177 static void prvSVCHandler( unsigned long *pulRegisters ) __attribute__(( noinline )) PRIVILEGED_FUNCTION;\r
 178 \r
 179 /*\r
 180  * Prototypes for all the MPU wrappers.\r
 181  */\r
 182 signed portBASE_TYPE MPU_xTaskGenericCreate( pdTASK_CODE pvTaskCode, const signed char * const pcName, unsigned short usStackDepth, void *pvParameters, unsigned portBASE_TYPE uxPriority, xTaskHandle *pxCreatedTask, portSTACK_TYPE *puxStackBuffer, const xMemoryRegion * const xRegions );\r
 183 void MPU_vTaskAllocateMPURegions( xTaskHandle xTask, const xMemoryRegion * const xRegions );\r
 184 void MPU_vTaskDelete( xTaskHandle pxTaskToDelete );\r
 185 void MPU_vTaskDelayUntil( portTickType * const pxPreviousWakeTime, portTickType xTimeIncrement );\r
 186 void MPU_vTaskDelay( portTickType xTicksToDelay );\r
 187 unsigned portBASE_TYPE MPU_uxTaskPriorityGet( xTaskHandle pxTask );\r
 188 void MPU_vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority );\r
 189 eTaskState MPU_eTaskGetState( xTaskHandle pxTask );\r
 190 void MPU_vTaskSuspend( xTaskHandle pxTaskToSuspend );\r
 191 signed portBASE_TYPE MPU_xTaskIsTaskSuspended( xTaskHandle xTask );\r
 192 void MPU_vTaskResume( xTaskHandle pxTaskToResume );\r
 193 void MPU_vTaskSuspendAll( void );\r
 194 signed portBASE_TYPE MPU_xTaskResumeAll( void );\r
 195 portTickType MPU_xTaskGetTickCount( void );\r
 196 unsigned portBASE_TYPE MPU_uxTaskGetNumberOfTasks( void );\r
 197 void MPU_vTaskList( signed char *pcWriteBuffer );\r
 198 void MPU_vTaskGetRunTimeStats( signed char *pcWriteBuffer );\r
 199 void MPU_vTaskSetApplicationTaskTag( xTaskHandle xTask, pdTASK_HOOK_CODE pxTagValue );\r
 200 pdTASK_HOOK_CODE MPU_xTaskGetApplicationTaskTag( xTaskHandle xTask );\r
 201 portBASE_TYPE MPU_xTaskCallApplicationTaskHook( xTaskHandle xTask, void *pvParameter );\r
 202 unsigned portBASE_TYPE MPU_uxTaskGetStackHighWaterMark( xTaskHandle xTask );\r
 203 xTaskHandle MPU_xTaskGetCurrentTaskHandle( void );\r
 204 portBASE_TYPE MPU_xTaskGetSchedulerState( void );\r
 205 xTaskHandle MPU_xTaskGetIdleTaskHandle( void );\r
 206 unsigned portBASE_TYPE MPU_xTaskGetSystemState( xTaskStatusType *pxTaskStatusArray, unsigned portBASE_TYPE uxArraySize, unsigned long *pulTotalRunTime );\r
 207 xQueueHandle MPU_xQueueGenericCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize, unsigned char ucQueueType );\r
 208 signed portBASE_TYPE MPU_xQueueGenericSend( xQueueHandle xQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition );\r
 209 portBASE_TYPE MPU_xQueueGenericReset( xQueueHandle pxQueue, portBASE_TYPE xNewQueue );\r
 210 unsigned portBASE_TYPE MPU_uxQueueMessagesWaiting( const xQueueHandle pxQueue );\r
 211 signed portBASE_TYPE MPU_xQueueGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking );\r
 212 xQueueHandle MPU_xQueueCreateMutex( void );\r
 213 xQueueHandle MPU_xQueueCreateCountingSemaphore( unsigned portBASE_TYPE uxCountValue, unsigned portBASE_TYPE uxInitialCount );\r
 214 portBASE_TYPE MPU_xQueueTakeMutexRecursive( xQueueHandle xMutex, portTickType xBlockTime );\r
 215 portBASE_TYPE MPU_xQueueGiveMutexRecursive( xQueueHandle xMutex );\r
 216 signed portBASE_TYPE MPU_xQueueAltGenericSend( xQueueHandle pxQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition );\r
 217 signed portBASE_TYPE MPU_xQueueAltGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking );\r
 218 void MPU_vQueueAddToRegistry( xQueueHandle xQueue, signed char *pcName );\r
 219 void MPU_vQueueDelete( xQueueHandle xQueue );\r
 220 void *MPU_pvPortMalloc( size_t xSize );\r
 221 void MPU_vPortFree( void *pv );\r
 222 void MPU_vPortInitialiseBlocks( void );\r
 223 size_t MPU_xPortGetFreeHeapSize( void );\r
 224 xQueueSetHandle MPU_xQueueCreateSet( unsigned portBASE_TYPE uxEventQueueLength );\r
 225 xQueueSetMemberHandle MPU_xQueueSelectFromSet( xQueueSetHandle xQueueSet, portTickType xBlockTimeTicks );\r
 226 portBASE_TYPE MPU_xQueueAddToSet( xQueueSetMemberHandle xQueueOrSemaphore, xQueueSetHandle xQueueSet );\r
 227 portBASE_TYPE MPU_xQueueRemoveFromSet( xQueueSetMemberHandle xQueueOrSemaphore, xQueueSetHandle xQueueSet );\r
 228 signed portBASE_TYPE MPU_xQueuePeekFromISR( xQueueHandle xQueue, void * const pvBuffer );\r
 229 \r
 230 /*-----------------------------------------------------------*/\r
 231 \r
 232 /*\r
 233  * See header file for description.\r
 234  */\r
 235 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters, portBASE_TYPE xRunPrivileged )\r
 236 {\r
 237         /* Simulate the stack frame as it would be created by a context switch\r
 238         interrupt. */\r
 239         pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */\r
 240         *pxTopOfStack = portINITIAL_XPSR;       /* xPSR */\r
 241         pxTopOfStack--;\r
 242         *pxTopOfStack = ( portSTACK_TYPE ) pxCode;      /* PC */\r
 243         pxTopOfStack--;\r
 244         *pxTopOfStack = 0;      /* LR */\r
 245         pxTopOfStack -= 5;      /* R12, R3, R2 and R1. */\r
 246         *pxTopOfStack = ( portSTACK_TYPE ) pvParameters;        /* R0 */\r
 247         pxTopOfStack -= 9;      /* R11, R10, R9, R8, R7, R6, R5 and R4. */\r
 248 \r
 249         if( xRunPrivileged == pdTRUE )\r
 250         {\r
 251                 *pxTopOfStack = portINITIAL_CONTROL_IF_PRIVILEGED;\r
 252         }\r
 253         else\r
 254         {\r
 255                 *pxTopOfStack = portINITIAL_CONTROL_IF_UNPRIVILEGED;\r
 256         }\r
 257 \r
 258         return pxTopOfStack;\r
 259 }\r
 260 /*-----------------------------------------------------------*/\r
 261 \r
 262 void vPortSVCHandler( void )\r
 263 {\r
 264         /* Assumes psp was in use. */\r
 265         __asm volatile\r
 266         (\r
 267                 #ifndef USE_PROCESS_STACK       /* Code should not be required if a main() is using the process stack. */\r
 268                         "       tst lr, #4                                              \n"\r
 269                         "       ite eq                                                  \n"\r
 270                         "       mrseq r0, msp                                   \n"\r
 271                         "       mrsne r0, psp                                   \n"\r
 272                 #else\r
 273                         "       mrs r0, psp                                             \n"\r
 274                 #endif\r
 275                         "       b %0                                                    \n"\r
 276                         ::"i"(prvSVCHandler):"r0"\r
 277         );\r
 278 }\r
 279 /*-----------------------------------------------------------*/\r
 280 \r
 281 static void prvSVCHandler(      unsigned long *pulParam )\r
 282 {\r
 283 unsigned char ucSVCNumber;\r
 284 \r
 285         /* The stack contains: r0, r1, r2, r3, r12, r14, the return address and\r
 286         xPSR.  The first argument (r0) is pulParam[ 0 ]. */\r
 287         ucSVCNumber = ( ( unsigned char * ) pulParam[ portOFFSET_TO_PC ] )[ -2 ];\r
 288         switch( ucSVCNumber )\r
 289         {\r
 290                 case portSVC_START_SCHEDULER    :       *(portNVIC_SYSPRI1) |= portNVIC_SVC_PRI;\r
 291                                                                                         prvRestoreContextOfFirstTask();\r
 292                                                                                         break;\r
 293 \r
 294                 case portSVC_YIELD                              :       *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;\r
 295                                                                                         /* Barriers are normally not required\r
 296                                                                                         but do ensure the code is completely\r
 297                                                                                         within the specified behaviour for the\r
 298                                                                                         architecture. */\r
 299                                                                                         __asm volatile( "dsb" );\r
 300                                                                                         __asm volatile( "isb" );\r
 301 \r
 302                                                                                         break;\r
 303 \r
 304                 case portSVC_RAISE_PRIVILEGE    :       __asm volatile\r
 305                                                                                         (\r
 306                                                                                                 "       mrs r1, control         \n" /* Obtain current control value. */\r
 307                                                                                                 "       bic r1, #1                      \n" /* Set privilege bit. */\r
 308                                                                                                 "       msr control, r1         \n" /* Write back new control value. */\r
 309                                                                                                 :::"r1"\r
 310                                                                                         );\r
 311                                                                                         break;\r
 312 \r
 313                 default                                                 :       /* Unknown SVC call. */\r
 314                                                                                         break;\r
 315         }\r
 316 }\r
 317 /*-----------------------------------------------------------*/\r
 318 \r
 319 static void prvRestoreContextOfFirstTask( void )\r
 320 {\r
 321         __asm volatile\r
 322         (\r
 323                 "       ldr r0, =0xE000ED08                             \n" /* Use the NVIC offset register to locate the stack. */\r
 324                 "       ldr r0, [r0]                                    \n"\r
 325                 "       ldr r0, [r0]                                    \n"\r
 326                 "       msr msp, r0                                             \n" /* Set the msp back to the start of the stack. */\r
 327                 "       ldr     r3, pxCurrentTCBConst2          \n" /* Restore the context. */\r
 328                 "       ldr r1, [r3]                                    \n"\r
 329                 "       ldr r0, [r1]                                    \n" /* The first item in the TCB is the task top of stack. */\r
 330                 "       add r1, r1, #4                                  \n" /* Move onto the second item in the TCB... */\r
 331                 "       ldr r2, =0xe000ed9c                             \n" /* Region Base Address register. */\r
 332                 "       ldmia r1!, {r4-r11}                             \n" /* Read 4 sets of MPU registers. */\r
 333                 "       stmia r2!, {r4-r11}                             \n" /* Write 4 sets of MPU registers. */\r
 334                 "       ldmia r0!, {r3, r4-r11}                 \n" /* Pop the registers that are not automatically saved on exception entry. */\r
 335                 "       msr control, r3                                 \n"\r
 336                 "       msr psp, r0                                             \n" /* Restore the task stack pointer. */\r
 337                 "       mov r0, #0                                              \n"\r
 338                 "       msr     basepri, r0                                     \n"\r
 339                 "       ldr r14, =0xfffffffd                    \n" /* Load exec return code. */\r
 340                 "       bx r14                                                  \n"\r
 341                 "                                                                       \n"\r
 342                 "       .align 2                                                \n"\r
 343                 "pxCurrentTCBConst2: .word pxCurrentTCB \n"\r
 344         );\r
 345 }\r
 346 /*-----------------------------------------------------------*/\r
 347 \r
 348 /*\r
 349  * See header file for description.\r
 350  */\r
 351 portBASE_TYPE xPortStartScheduler( void )\r
 352 {\r
 353         /* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.  See\r
 354         http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */\r
 355         configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) );\r
 356 \r
 357         /* Make PendSV and SysTick the same priority as the kernel. */\r
 358         *(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;\r
 359         *(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;\r
 360 \r
 361         /* Configure the regions in the MPU that are common to all tasks. */\r
 362         prvSetupMPU();\r
 363 \r
 364         /* Start the timer that generates the tick ISR.  Interrupts are disabled\r
 365         here already. */\r
 366         prvSetupTimerInterrupt();\r
 367 \r
 368         /* Initialise the critical nesting count ready for the first task. */\r
 369         uxCriticalNesting = 0;\r
 370 \r
 371         /* Start the first task. */\r
 372         __asm volatile( "       svc %0                  \n"\r
 373                                         :: "i" (portSVC_START_SCHEDULER) );\r
 374 \r
 375         /* Should not get here! */\r
 376         return 0;\r
 377 }\r
 378 /*-----------------------------------------------------------*/\r
 379 \r
 380 void vPortEndScheduler( void )\r
 381 {\r
 382         /* It is unlikely that the CM3 port will require this function as there\r
 383         is nothing to return to.  */\r
 384 }\r
 385 /*-----------------------------------------------------------*/\r
 386 \r
 387 void vPortEnterCritical( void )\r
 388 {\r
 389 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 390 \r
 391         portDISABLE_INTERRUPTS();\r
 392         uxCriticalNesting++;\r
 393 \r
 394         portRESET_PRIVILEGE( xRunningPrivileged );\r
 395 }\r
 396 /*-----------------------------------------------------------*/\r
 397 \r
 398 void vPortExitCritical( void )\r
 399 {\r
 400 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 401 \r
 402         uxCriticalNesting--;\r
 403         if( uxCriticalNesting == 0 )\r
 404         {\r
 405                 portENABLE_INTERRUPTS();\r
 406         }\r
 407         portRESET_PRIVILEGE( xRunningPrivileged );\r
 408 }\r
 409 /*-----------------------------------------------------------*/\r
 410 \r
 411 void xPortPendSVHandler( void )\r
 412 {\r
 413         /* This is a naked function. */\r
 414 \r
 415         __asm volatile\r
 416         (\r
 417                 "       mrs r0, psp                                                     \n"\r
 418                 "                                                                               \n"\r
 419                 "       ldr     r3, pxCurrentTCBConst                   \n" /* Get the location of the current TCB. */\r
 420                 "       ldr     r2, [r3]                                                \n"\r
 421                 "                                                                               \n"\r
 422                 "       mrs r1, control                                         \n"\r
 423                 "       stmdb r0!, {r1, r4-r11}                         \n" /* Save the remaining registers. */\r
 424                 "       str r0, [r2]                                            \n" /* Save the new top of stack into the first member of the TCB. */\r
 425                 "                                                                               \n"\r
 426                 "       stmdb sp!, {r3, r14}                            \n"\r
 427                 "       mov r0, %0                                                      \n"\r
 428                 "       msr basepri, r0                                         \n"\r
 429                 "       bl vTaskSwitchContext                           \n"\r
 430                 "       mov r0, #0                                                      \n"\r
 431                 "       msr basepri, r0                                         \n"\r
 432                 "       ldmia sp!, {r3, r14}                            \n"\r
 433                 "                                                                               \n"     /* Restore the context. */\r
 434                 "       ldr r1, [r3]                                            \n"\r
 435                 "       ldr r0, [r1]                                            \n" /* The first item in the TCB is the task top of stack. */\r
 436                 "       add r1, r1, #4                                          \n" /* Move onto the second item in the TCB... */\r
 437                 "       ldr r2, =0xe000ed9c                                     \n" /* Region Base Address register. */\r
 438                 "       ldmia r1!, {r4-r11}                                     \n" /* Read 4 sets of MPU registers. */\r
 439                 "       stmia r2!, {r4-r11}                                     \n" /* Write 4 sets of MPU registers. */\r
 440                 "       ldmia r0!, {r3, r4-r11}                         \n" /* Pop the registers that are not automatically saved on exception entry. */\r
 441                 "       msr control, r3                                         \n"\r
 442                 "                                                                               \n"\r
 443                 "       msr psp, r0                                                     \n"\r
 444                 "       bx r14                                                          \n"\r
 445                 "                                                                               \n"\r
 446                 "       .align 2                                                        \n"\r
 447                 "pxCurrentTCBConst: .word pxCurrentTCB  \n"\r
 448                 ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)\r
 449         );\r
 450 }\r
 451 /*-----------------------------------------------------------*/\r
 452 \r
 453 void xPortSysTickHandler( void )\r
 454 {\r
 455 unsigned long ulDummy;\r
 456 \r
 457         ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();\r
 458         {\r
 459                 /* Increment the RTOS tick. */\r
 460                 if( xTaskIncrementTick() != pdFALSE )\r
 461                 {\r
 462                         /* Pend a context switch. */\r
 463                         *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;\r
 464                 }\r
 465         }\r
 466         portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy );\r
 467 }\r
 468 /*-----------------------------------------------------------*/\r
 469 \r
 470 /*\r
 471  * Setup the systick timer to generate the tick interrupts at the required\r
 472  * frequency.\r
 473  */\r
 474 static void prvSetupTimerInterrupt( void )\r
 475 {\r
 476         /* Configure SysTick to interrupt at the requested rate. */\r
 477         *(portNVIC_SYSTICK_LOAD) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;\r
 478         *(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;\r
 479 }\r
 480 /*-----------------------------------------------------------*/\r
 481 \r
 482 static void prvSetupMPU( void )\r
 483 {\r
 484 extern unsigned long __privileged_functions_end__[];\r
 485 extern unsigned long __FLASH_segment_start__[];\r
 486 extern unsigned long __FLASH_segment_end__[];\r
 487 extern unsigned long __privileged_data_start__[];\r
 488 extern unsigned long __privileged_data_end__[];\r
 489 \r
 490         /* Check the expected MPU is present. */\r
 491         if( *portMPU_TYPE == portEXPECTED_MPU_TYPE_VALUE )\r
 492         {\r
 493                 /* First setup the entire flash for unprivileged read only access. */\r
 494         *portMPU_REGION_BASE_ADDRESS =  ( ( unsigned long ) __FLASH_segment_start__ ) | /* Base address. */\r
 495                                                                                 ( portMPU_REGION_VALID ) |\r
 496                                                                                 ( portUNPRIVILEGED_FLASH_REGION );\r
 497 \r
 498                 *portMPU_REGION_ATTRIBUTE =             ( portMPU_REGION_READ_ONLY ) |\r
 499                                                                                 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 500                                                                                 ( prvGetMPURegionSizeSetting( ( unsigned long ) __FLASH_segment_end__ - ( unsigned long ) __FLASH_segment_start__ ) ) |\r
 501                                                                                 ( portMPU_REGION_ENABLE );\r
 502 \r
 503                 /* Setup the first 16K for privileged only access (even though less\r
 504                 than 10K is actually being used).  This is where the kernel code is\r
 505                 placed. */\r
 506         *portMPU_REGION_BASE_ADDRESS =  ( ( unsigned long ) __FLASH_segment_start__ ) | /* Base address. */\r
 507                                                                                 ( portMPU_REGION_VALID ) |\r
 508                                                                                 ( portPRIVILEGED_FLASH_REGION );\r
 509 \r
 510                 *portMPU_REGION_ATTRIBUTE =             ( portMPU_REGION_PRIVILEGED_READ_ONLY ) |\r
 511                                                                                 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 512                                                                                 ( prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_functions_end__ - ( unsigned long ) __FLASH_segment_start__ ) ) |\r
 513                                                                                 ( portMPU_REGION_ENABLE );\r
 514 \r
 515                 /* Setup the privileged data RAM region.  This is where the kernel data\r
 516                 is placed. */\r
 517                 *portMPU_REGION_BASE_ADDRESS =  ( ( unsigned long ) __privileged_data_start__ ) | /* Base address. */\r
 518                                                                                 ( portMPU_REGION_VALID ) |\r
 519                                                                                 ( portPRIVILEGED_RAM_REGION );\r
 520 \r
 521                 *portMPU_REGION_ATTRIBUTE =             ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |\r
 522                                                                                 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 523                                                                                 prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_data_end__ - ( unsigned long ) __privileged_data_start__ ) |\r
 524                                                                                 ( portMPU_REGION_ENABLE );\r
 525 \r
 526                 /* By default allow everything to access the general peripherals.  The\r
 527                 system peripherals and registers are protected. */\r
 528                 *portMPU_REGION_BASE_ADDRESS =  ( portPERIPHERALS_START_ADDRESS ) |\r
 529                                                                                 ( portMPU_REGION_VALID ) |\r
 530                                                                                 ( portGENERAL_PERIPHERALS_REGION );\r
 531 \r
 532                 *portMPU_REGION_ATTRIBUTE =             ( portMPU_REGION_READ_WRITE | portMPU_REGION_EXECUTE_NEVER ) |\r
 533                                                                                 ( prvGetMPURegionSizeSetting( portPERIPHERALS_END_ADDRESS - portPERIPHERALS_START_ADDRESS ) ) |\r
 534                                                                                 ( portMPU_REGION_ENABLE );\r
 535 \r
 536                 /* Enable the memory fault exception. */\r
 537                 *portNVIC_SYS_CTRL_STATE |= portNVIC_MEM_FAULT_ENABLE;\r
 538 \r
 539                 /* Enable the MPU with the background region configured. */\r
 540                 *portMPU_CTRL |= ( portMPU_ENABLE | portMPU_BACKGROUND_ENABLE );\r
 541         }\r
 542 }\r
 543 /*-----------------------------------------------------------*/\r
 544 \r
 545 static unsigned long prvGetMPURegionSizeSetting( unsigned long ulActualSizeInBytes )\r
 546 {\r
 547 unsigned long ulRegionSize, ulReturnValue = 4;\r
 548 \r
 549         /* 32 is the smallest region size, 31 is the largest valid value for\r
 550         ulReturnValue. */\r
 551         for( ulRegionSize = 32UL; ulReturnValue < 31UL; ( ulRegionSize <<= 1UL ) )\r
 552         {\r
 553                 if( ulActualSizeInBytes <= ulRegionSize )\r
 554                 {\r
 555                         break;\r
 556                 }\r
 557                 else\r
 558                 {\r
 559                         ulReturnValue++;\r
 560                 }\r
 561         }\r
 562 \r
 563         /* Shift the code by one before returning so it can be written directly\r
 564         into the the correct bit position of the attribute register. */\r
 565         return ( ulReturnValue << 1UL );\r
 566 }\r
 567 /*-----------------------------------------------------------*/\r
 568 \r
 569 static portBASE_TYPE prvRaisePrivilege( void )\r
 570 {\r
 571         __asm volatile\r
 572         (\r
 573                 "       mrs r0, control                                         \n"\r
 574                 "       tst r0, #1                                                      \n" /* Is the task running privileged? */\r
 575                 "       itte ne                                                         \n"\r
 576                 "       movne r0, #0                                            \n" /* CONTROL[0]!=0, return false. */\r
 577                 "       svcne %0                                                        \n" /* Switch to privileged. */\r
 578                 "       moveq r0, #1                                            \n" /* CONTROL[0]==0, return true. */\r
 579                 "       bx lr                                                           \n"\r
 580                 :: "i" (portSVC_RAISE_PRIVILEGE) : "r0"\r
 581         );\r
 582 \r
 583         return 0;\r
 584 }\r
 585 /*-----------------------------------------------------------*/\r
 586 \r
 587 void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, portSTACK_TYPE *pxBottomOfStack, unsigned short usStackDepth )\r
 588 {\r
 589 extern unsigned long __SRAM_segment_start__[];\r
 590 extern unsigned long __SRAM_segment_end__[];\r
 591 extern unsigned long __privileged_data_start__[];\r
 592 extern unsigned long __privileged_data_end__[];\r
 593 long lIndex;\r
 594 unsigned long ul;\r
 595 \r
 596         if( xRegions == NULL )\r
 597         {\r
 598                 /* No MPU regions are specified so allow access to all RAM. */\r
 599         xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =\r
 600                                 ( ( unsigned long ) __SRAM_segment_start__ ) | /* Base address. */\r
 601                                 ( portMPU_REGION_VALID ) |\r
 602                                 ( portSTACK_REGION );\r
 603 \r
 604                 xMPUSettings->xRegion[ 0 ].ulRegionAttribute =\r
 605                                 ( portMPU_REGION_READ_WRITE ) |\r
 606                                 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 607                                 ( prvGetMPURegionSizeSetting( ( unsigned long ) __SRAM_segment_end__ - ( unsigned long ) __SRAM_segment_start__ ) ) |\r
 608                                 ( portMPU_REGION_ENABLE );\r
 609 \r
 610                 /* Re-instate the privileged only RAM region as xRegion[ 0 ] will have\r
 611                 just removed the privileged only parameters. */\r
 612                 xMPUSettings->xRegion[ 1 ].ulRegionBaseAddress =\r
 613                                 ( ( unsigned long ) __privileged_data_start__ ) | /* Base address. */\r
 614                                 ( portMPU_REGION_VALID ) |\r
 615                                 ( portSTACK_REGION + 1 );\r
 616 \r
 617                 xMPUSettings->xRegion[ 1 ].ulRegionAttribute =\r
 618                                 ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |\r
 619                                 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 620                                 prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_data_end__ - ( unsigned long ) __privileged_data_start__ ) |\r
 621                                 ( portMPU_REGION_ENABLE );\r
 622 \r
 623                 /* Invalidate all other regions. */\r
 624                 for( ul = 2; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )\r
 625                 {\r
 626                         xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;\r
 627                         xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;\r
 628                 }\r
 629         }\r
 630         else\r
 631         {\r
 632                 /* This function is called automatically when the task is created - in\r
 633                 which case the stack region parameters will be valid.  At all other\r
 634                 times the stack parameters will not be valid and it is assumed that the\r
 635                 stack region has already been configured. */\r
 636                 if( usStackDepth > 0 )\r
 637                 {\r
 638                         /* Define the region that allows access to the stack. */\r
 639                         xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =\r
 640                                         ( ( unsigned long ) pxBottomOfStack ) |\r
 641                                         ( portMPU_REGION_VALID ) |\r
 642                                         ( portSTACK_REGION ); /* Region number. */\r
 643 \r
 644                         xMPUSettings->xRegion[ 0 ].ulRegionAttribute =\r
 645                                         ( portMPU_REGION_READ_WRITE ) | /* Read and write. */\r
 646                                         ( prvGetMPURegionSizeSetting( ( unsigned long ) usStackDepth * ( unsigned long ) sizeof( portSTACK_TYPE ) ) ) |\r
 647                                         ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 648                                         ( portMPU_REGION_ENABLE );\r
 649                 }\r
 650 \r
 651                 lIndex = 0;\r
 652 \r
 653                 for( ul = 1; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )\r
 654                 {\r
 655                         if( ( xRegions[ lIndex ] ).ulLengthInBytes > 0UL )\r
 656                         {\r
 657                                 /* Translate the generic region definition contained in\r
 658                                 xRegions into the CM3 specific MPU settings that are then\r
 659                                 stored in xMPUSettings. */\r
 660                                 xMPUSettings->xRegion[ ul ].ulRegionBaseAddress =\r
 661                                                 ( ( unsigned long ) xRegions[ lIndex ].pvBaseAddress ) |\r
 662                                                 ( portMPU_REGION_VALID ) |\r
 663                                                 ( portSTACK_REGION + ul ); /* Region number. */\r
 664 \r
 665                                 xMPUSettings->xRegion[ ul ].ulRegionAttribute =\r
 666                                                 ( prvGetMPURegionSizeSetting( xRegions[ lIndex ].ulLengthInBytes ) ) |\r
 667                                                 ( xRegions[ lIndex ].ulParameters ) |\r
 668                                                 ( portMPU_REGION_ENABLE );\r
 669                         }\r
 670                         else\r
 671                         {\r
 672                                 /* Invalidate the region. */\r
 673                                 xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;\r
 674                                 xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;\r
 675                         }\r
 676 \r
 677                         lIndex++;\r
 678                 }\r
 679         }\r
 680 }\r
 681 /*-----------------------------------------------------------*/\r
 682 \r
 683 signed portBASE_TYPE MPU_xTaskGenericCreate( pdTASK_CODE pvTaskCode, const signed char * const pcName, unsigned short usStackDepth, void *pvParameters, unsigned portBASE_TYPE uxPriority, xTaskHandle *pxCreatedTask, portSTACK_TYPE *puxStackBuffer, const xMemoryRegion * const xRegions )\r
 684 {\r
 685 signed portBASE_TYPE xReturn;\r
 686 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 687 \r
 688         xReturn = xTaskGenericCreate( pvTaskCode, pcName, usStackDepth, pvParameters, uxPriority, pxCreatedTask, puxStackBuffer, xRegions );\r
 689         portRESET_PRIVILEGE( xRunningPrivileged );\r
 690         return xReturn;\r
 691 }\r
 692 /*-----------------------------------------------------------*/\r
 693 \r
 694 void MPU_vTaskAllocateMPURegions( xTaskHandle xTask, const xMemoryRegion * const xRegions )\r
 695 {\r
 696 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 697 \r
 698         vTaskAllocateMPURegions( xTask, xRegions );\r
 699         portRESET_PRIVILEGE( xRunningPrivileged );\r
 700 }\r
 701 /*-----------------------------------------------------------*/\r
 702 \r
 703 #if ( INCLUDE_vTaskDelete == 1 )\r
 704         void MPU_vTaskDelete( xTaskHandle pxTaskToDelete )\r
 705         {\r
 706     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 707 \r
 708                 vTaskDelete( pxTaskToDelete );\r
 709         portRESET_PRIVILEGE( xRunningPrivileged );\r
 710         }\r
 711 #endif\r
 712 /*-----------------------------------------------------------*/\r
 713 \r
 714 #if ( INCLUDE_vTaskDelayUntil == 1 )\r
 715         void MPU_vTaskDelayUntil( portTickType * const pxPreviousWakeTime, portTickType xTimeIncrement )\r
 716         {\r
 717     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 718 \r
 719                 vTaskDelayUntil( pxPreviousWakeTime, xTimeIncrement );\r
 720         portRESET_PRIVILEGE( xRunningPrivileged );\r
 721         }\r
 722 #endif\r
 723 /*-----------------------------------------------------------*/\r
 724 \r
 725 #if ( INCLUDE_vTaskDelay == 1 )\r
 726         void MPU_vTaskDelay( portTickType xTicksToDelay )\r
 727         {\r
 728     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 729 \r
 730                 vTaskDelay( xTicksToDelay );\r
 731         portRESET_PRIVILEGE( xRunningPrivileged );\r
 732         }\r
 733 #endif\r
 734 /*-----------------------------------------------------------*/\r
 735 \r
 736 #if ( INCLUDE_uxTaskPriorityGet == 1 )\r
 737         unsigned portBASE_TYPE MPU_uxTaskPriorityGet( xTaskHandle pxTask )\r
 738         {\r
 739         unsigned portBASE_TYPE uxReturn;\r
 740     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 741 \r
 742                 uxReturn = uxTaskPriorityGet( pxTask );\r
 743         portRESET_PRIVILEGE( xRunningPrivileged );\r
 744                 return uxReturn;\r
 745         }\r
 746 #endif\r
 747 /*-----------------------------------------------------------*/\r
 748 \r
 749 #if ( INCLUDE_vTaskPrioritySet == 1 )\r
 750         void MPU_vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority )\r
 751         {\r
 752     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 753 \r
 754                 vTaskPrioritySet( pxTask, uxNewPriority );\r
 755         portRESET_PRIVILEGE( xRunningPrivileged );\r
 756         }\r
 757 #endif\r
 758 /*-----------------------------------------------------------*/\r
 759 \r
 760 #if ( INCLUDE_eTaskGetState == 1 )\r
 761         eTaskState MPU_eTaskGetState( xTaskHandle pxTask )\r
 762         {\r
 763     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 764         eTaskState eReturn;\r
 765 \r
 766                 eReturn = eTaskGetState( pxTask );\r
 767         portRESET_PRIVILEGE( xRunningPrivileged );\r
 768                 return eReturn;\r
 769         }\r
 770 #endif\r
 771 /*-----------------------------------------------------------*/\r
 772 \r
 773 #if ( INCLUDE_xTaskGetIdleTaskHandle == 1 )\r
 774         xTaskHandle MPU_xTaskGetIdleTaskHandle( void )\r
 775         {\r
 776         xTaskHandle xReturn;\r
 777     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 778 \r
 779                 xReturn = xTaskGetIdleTaskHandle();\r
 780         portRESET_PRIVILEGE( xRunningPrivileged );\r
 781                 return eReturn;\r
 782         }\r
 783 #endif\r
 784 /*-----------------------------------------------------------*/\r
 785 \r
 786 #if ( INCLUDE_vTaskSuspend == 1 )\r
 787         void MPU_vTaskSuspend( xTaskHandle pxTaskToSuspend )\r
 788         {\r
 789     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 790 \r
 791                 vTaskSuspend( pxTaskToSuspend );\r
 792         portRESET_PRIVILEGE( xRunningPrivileged );\r
 793         }\r
 794 #endif\r
 795 /*-----------------------------------------------------------*/\r
 796 \r
 797 #if ( INCLUDE_vTaskSuspend == 1 )\r
 798         signed portBASE_TYPE MPU_xTaskIsTaskSuspended( xTaskHandle xTask )\r
 799         {\r
 800         signed portBASE_TYPE xReturn;\r
 801     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 802 \r
 803                 xReturn = xTaskIsTaskSuspended( xTask );\r
 804         portRESET_PRIVILEGE( xRunningPrivileged );\r
 805                 return xReturn;\r
 806         }\r
 807 #endif\r
 808 /*-----------------------------------------------------------*/\r
 809 \r
 810 #if ( INCLUDE_vTaskSuspend == 1 )\r
 811         void MPU_vTaskResume( xTaskHandle pxTaskToResume )\r
 812         {\r
 813     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 814 \r
 815                 vTaskResume( pxTaskToResume );\r
 816         portRESET_PRIVILEGE( xRunningPrivileged );\r
 817         }\r
 818 #endif\r
 819 /*-----------------------------------------------------------*/\r
 820 \r
 821 void MPU_vTaskSuspendAll( void )\r
 822 {\r
 823 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 824 \r
 825         vTaskSuspendAll();\r
 826     portRESET_PRIVILEGE( xRunningPrivileged );\r
 827 }\r
 828 /*-----------------------------------------------------------*/\r
 829 \r
 830 signed portBASE_TYPE MPU_xTaskResumeAll( void )\r
 831 {\r
 832 signed portBASE_TYPE xReturn;\r
 833 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 834 \r
 835         xReturn = xTaskResumeAll();\r
 836     portRESET_PRIVILEGE( xRunningPrivileged );\r
 837     return xReturn;\r
 838 }\r
 839 /*-----------------------------------------------------------*/\r
 840 \r
 841 portTickType MPU_xTaskGetTickCount( void )\r
 842 {\r
 843 portTickType xReturn;\r
 844 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 845 \r
 846         xReturn = xTaskGetTickCount();\r
 847     portRESET_PRIVILEGE( xRunningPrivileged );\r
 848         return xReturn;\r
 849 }\r
 850 /*-----------------------------------------------------------*/\r
 851 \r
 852 unsigned portBASE_TYPE MPU_uxTaskGetNumberOfTasks( void )\r
 853 {\r
 854 unsigned portBASE_TYPE uxReturn;\r
 855 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 856 \r
 857         uxReturn = uxTaskGetNumberOfTasks();\r
 858     portRESET_PRIVILEGE( xRunningPrivileged );\r
 859         return uxReturn;\r
 860 }\r
 861 /*-----------------------------------------------------------*/\r
 862 \r
 863 #if ( configUSE_TRACE_FACILITY == 1 )\r
 864         void MPU_vTaskList( signed char *pcWriteBuffer )\r
 865         {\r
 866         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 867 \r
 868                 vTaskList( pcWriteBuffer );\r
 869                 portRESET_PRIVILEGE( xRunningPrivileged );\r
 870         }\r
 871 #endif\r
 872 /*-----------------------------------------------------------*/\r
 873 \r
 874 #if ( configGENERATE_RUN_TIME_STATS == 1 )\r
 875         void MPU_vTaskGetRunTimeStats( signed char *pcWriteBuffer )\r
 876         {\r
 877     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 878 \r
 879                 vTaskGetRunTimeStats( pcWriteBuffer );\r
 880         portRESET_PRIVILEGE( xRunningPrivileged );\r
 881         }\r
 882 #endif\r
 883 /*-----------------------------------------------------------*/\r
 884 \r
 885 #if ( configUSE_APPLICATION_TASK_TAG == 1 )\r
 886         void MPU_vTaskSetApplicationTaskTag( xTaskHandle xTask, pdTASK_HOOK_CODE pxTagValue )\r
 887         {\r
 888     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 889 \r
 890                 vTaskSetApplicationTaskTag( xTask, pxTagValue );\r
 891         portRESET_PRIVILEGE( xRunningPrivileged );\r
 892         }\r
 893 #endif\r
 894 /*-----------------------------------------------------------*/\r
 895 \r
 896 #if ( configUSE_APPLICATION_TASK_TAG == 1 )\r
 897         pdTASK_HOOK_CODE MPU_xTaskGetApplicationTaskTag( xTaskHandle xTask )\r
 898         {\r
 899         pdTASK_HOOK_CODE xReturn;\r
 900     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 901 \r
 902                 xReturn = xTaskGetApplicationTaskTag( xTask );\r
 903         portRESET_PRIVILEGE( xRunningPrivileged );\r
 904                 return xReturn;\r
 905         }\r
 906 #endif\r
 907 /*-----------------------------------------------------------*/\r
 908 \r
 909 #if ( configUSE_APPLICATION_TASK_TAG == 1 )\r
 910         portBASE_TYPE MPU_xTaskCallApplicationTaskHook( xTaskHandle xTask, void *pvParameter )\r
 911         {\r
 912         portBASE_TYPE xReturn;\r
 913     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 914 \r
 915                 xReturn = xTaskCallApplicationTaskHook( xTask, pvParameter );\r
 916         portRESET_PRIVILEGE( xRunningPrivileged );\r
 917                 return xReturn;\r
 918         }\r
 919 #endif\r
 920 /*-----------------------------------------------------------*/\r
 921 \r
 922 #if ( configUSE_TRACE_FACILITY == 1 )\r
 923         unsigned portBASE_TYPE MPU_xTaskGetSystemState( xTaskStatusType *pxTaskStatusArray, unsigned portBASE_TYPE uxArraySize, unsigned long *pulTotalRunTime )\r
 924         {\r
 925         unsigned portBASE_TYPE uxReturn;\r
 926         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 927 \r
 928                 uxReturn = xTaskGetSystemState( pxTaskStatusArray, uxArraySize, pulTotalRunTime );\r
 929                 portRESET_PRIVILEGE( xRunningPrivileged );\r
 930                 return xReturn;\r
 931         }\r
 932 #endif\r
 933 /*-----------------------------------------------------------*/\r
 934 \r
 935 #if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 )\r
 936         unsigned portBASE_TYPE MPU_uxTaskGetStackHighWaterMark( xTaskHandle xTask )\r
 937         {\r
 938         unsigned portBASE_TYPE uxReturn;\r
 939     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 940 \r
 941                 uxReturn = uxTaskGetStackHighWaterMark( xTask );\r
 942         portRESET_PRIVILEGE( xRunningPrivileged );\r
 943                 return uxReturn;\r
 944         }\r
 945 #endif\r
 946 /*-----------------------------------------------------------*/\r
 947 \r
 948 #if ( INCLUDE_xTaskGetCurrentTaskHandle == 1 )\r
 949         xTaskHandle MPU_xTaskGetCurrentTaskHandle( void )\r
 950         {\r
 951         xTaskHandle xReturn;\r
 952     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 953 \r
 954                 xReturn = xTaskGetCurrentTaskHandle();\r
 955         portRESET_PRIVILEGE( xRunningPrivileged );\r
 956                 return xReturn;\r
 957         }\r
 958 #endif\r
 959 /*-----------------------------------------------------------*/\r
 960 \r
 961 #if ( INCLUDE_xTaskGetSchedulerState == 1 )\r
 962         portBASE_TYPE MPU_xTaskGetSchedulerState( void )\r
 963         {\r
 964         portBASE_TYPE xReturn;\r
 965     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 966 \r
 967                 xReturn = xTaskGetSchedulerState();\r
 968         portRESET_PRIVILEGE( xRunningPrivileged );\r
 969                 return xReturn;\r
 970         }\r
 971 #endif\r
 972 /*-----------------------------------------------------------*/\r
 973 \r
 974 xQueueHandle MPU_xQueueGenericCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize, unsigned char ucQueueType )\r
 975 {\r
 976 xQueueHandle xReturn;\r
 977 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 978 \r
 979         xReturn = xQueueGenericCreate( uxQueueLength, uxItemSize, ucQueueType );\r
 980         portRESET_PRIVILEGE( xRunningPrivileged );\r
 981         return xReturn;\r
 982 }\r
 983 /*-----------------------------------------------------------*/\r
 984 \r
 985 portBASE_TYPE MPU_xQueueGenericReset( xQueueHandle pxQueue, portBASE_TYPE xNewQueue )\r
 986 {\r
 987 portBASE_TYPE xReturn;\r
 988 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 989 \r
 990         xReturn = xQueueGenericReset( pxQueue, xNewQueue );\r
 991         portRESET_PRIVILEGE( xRunningPrivileged );\r
 992         return xReturn;\r
 993 }\r
 994 /*-----------------------------------------------------------*/\r
 995 \r
 996 signed portBASE_TYPE MPU_xQueueGenericSend( xQueueHandle xQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition )\r
 997 {\r
 998 signed portBASE_TYPE xReturn;\r
 999 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1000 \r
1001         xReturn = xQueueGenericSend( xQueue, pvItemToQueue, xTicksToWait, xCopyPosition );\r
1002         portRESET_PRIVILEGE( xRunningPrivileged );\r
1003         return xReturn;\r
1004 }\r
1005 /*-----------------------------------------------------------*/\r
1006 \r
1007 unsigned portBASE_TYPE MPU_uxQueueMessagesWaiting( const xQueueHandle pxQueue )\r
1008 {\r
1009 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1010 unsigned portBASE_TYPE uxReturn;\r
1011 \r
1012         uxReturn = uxQueueMessagesWaiting( pxQueue );\r
1013         portRESET_PRIVILEGE( xRunningPrivileged );\r
1014         return uxReturn;\r
1015 }\r
1016 /*-----------------------------------------------------------*/\r
1017 \r
1018 signed portBASE_TYPE MPU_xQueueGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking )\r
1019 {\r
1020 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1021 signed portBASE_TYPE xReturn;\r
1022 \r
1023         xReturn = xQueueGenericReceive( pxQueue, pvBuffer, xTicksToWait, xJustPeeking );\r
1024         portRESET_PRIVILEGE( xRunningPrivileged );\r
1025         return xReturn;\r
1026 }\r
1027 /*-----------------------------------------------------------*/\r
1028 \r
1029 signed portBASE_TYPE MPU_xQueuePeekFromISR( xQueueHandle pxQueue, void * const pvBuffer )\r
1030 {\r
1031 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1032 signed portBASE_TYPE xReturn;\r
1033 \r
1034         xReturn = xQueuePeekFromISR( pxQueue, pvBuffer );\r
1035         portRESET_PRIVILEGE( xRunningPrivileged );\r
1036         return xReturn;\r
1037 }\r
1038 /*-----------------------------------------------------------*/\r
1039 \r
1040 #if ( configUSE_MUTEXES == 1 )\r
1041         xQueueHandle MPU_xQueueCreateMutex( void )\r
1042         {\r
1043     xQueueHandle xReturn;\r
1044         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1045 \r
1046                 xReturn = xQueueCreateMutex( queueQUEUE_TYPE_MUTEX );\r
1047                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1048                 return xReturn;\r
1049         }\r
1050 #endif\r
1051 /*-----------------------------------------------------------*/\r
1052 \r
1053 #if configUSE_COUNTING_SEMAPHORES == 1\r
1054         xQueueHandle MPU_xQueueCreateCountingSemaphore( unsigned portBASE_TYPE uxCountValue, unsigned portBASE_TYPE uxInitialCount )\r
1055         {\r
1056     xQueueHandle xReturn;\r
1057         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1058 \r
1059                 xReturn = xQueueCreateCountingSemaphore( uxCountValue, uxInitialCount );\r
1060                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1061                 return xReturn;\r
1062         }\r
1063 #endif\r
1064 /*-----------------------------------------------------------*/\r
1065 \r
1066 #if ( configUSE_MUTEXES == 1 )\r
1067         portBASE_TYPE MPU_xQueueTakeMutexRecursive( xQueueHandle xMutex, portTickType xBlockTime )\r
1068         {\r
1069         portBASE_TYPE xReturn;\r
1070         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1071 \r
1072                 xReturn = xQueueTakeMutexRecursive( xMutex, xBlockTime );\r
1073                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1074                 return xReturn;\r
1075         }\r
1076 #endif\r
1077 /*-----------------------------------------------------------*/\r
1078 \r
1079 #if ( configUSE_MUTEXES == 1 )\r
1080         portBASE_TYPE MPU_xQueueGiveMutexRecursive( xQueueHandle xMutex )\r
1081         {\r
1082         portBASE_TYPE xReturn;\r
1083         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1084 \r
1085                 xReturn = xQueueGiveMutexRecursive( xMutex );\r
1086                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1087                 return xReturn;\r
1088         }\r
1089 #endif\r
1090 /*-----------------------------------------------------------*/\r
1091 \r
1092 #if ( configUSE_QUEUE_SETS == 1 )\r
1093         xQueueSetHandle MPU_xQueueCreateSet( unsigned portBASE_TYPE uxEventQueueLength )\r
1094         {\r
1095         xQueueSetHandle xReturn;\r
1096         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1097 \r
1098                 xReturn = xQueueCreateSet( uxEventQueueLength );\r
1099                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1100                 return xReturn;\r
1101         }\r
1102 #endif\r
1103 /*-----------------------------------------------------------*/\r
1104 \r
1105 #if ( configUSE_QUEUE_SETS == 1 )\r
1106         xQueueSetMemberHandle MPU_xQueueSelectFromSet( xQueueSetHandle xQueueSet, portTickType xBlockTimeTicks )\r
1107         {\r
1108         xQueueSetMemberHandle xReturn;\r
1109         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1110 \r
1111                 xReturn = xQueueSelectFromSet( xQueueSet, xBlockTimeTicks );\r
1112                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1113                 return xReturn;\r
1114         }\r
1115 #endif\r
1116 /*-----------------------------------------------------------*/\r
1117 \r
1118 #if ( configUSE_QUEUE_SETS == 1 )\r
1119         portBASE_TYPE MPU_xQueueAddToSet( xQueueSetMemberHandle xQueueOrSemaphore, xQueueSetHandle xQueueSet )\r
1120         {\r
1121         portBASE_TYPE xReturn;\r
1122         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1123 \r
1124                 xReturn = xQueueAddToSet( xQueueOrSemaphore, xQueueSet );\r
1125                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1126                 return xReturn;\r
1127         }\r
1128 #endif\r
1129 /*-----------------------------------------------------------*/\r
1130 \r
1131 #if ( configUSE_QUEUE_SETS == 1 )\r
1132         portBASE_TYPE MPU_xQueueRemoveFromSet( xQueueSetMemberHandle xQueueOrSemaphore, xQueueSetHandle xQueueSet )\r
1133         {\r
1134         portBASE_TYPE xReturn;\r
1135         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1136 \r
1137                 xReturn = xQueueRemoveFromSet( xQueueOrSemaphore, xQueueSet );\r
1138                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1139                 return xReturn;\r
1140         }\r
1141 #endif\r
1142 /*-----------------------------------------------------------*/\r
1143 \r
1144 #if configUSE_ALTERNATIVE_API == 1\r
1145         signed portBASE_TYPE MPU_xQueueAltGenericSend( xQueueHandle pxQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition )\r
1146         {\r
1147         signed portBASE_TYPE xReturn;\r
1148         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1149 \r
1150                 xReturn =       signed portBASE_TYPE xQueueAltGenericSend( pxQueue, pvItemToQueue, xTicksToWait, xCopyPosition );\r
1151                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1152                 return xReturn;\r
1153         }\r
1154 #endif\r
1155 /*-----------------------------------------------------------*/\r
1156 \r
1157 #if configUSE_ALTERNATIVE_API == 1\r
1158         signed portBASE_TYPE MPU_xQueueAltGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking )\r
1159         {\r
1160     signed portBASE_TYPE xReturn;\r
1161         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1162 \r
1163                 xReturn = xQueueAltGenericReceive( pxQueue, pvBuffer, xTicksToWait, xJustPeeking );\r
1164                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1165                 return xReturn;\r
1166         }\r
1167 #endif\r
1168 /*-----------------------------------------------------------*/\r
1169 \r
1170 #if configQUEUE_REGISTRY_SIZE > 0\r
1171         void MPU_vQueueAddToRegistry( xQueueHandle xQueue, signed char *pcName )\r
1172         {\r
1173         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1174 \r
1175                 vQueueAddToRegistry( xQueue, pcName );\r
1176 \r
1177                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1178         }\r
1179 #endif\r
1180 /*-----------------------------------------------------------*/\r
1181 \r
1182 void MPU_vQueueDelete( xQueueHandle xQueue )\r
1183 {\r
1184 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1185 \r
1186         vQueueDelete( xQueue );\r
1187 \r
1188         portRESET_PRIVILEGE( xRunningPrivileged );\r
1189 }\r
1190 /*-----------------------------------------------------------*/\r
1191 \r
1192 void *MPU_pvPortMalloc( size_t xSize )\r
1193 {\r
1194 void *pvReturn;\r
1195 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1196 \r
1197         pvReturn = pvPortMalloc( xSize );\r
1198 \r
1199         portRESET_PRIVILEGE( xRunningPrivileged );\r
1200 \r
1201         return pvReturn;\r
1202 }\r
1203 /*-----------------------------------------------------------*/\r
1204 \r
1205 void MPU_vPortFree( void *pv )\r
1206 {\r
1207 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1208 \r
1209         vPortFree( pv );\r
1210 \r
1211         portRESET_PRIVILEGE( xRunningPrivileged );\r
1212 }\r
1213 /*-----------------------------------------------------------*/\r
1214 \r
1215 void MPU_vPortInitialiseBlocks( void )\r
1216 {\r
1217 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1218 \r
1219         vPortInitialiseBlocks();\r
1220 \r
1221         portRESET_PRIVILEGE( xRunningPrivileged );\r
1222 }\r
1223 /*-----------------------------------------------------------*/\r
1224 \r
1225 size_t MPU_xPortGetFreeHeapSize( void )\r
1226 {\r
1227 size_t xReturn;\r
1228 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1229 \r
1230         xReturn = xPortGetFreeHeapSize();\r
1231 \r
1232         portRESET_PRIVILEGE( xRunningPrivileged );\r
1233 \r
1234         return xReturn;\r
1235 }\r
1236 \r
1237 /* Functions that the application writer wants to execute in privileged mode\r
1238 can be defined in application_defined_privileged_functions.h.  The functions\r
1239 must take the same format as those above whereby the privilege state on exit\r
1240 equals the privilege state on entry.  For example:\r
1241 \r
1242 void MPU_FunctionName( [parameters ] )\r
1243 {\r
1244 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1245 \r
1246         FunctionName( [parameters ] );\r
1247 \r
1248         portRESET_PRIVILEGE( xRunningPrivileged );\r
1249 }\r
1250 */\r
1251 \r
1252 #if configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS == 1\r
1253         #include "application_defined_privileged_functions.h"\r
1254 #endif\r
1255 \r