git.sur5r.net Git - freertos/blob - FreeRTOS/Source/portable/GCC/ARM_CM3_MPU/port.c

   1 /*\r
   2     FreeRTOS V7.4.2 - Copyright (C) 2013 Real Time Engineers Ltd.\r
   3 \r
   4     FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME.  PLEASE VISIT\r
   5     http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
   6 \r
   7     ***************************************************************************\r
   8      *                                                                       *\r
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  10      *    Complete, revised, and edited pdf reference manuals are also       *\r
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  14      *    ensuring you get running as quickly as possible and with an        *\r
  15      *    in-depth knowledge of how to use FreeRTOS, it will also help       *\r
  16      *    the FreeRTOS project to continue with its mission of providing     *\r
  17      *    professional grade, cross platform, de facto standard solutions    *\r
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  22      *    Thank you for using FreeRTOS, and thank you for your support!      *\r
  23      *                                                                       *\r
  24     ***************************************************************************\r
  25 \r
  26 \r
  27     This file is part of the FreeRTOS distribution.\r
  28 \r
  29     FreeRTOS is free software; you can redistribute it and/or modify it under\r
  30     the terms of the GNU General Public License (version 2) as published by the\r
  31     Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
  32 \r
  33     >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to\r
  34     distribute a combined work that includes FreeRTOS without being obliged to\r
  35     provide the source code for proprietary components outside of the FreeRTOS\r
  36     kernel.\r
  37 \r
  38     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
  39     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
  40     FOR A PARTICULAR PURPOSE.  See the GNU General Public License for more\r
  41     details. You should have received a copy of the GNU General Public License\r
  42     and the FreeRTOS license exception along with FreeRTOS; if not it can be\r
  43     viewed here: http://www.freertos.org/a00114.html and also obtained by\r
  44     writing to Real Time Engineers Ltd., contact details for whom are available\r
  45     on the FreeRTOS WEB site.\r
  46 \r
  47     1 tab == 4 spaces!\r
  48 \r
  49     ***************************************************************************\r
  50      *                                                                       *\r
  51      *    Having a problem?  Start by reading the FAQ "My application does   *\r
  52      *    not run, what could be wrong?"                                     *\r
  53      *                                                                       *\r
  54      *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
  55      *                                                                       *\r
  56     ***************************************************************************\r
  57 \r
  58 \r
  59     http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
  60     license and Real Time Engineers Ltd. contact details.\r
  61 \r
  62     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
  63     including FreeRTOS+Trace - an indispensable productivity tool, and our new\r
  64     fully thread aware and reentrant UDP/IP stack.\r
  65 \r
  66     http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
  67     Integrity Systems, who sell the code with commercial support,\r
  68     indemnification and middleware, under the OpenRTOS brand.\r
  69 \r
  70     http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
  71     engineered and independently SIL3 certified version for use in safety and\r
  72     mission critical applications that require provable dependability.\r
  73 */\r
  74 \r
  75 /*-----------------------------------------------------------\r
  76  * Implementation of functions defined in portable.h for the ARM CM3 port.\r
  77  *----------------------------------------------------------*/\r
  78 \r
  79 /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining\r
  80 all the API functions to use the MPU wrappers.  That should only be done when\r
  81 task.h is included from an application file. */\r
  82 #define MPU_WRAPPERS_INCLUDED_FROM_API_FILE\r
  83 \r
  84 /* Scheduler includes. */\r
  85 #include "FreeRTOS.h"\r
  86 #include "task.h"\r
  87 #include "queue.h"\r
  88 \r
  89 #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE\r
  90 \r
  91 /* Constants required to access and manipulate the NVIC. */\r
  92 #define portNVIC_SYSTICK_CTRL                                   ( ( volatile unsigned long * ) 0xe000e010 )\r
  93 #define portNVIC_SYSTICK_LOAD                                   ( ( volatile unsigned long * ) 0xe000e014 )\r
  94 #define portNVIC_SYSPRI2                                                ( ( volatile unsigned long * ) 0xe000ed20 )\r
  95 #define portNVIC_SYSPRI1                                                ( ( volatile unsigned long * ) 0xe000ed1c )\r
  96 #define portNVIC_SYS_CTRL_STATE                                 ( ( volatile unsigned long * ) 0xe000ed24 )\r
  97 #define portNVIC_MEM_FAULT_ENABLE                               ( 1UL << 16UL )\r
  98 \r
  99 /* Constants required to access and manipulate the MPU. */\r
 100 #define portMPU_TYPE                                                    ( ( volatile unsigned long * ) 0xe000ed90 )\r
 101 #define portMPU_REGION_BASE_ADDRESS                             ( ( volatile unsigned long * ) 0xe000ed9C )\r
 102 #define portMPU_REGION_ATTRIBUTE                                ( ( volatile unsigned long * ) 0xe000edA0 )\r
 103 #define portMPU_CTRL                                                    ( ( volatile unsigned long * ) 0xe000ed94 )\r
 104 #define portEXPECTED_MPU_TYPE_VALUE                             ( 8UL << 8UL ) /* 8 regions, unified. */\r
 105 #define portMPU_ENABLE                                                  ( 0x01UL )\r
 106 #define portMPU_BACKGROUND_ENABLE                               ( 1UL << 2UL )\r
 107 #define portPRIVILEGED_EXECUTION_START_ADDRESS  ( 0UL )\r
 108 #define portMPU_REGION_VALID                                    ( 0x10UL )\r
 109 #define portMPU_REGION_ENABLE                                   ( 0x01UL )\r
 110 #define portPERIPHERALS_START_ADDRESS                   0x40000000UL\r
 111 #define portPERIPHERALS_END_ADDRESS                             0x5FFFFFFFUL\r
 112 \r
 113 /* Constants required to access and manipulate the SysTick. */\r
 114 #define portNVIC_SYSTICK_CLK                                    ( 0x00000004UL )\r
 115 #define portNVIC_SYSTICK_INT                                    ( 0x00000002UL )\r
 116 #define portNVIC_SYSTICK_ENABLE                                 ( 0x00000001UL )\r
 117 #define portNVIC_PENDSV_PRI                                             ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )\r
 118 #define portNVIC_SYSTICK_PRI                                    ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )\r
 119 #define portNVIC_SVC_PRI                                                ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )\r
 120 \r
 121 /* Constants required to set up the initial stack. */\r
 122 #define portINITIAL_XPSR                                                ( 0x01000000 )\r
 123 #define portINITIAL_CONTROL_IF_UNPRIVILEGED             ( 0x03 )\r
 124 #define portINITIAL_CONTROL_IF_PRIVILEGED               ( 0x02 )\r
 125 \r
 126 /* Offsets in the stack to the parameters when inside the SVC handler. */\r
 127 #define portOFFSET_TO_PC                                                ( 6 )\r
 128 \r
 129 /* Set the privilege level to user mode if xRunningPrivileged is false. */\r
 130 #define portRESET_PRIVILEGE( xRunningPrivileged ) if( xRunningPrivileged != pdTRUE ) __asm volatile ( " mrs r0, control \n orr r0, #1 \n msr control, r0" :::"r0" )\r
 131 \r
 132 /* Each task maintains its own interrupt status in the critical nesting\r
 133 variable.  Note this is not saved as part of the task context as context\r
 134 switches can only occur when uxCriticalNesting is zero. */\r
 135 static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;\r
 136 \r
 137 /*\r
 138  * Setup the timer to generate the tick interrupts.\r
 139  */\r
 140 static void prvSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;\r
 141 \r
 142 /*\r
 143  * Configure a number of standard MPU regions that are used by all tasks.\r
 144  */\r
 145 static void prvSetupMPU( void ) PRIVILEGED_FUNCTION;\r
 146 \r
 147 /*\r
 148  * Return the smallest MPU region size that a given number of bytes will fit\r
 149  * into.  The region size is returned as the value that should be programmed\r
 150  * into the region attribute register for that region.\r
 151  */\r
 152 static unsigned long prvGetMPURegionSizeSetting( unsigned long ulActualSizeInBytes ) PRIVILEGED_FUNCTION;\r
 153 \r
 154 /*\r
 155  * Checks to see if being called from the context of an unprivileged task, and\r
 156  * if so raises the privilege level and returns false - otherwise does nothing\r
 157  * other than return true.\r
 158  */\r
 159 static portBASE_TYPE prvRaisePrivilege( void ) __attribute__(( naked ));\r
 160 \r
 161 /*\r
 162  * Standard FreeRTOS exception handlers.\r
 163  */\r
 164 void xPortPendSVHandler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;\r
 165 void xPortSysTickHandler( void )  __attribute__ ((optimize("3"))) PRIVILEGED_FUNCTION;\r
 166 void vPortSVCHandler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;\r
 167 \r
 168 /*\r
 169  * Starts the scheduler by restoring the context of the first task to run.\r
 170  */\r
 171 static void prvRestoreContextOfFirstTask( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION;\r
 172 \r
 173 /*\r
 174  * C portion of the SVC handler.  The SVC handler is split between an asm entry\r
 175  * and a C wrapper for simplicity of coding and maintenance.\r
 176  */\r
 177 static void prvSVCHandler( unsigned long *pulRegisters ) __attribute__(( noinline )) PRIVILEGED_FUNCTION;\r
 178 \r
 179 /*\r
 180  * Prototypes for all the MPU wrappers.\r
 181  */\r
 182 signed portBASE_TYPE MPU_xTaskGenericCreate( pdTASK_CODE pvTaskCode, const signed char * const pcName, unsigned short usStackDepth, void *pvParameters, unsigned portBASE_TYPE uxPriority, xTaskHandle *pxCreatedTask, portSTACK_TYPE *puxStackBuffer, const xMemoryRegion * const xRegions );\r
 183 void MPU_vTaskAllocateMPURegions( xTaskHandle xTask, const xMemoryRegion * const xRegions );\r
 184 void MPU_vTaskDelete( xTaskHandle pxTaskToDelete );\r
 185 void MPU_vTaskDelayUntil( portTickType * const pxPreviousWakeTime, portTickType xTimeIncrement );\r
 186 void MPU_vTaskDelay( portTickType xTicksToDelay );\r
 187 unsigned portBASE_TYPE MPU_uxTaskPriorityGet( xTaskHandle pxTask );\r
 188 void MPU_vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority );\r
 189 eTaskState MPU_eTaskGetState( xTaskHandle pxTask );\r
 190 void MPU_vTaskSuspend( xTaskHandle pxTaskToSuspend );\r
 191 signed portBASE_TYPE MPU_xTaskIsTaskSuspended( xTaskHandle xTask );\r
 192 void MPU_vTaskResume( xTaskHandle pxTaskToResume );\r
 193 void MPU_vTaskSuspendAll( void );\r
 194 signed portBASE_TYPE MPU_xTaskResumeAll( void );\r
 195 portTickType MPU_xTaskGetTickCount( void );\r
 196 unsigned portBASE_TYPE MPU_uxTaskGetNumberOfTasks( void );\r
 197 void MPU_vTaskList( signed char *pcWriteBuffer );\r
 198 void MPU_vTaskGetRunTimeStats( signed char *pcWriteBuffer );\r
 199 void MPU_vTaskSetApplicationTaskTag( xTaskHandle xTask, pdTASK_HOOK_CODE pxTagValue );\r
 200 pdTASK_HOOK_CODE MPU_xTaskGetApplicationTaskTag( xTaskHandle xTask );\r
 201 portBASE_TYPE MPU_xTaskCallApplicationTaskHook( xTaskHandle xTask, void *pvParameter );\r
 202 unsigned portBASE_TYPE MPU_uxTaskGetStackHighWaterMark( xTaskHandle xTask );\r
 203 xTaskHandle MPU_xTaskGetCurrentTaskHandle( void );\r
 204 portBASE_TYPE MPU_xTaskGetSchedulerState( void );\r
 205 xTaskHandle MPU_xTaskGetIdleTaskHandle( void );\r
 206 xQueueHandle MPU_xQueueGenericCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize, unsigned char ucQueueType );\r
 207 signed portBASE_TYPE MPU_xQueueGenericSend( xQueueHandle xQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition );\r
 208 portBASE_TYPE MPU_xQueueGenericReset( xQueueHandle pxQueue, portBASE_TYPE xNewQueue );\r
 209 unsigned portBASE_TYPE MPU_uxQueueMessagesWaiting( const xQueueHandle pxQueue );\r
 210 signed portBASE_TYPE MPU_xQueueGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking );\r
 211 xQueueHandle MPU_xQueueCreateMutex( void );\r
 212 xQueueHandle MPU_xQueueCreateCountingSemaphore( unsigned portBASE_TYPE uxCountValue, unsigned portBASE_TYPE uxInitialCount );\r
 213 portBASE_TYPE MPU_xQueueTakeMutexRecursive( xQueueHandle xMutex, portTickType xBlockTime );\r
 214 portBASE_TYPE MPU_xQueueGiveMutexRecursive( xQueueHandle xMutex );\r
 215 signed portBASE_TYPE MPU_xQueueAltGenericSend( xQueueHandle pxQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition );\r
 216 signed portBASE_TYPE MPU_xQueueAltGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking );\r
 217 void MPU_vQueueAddToRegistry( xQueueHandle xQueue, signed char *pcName );\r
 218 void MPU_vQueueDelete( xQueueHandle xQueue );\r
 219 void *MPU_pvPortMalloc( size_t xSize );\r
 220 void MPU_vPortFree( void *pv );\r
 221 void MPU_vPortInitialiseBlocks( void );\r
 222 size_t MPU_xPortGetFreeHeapSize( void );\r
 223 xQueueSetHandle MPU_xQueueCreateSet( unsigned portBASE_TYPE uxEventQueueLength );\r
 224 xQueueSetMemberHandle MPU_xQueueSelectFromSet( xQueueSetHandle xQueueSet, portTickType xBlockTimeTicks );\r
 225 portBASE_TYPE MPU_xQueueAddToSet( xQueueSetMemberHandle xQueueOrSemaphore, xQueueSetHandle xQueueSet );\r
 226 portBASE_TYPE MPU_xQueueRemoveFromSet( xQueueSetMemberHandle xQueueOrSemaphore, xQueueSetHandle xQueueSet );\r
 227 \r
 228 /*-----------------------------------------------------------*/\r
 229 \r
 230 /*\r
 231  * See header file for description.\r
 232  */\r
 233 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters, portBASE_TYPE xRunPrivileged )\r
 234 {\r
 235         /* Simulate the stack frame as it would be created by a context switch\r
 236         interrupt. */\r
 237         pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */\r
 238         *pxTopOfStack = portINITIAL_XPSR;       /* xPSR */\r
 239         pxTopOfStack--;\r
 240         *pxTopOfStack = ( portSTACK_TYPE ) pxCode;      /* PC */\r
 241         pxTopOfStack--;\r
 242         *pxTopOfStack = 0;      /* LR */\r
 243         pxTopOfStack -= 5;      /* R12, R3, R2 and R1. */\r
 244         *pxTopOfStack = ( portSTACK_TYPE ) pvParameters;        /* R0 */\r
 245         pxTopOfStack -= 9;      /* R11, R10, R9, R8, R7, R6, R5 and R4. */\r
 246 \r
 247         if( xRunPrivileged == pdTRUE )\r
 248         {\r
 249                 *pxTopOfStack = portINITIAL_CONTROL_IF_PRIVILEGED;\r
 250         }\r
 251         else\r
 252         {\r
 253                 *pxTopOfStack = portINITIAL_CONTROL_IF_UNPRIVILEGED;\r
 254         }\r
 255 \r
 256         return pxTopOfStack;\r
 257 }\r
 258 /*-----------------------------------------------------------*/\r
 259 \r
 260 void vPortSVCHandler( void )\r
 261 {\r
 262         /* Assumes psp was in use. */\r
 263         __asm volatile\r
 264         (\r
 265                 #ifndef USE_PROCESS_STACK       /* Code should not be required if a main() is using the process stack. */\r
 266                         "       tst lr, #4                                              \n"\r
 267                         "       ite eq                                                  \n"\r
 268                         "       mrseq r0, msp                                   \n"\r
 269                         "       mrsne r0, psp                                   \n"\r
 270                 #else\r
 271                         "       mrs r0, psp                                             \n"\r
 272                 #endif\r
 273                         "       b %0                                                    \n"\r
 274                         ::"i"(prvSVCHandler):"r0"\r
 275         );\r
 276 }\r
 277 /*-----------------------------------------------------------*/\r
 278 \r
 279 static void prvSVCHandler(      unsigned long *pulParam )\r
 280 {\r
 281 unsigned char ucSVCNumber;\r
 282 \r
 283         /* The stack contains: r0, r1, r2, r3, r12, r14, the return address and\r
 284         xPSR.  The first argument (r0) is pulParam[ 0 ]. */\r
 285         ucSVCNumber = ( ( unsigned char * ) pulParam[ portOFFSET_TO_PC ] )[ -2 ];\r
 286         switch( ucSVCNumber )\r
 287         {\r
 288                 case portSVC_START_SCHEDULER    :       *(portNVIC_SYSPRI1) |= portNVIC_SVC_PRI;\r
 289                                                                                         prvRestoreContextOfFirstTask();\r
 290                                                                                         break;\r
 291 \r
 292                 case portSVC_YIELD                              :       *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;\r
 293                                                                                         /* Barriers are normally not required\r
 294                                                                                         but do ensure the code is completely\r
 295                                                                                         within the specified behaviour for the\r
 296                                                                                         architecture. */\r
 297                                                                                         __asm volatile( "dsb" );\r
 298                                                                                         __asm volatile( "isb" );\r
 299 \r
 300                                                                                         break;\r
 301 \r
 302                 case portSVC_RAISE_PRIVILEGE    :       __asm volatile\r
 303                                                                                         (\r
 304                                                                                                 "       mrs r1, control         \n" /* Obtain current control value. */\r
 305                                                                                                 "       bic r1, #1                      \n" /* Set privilege bit. */\r
 306                                                                                                 "       msr control, r1         \n" /* Write back new control value. */\r
 307                                                                                                 :::"r1"\r
 308                                                                                         );\r
 309                                                                                         break;\r
 310 \r
 311                 default                                                 :       /* Unknown SVC call. */\r
 312                                                                                         break;\r
 313         }\r
 314 }\r
 315 /*-----------------------------------------------------------*/\r
 316 \r
 317 static void prvRestoreContextOfFirstTask( void )\r
 318 {\r
 319         __asm volatile\r
 320         (\r
 321                 "       ldr r0, =0xE000ED08                             \n" /* Use the NVIC offset register to locate the stack. */\r
 322                 "       ldr r0, [r0]                                    \n"\r
 323                 "       ldr r0, [r0]                                    \n"\r
 324                 "       msr msp, r0                                             \n" /* Set the msp back to the start of the stack. */\r
 325                 "       ldr     r3, pxCurrentTCBConst2          \n" /* Restore the context. */\r
 326                 "       ldr r1, [r3]                                    \n"\r
 327                 "       ldr r0, [r1]                                    \n" /* The first item in the TCB is the task top of stack. */\r
 328                 "       add r1, r1, #4                                  \n" /* Move onto the second item in the TCB... */\r
 329                 "       ldr r2, =0xe000ed9c                             \n" /* Region Base Address register. */\r
 330                 "       ldmia r1!, {r4-r11}                             \n" /* Read 4 sets of MPU registers. */\r
 331                 "       stmia r2!, {r4-r11}                             \n" /* Write 4 sets of MPU registers. */\r
 332                 "       ldmia r0!, {r3, r4-r11}                 \n" /* Pop the registers that are not automatically saved on exception entry. */\r
 333                 "       msr control, r3                                 \n"\r
 334                 "       msr psp, r0                                             \n" /* Restore the task stack pointer. */\r
 335                 "       mov r0, #0                                              \n"\r
 336                 "       msr     basepri, r0                                     \n"\r
 337                 "       ldr r14, =0xfffffffd                    \n" /* Load exec return code. */\r
 338                 "       bx r14                                                  \n"\r
 339                 "                                                                       \n"\r
 340                 "       .align 2                                                \n"\r
 341                 "pxCurrentTCBConst2: .word pxCurrentTCB \n"\r
 342         );\r
 343 }\r
 344 /*-----------------------------------------------------------*/\r
 345 \r
 346 /*\r
 347  * See header file for description.\r
 348  */\r
 349 portBASE_TYPE xPortStartScheduler( void )\r
 350 {\r
 351         /* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.  See\r
 352         http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */\r
 353         configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) );\r
 354 \r
 355         /* Make PendSV and SysTick the same priority as the kernel. */\r
 356         *(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;\r
 357         *(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;\r
 358 \r
 359         /* Configure the regions in the MPU that are common to all tasks. */\r
 360         prvSetupMPU();\r
 361 \r
 362         /* Start the timer that generates the tick ISR.  Interrupts are disabled\r
 363         here already. */\r
 364         prvSetupTimerInterrupt();\r
 365 \r
 366         /* Initialise the critical nesting count ready for the first task. */\r
 367         uxCriticalNesting = 0;\r
 368 \r
 369         /* Start the first task. */\r
 370         __asm volatile( "       svc %0                  \n"\r
 371                                         :: "i" (portSVC_START_SCHEDULER) );\r
 372 \r
 373         /* Should not get here! */\r
 374         return 0;\r
 375 }\r
 376 /*-----------------------------------------------------------*/\r
 377 \r
 378 void vPortEndScheduler( void )\r
 379 {\r
 380         /* It is unlikely that the CM3 port will require this function as there\r
 381         is nothing to return to.  */\r
 382 }\r
 383 /*-----------------------------------------------------------*/\r
 384 \r
 385 void vPortEnterCritical( void )\r
 386 {\r
 387 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 388 \r
 389         portDISABLE_INTERRUPTS();\r
 390         uxCriticalNesting++;\r
 391 \r
 392         portRESET_PRIVILEGE( xRunningPrivileged );\r
 393 }\r
 394 /*-----------------------------------------------------------*/\r
 395 \r
 396 void vPortExitCritical( void )\r
 397 {\r
 398 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 399 \r
 400         uxCriticalNesting--;\r
 401         if( uxCriticalNesting == 0 )\r
 402         {\r
 403                 portENABLE_INTERRUPTS();\r
 404         }\r
 405         portRESET_PRIVILEGE( xRunningPrivileged );\r
 406 }\r
 407 /*-----------------------------------------------------------*/\r
 408 \r
 409 void xPortPendSVHandler( void )\r
 410 {\r
 411         /* This is a naked function. */\r
 412 \r
 413         __asm volatile\r
 414         (\r
 415                 "       mrs r0, psp                                                     \n"\r
 416                 "                                                                               \n"\r
 417                 "       ldr     r3, pxCurrentTCBConst                   \n" /* Get the location of the current TCB. */\r
 418                 "       ldr     r2, [r3]                                                \n"\r
 419                 "                                                                               \n"\r
 420                 "       mrs r1, control                                         \n"\r
 421                 "       stmdb r0!, {r1, r4-r11}                         \n" /* Save the remaining registers. */\r
 422                 "       str r0, [r2]                                            \n" /* Save the new top of stack into the first member of the TCB. */\r
 423                 "                                                                               \n"\r
 424                 "       stmdb sp!, {r3, r14}                            \n"\r
 425                 "       mov r0, %0                                                      \n"\r
 426                 "       msr basepri, r0                                         \n"\r
 427                 "       bl vTaskSwitchContext                           \n"\r
 428                 "       mov r0, #0                                                      \n"\r
 429                 "       msr basepri, r0                                         \n"\r
 430                 "       ldmia sp!, {r3, r14}                            \n"\r
 431                 "                                                                               \n"     /* Restore the context. */\r
 432                 "       ldr r1, [r3]                                            \n"\r
 433                 "       ldr r0, [r1]                                            \n" /* The first item in the TCB is the task top of stack. */\r
 434                 "       add r1, r1, #4                                          \n" /* Move onto the second item in the TCB... */\r
 435                 "       ldr r2, =0xe000ed9c                                     \n" /* Region Base Address register. */\r
 436                 "       ldmia r1!, {r4-r11}                                     \n" /* Read 4 sets of MPU registers. */\r
 437                 "       stmia r2!, {r4-r11}                                     \n" /* Write 4 sets of MPU registers. */\r
 438                 "       ldmia r0!, {r3, r4-r11}                         \n" /* Pop the registers that are not automatically saved on exception entry. */\r
 439                 "       msr control, r3                                         \n"\r
 440                 "                                                                               \n"\r
 441                 "       msr psp, r0                                                     \n"\r
 442                 "       bx r14                                                          \n"\r
 443                 "                                                                               \n"\r
 444                 "       .align 2                                                        \n"\r
 445                 "pxCurrentTCBConst: .word pxCurrentTCB  \n"\r
 446                 ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)\r
 447         );\r
 448 }\r
 449 /*-----------------------------------------------------------*/\r
 450 \r
 451 void xPortSysTickHandler( void )\r
 452 {\r
 453 unsigned long ulDummy;\r
 454 \r
 455         /* If using preemption, also force a context switch. */\r
 456         #if configUSE_PREEMPTION == 1\r
 457                 *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;\r
 458         #endif\r
 459 \r
 460         ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();\r
 461         {\r
 462                 vTaskIncrementTick();\r
 463         }\r
 464         portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy );\r
 465 }\r
 466 /*-----------------------------------------------------------*/\r
 467 \r
 468 /*\r
 469  * Setup the systick timer to generate the tick interrupts at the required\r
 470  * frequency.\r
 471  */\r
 472 static void prvSetupTimerInterrupt( void )\r
 473 {\r
 474         /* Configure SysTick to interrupt at the requested rate. */\r
 475         *(portNVIC_SYSTICK_LOAD) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;\r
 476         *(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;\r
 477 }\r
 478 /*-----------------------------------------------------------*/\r
 479 \r
 480 static void prvSetupMPU( void )\r
 481 {\r
 482 extern unsigned long __privileged_functions_end__[];\r
 483 extern unsigned long __FLASH_segment_start__[];\r
 484 extern unsigned long __FLASH_segment_end__[];\r
 485 extern unsigned long __privileged_data_start__[];\r
 486 extern unsigned long __privileged_data_end__[];\r
 487 \r
 488         /* Check the expected MPU is present. */\r
 489         if( *portMPU_TYPE == portEXPECTED_MPU_TYPE_VALUE )\r
 490         {\r
 491                 /* First setup the entire flash for unprivileged read only access. */\r
 492         *portMPU_REGION_BASE_ADDRESS =  ( ( unsigned long ) __FLASH_segment_start__ ) | /* Base address. */\r
 493                                                                                 ( portMPU_REGION_VALID ) |\r
 494                                                                                 ( portUNPRIVILEGED_FLASH_REGION );\r
 495 \r
 496                 *portMPU_REGION_ATTRIBUTE =             ( portMPU_REGION_READ_ONLY ) |\r
 497                                                                                 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 498                                                                                 ( prvGetMPURegionSizeSetting( ( unsigned long ) __FLASH_segment_end__ - ( unsigned long ) __FLASH_segment_start__ ) ) |\r
 499                                                                                 ( portMPU_REGION_ENABLE );\r
 500 \r
 501                 /* Setup the first 16K for privileged only access (even though less\r
 502                 than 10K is actually being used).  This is where the kernel code is\r
 503                 placed. */\r
 504         *portMPU_REGION_BASE_ADDRESS =  ( ( unsigned long ) __FLASH_segment_start__ ) | /* Base address. */\r
 505                                                                                 ( portMPU_REGION_VALID ) |\r
 506                                                                                 ( portPRIVILEGED_FLASH_REGION );\r
 507 \r
 508                 *portMPU_REGION_ATTRIBUTE =             ( portMPU_REGION_PRIVILEGED_READ_ONLY ) |\r
 509                                                                                 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 510                                                                                 ( prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_functions_end__ - ( unsigned long ) __FLASH_segment_start__ ) ) |\r
 511                                                                                 ( portMPU_REGION_ENABLE );\r
 512 \r
 513                 /* Setup the privileged data RAM region.  This is where the kernel data\r
 514                 is placed. */\r
 515                 *portMPU_REGION_BASE_ADDRESS =  ( ( unsigned long ) __privileged_data_start__ ) | /* Base address. */\r
 516                                                                                 ( portMPU_REGION_VALID ) |\r
 517                                                                                 ( portPRIVILEGED_RAM_REGION );\r
 518 \r
 519                 *portMPU_REGION_ATTRIBUTE =             ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |\r
 520                                                                                 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 521                                                                                 prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_data_end__ - ( unsigned long ) __privileged_data_start__ ) |\r
 522                                                                                 ( portMPU_REGION_ENABLE );\r
 523 \r
 524                 /* By default allow everything to access the general peripherals.  The\r
 525                 system peripherals and registers are protected. */\r
 526                 *portMPU_REGION_BASE_ADDRESS =  ( portPERIPHERALS_START_ADDRESS ) |\r
 527                                                                                 ( portMPU_REGION_VALID ) |\r
 528                                                                                 ( portGENERAL_PERIPHERALS_REGION );\r
 529 \r
 530                 *portMPU_REGION_ATTRIBUTE =             ( portMPU_REGION_READ_WRITE | portMPU_REGION_EXECUTE_NEVER ) |\r
 531                                                                                 ( prvGetMPURegionSizeSetting( portPERIPHERALS_END_ADDRESS - portPERIPHERALS_START_ADDRESS ) ) |\r
 532                                                                                 ( portMPU_REGION_ENABLE );\r
 533 \r
 534                 /* Enable the memory fault exception. */\r
 535                 *portNVIC_SYS_CTRL_STATE |= portNVIC_MEM_FAULT_ENABLE;\r
 536 \r
 537                 /* Enable the MPU with the background region configured. */\r
 538                 *portMPU_CTRL |= ( portMPU_ENABLE | portMPU_BACKGROUND_ENABLE );\r
 539         }\r
 540 }\r
 541 /*-----------------------------------------------------------*/\r
 542 \r
 543 static unsigned long prvGetMPURegionSizeSetting( unsigned long ulActualSizeInBytes )\r
 544 {\r
 545 unsigned long ulRegionSize, ulReturnValue = 4;\r
 546 \r
 547         /* 32 is the smallest region size, 31 is the largest valid value for\r
 548         ulReturnValue. */\r
 549         for( ulRegionSize = 32UL; ulReturnValue < 31UL; ( ulRegionSize <<= 1UL ) )\r
 550         {\r
 551                 if( ulActualSizeInBytes <= ulRegionSize )\r
 552                 {\r
 553                         break;\r
 554                 }\r
 555                 else\r
 556                 {\r
 557                         ulReturnValue++;\r
 558                 }\r
 559         }\r
 560 \r
 561         /* Shift the code by one before returning so it can be written directly\r
 562         into the the correct bit position of the attribute register. */\r
 563         return ( ulReturnValue << 1UL );\r
 564 }\r
 565 /*-----------------------------------------------------------*/\r
 566 \r
 567 static portBASE_TYPE prvRaisePrivilege( void )\r
 568 {\r
 569         __asm volatile\r
 570         (\r
 571                 "       mrs r0, control                                         \n"\r
 572                 "       tst r0, #1                                                      \n" /* Is the task running privileged? */\r
 573                 "       itte ne                                                         \n"\r
 574                 "       movne r0, #0                                            \n" /* CONTROL[0]!=0, return false. */\r
 575                 "       svcne %0                                                        \n" /* Switch to privileged. */\r
 576                 "       moveq r0, #1                                            \n" /* CONTROL[0]==0, return true. */\r
 577                 "       bx lr                                                           \n"\r
 578                 :: "i" (portSVC_RAISE_PRIVILEGE) : "r0"\r
 579         );\r
 580 \r
 581         return 0;\r
 582 }\r
 583 /*-----------------------------------------------------------*/\r
 584 \r
 585 void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, portSTACK_TYPE *pxBottomOfStack, unsigned short usStackDepth )\r
 586 {\r
 587 extern unsigned long __SRAM_segment_start__[];\r
 588 extern unsigned long __SRAM_segment_end__[];\r
 589 extern unsigned long __privileged_data_start__[];\r
 590 extern unsigned long __privileged_data_end__[];\r
 591 long lIndex;\r
 592 unsigned long ul;\r
 593 \r
 594         if( xRegions == NULL )\r
 595         {\r
 596                 /* No MPU regions are specified so allow access to all RAM. */\r
 597         xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =\r
 598                                 ( ( unsigned long ) __SRAM_segment_start__ ) | /* Base address. */\r
 599                                 ( portMPU_REGION_VALID ) |\r
 600                                 ( portSTACK_REGION );\r
 601 \r
 602                 xMPUSettings->xRegion[ 0 ].ulRegionAttribute =\r
 603                                 ( portMPU_REGION_READ_WRITE ) |\r
 604                                 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 605                                 ( prvGetMPURegionSizeSetting( ( unsigned long ) __SRAM_segment_end__ - ( unsigned long ) __SRAM_segment_start__ ) ) |\r
 606                                 ( portMPU_REGION_ENABLE );\r
 607 \r
 608                 /* Re-instate the privileged only RAM region as xRegion[ 0 ] will have\r
 609                 just removed the privileged only parameters. */\r
 610                 xMPUSettings->xRegion[ 1 ].ulRegionBaseAddress =\r
 611                                 ( ( unsigned long ) __privileged_data_start__ ) | /* Base address. */\r
 612                                 ( portMPU_REGION_VALID ) |\r
 613                                 ( portSTACK_REGION + 1 );\r
 614 \r
 615                 xMPUSettings->xRegion[ 1 ].ulRegionAttribute =\r
 616                                 ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |\r
 617                                 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 618                                 prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_data_end__ - ( unsigned long ) __privileged_data_start__ ) |\r
 619                                 ( portMPU_REGION_ENABLE );\r
 620 \r
 621                 /* Invalidate all other regions. */\r
 622                 for( ul = 2; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )\r
 623                 {\r
 624                         xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;\r
 625                         xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;\r
 626                 }\r
 627         }\r
 628         else\r
 629         {\r
 630                 /* This function is called automatically when the task is created - in\r
 631                 which case the stack region parameters will be valid.  At all other\r
 632                 times the stack parameters will not be valid and it is assumed that the\r
 633                 stack region has already been configured. */\r
 634                 if( usStackDepth > 0 )\r
 635                 {\r
 636                         /* Define the region that allows access to the stack. */\r
 637                         xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =\r
 638                                         ( ( unsigned long ) pxBottomOfStack ) |\r
 639                                         ( portMPU_REGION_VALID ) |\r
 640                                         ( portSTACK_REGION ); /* Region number. */\r
 641 \r
 642                         xMPUSettings->xRegion[ 0 ].ulRegionAttribute =\r
 643                                         ( portMPU_REGION_READ_WRITE ) | /* Read and write. */\r
 644                                         ( prvGetMPURegionSizeSetting( ( unsigned long ) usStackDepth * ( unsigned long ) sizeof( portSTACK_TYPE ) ) ) |\r
 645                                         ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 646                                         ( portMPU_REGION_ENABLE );\r
 647                 }\r
 648 \r
 649                 lIndex = 0;\r
 650 \r
 651                 for( ul = 1; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )\r
 652                 {\r
 653                         if( ( xRegions[ lIndex ] ).ulLengthInBytes > 0UL )\r
 654                         {\r
 655                                 /* Translate the generic region definition contained in\r
 656                                 xRegions into the CM3 specific MPU settings that are then\r
 657                                 stored in xMPUSettings. */\r
 658                                 xMPUSettings->xRegion[ ul ].ulRegionBaseAddress =\r
 659                                                 ( ( unsigned long ) xRegions[ lIndex ].pvBaseAddress ) |\r
 660                                                 ( portMPU_REGION_VALID ) |\r
 661                                                 ( portSTACK_REGION + ul ); /* Region number. */\r
 662 \r
 663                                 xMPUSettings->xRegion[ ul ].ulRegionAttribute =\r
 664                                                 ( prvGetMPURegionSizeSetting( xRegions[ lIndex ].ulLengthInBytes ) ) |\r
 665                                                 ( xRegions[ lIndex ].ulParameters ) |\r
 666                                                 ( portMPU_REGION_ENABLE );\r
 667                         }\r
 668                         else\r
 669                         {\r
 670                                 /* Invalidate the region. */\r
 671                                 xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;\r
 672                                 xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;\r
 673                         }\r
 674 \r
 675                         lIndex++;\r
 676                 }\r
 677         }\r
 678 }\r
 679 /*-----------------------------------------------------------*/\r
 680 \r
 681 signed portBASE_TYPE MPU_xTaskGenericCreate( pdTASK_CODE pvTaskCode, const signed char * const pcName, unsigned short usStackDepth, void *pvParameters, unsigned portBASE_TYPE uxPriority, xTaskHandle *pxCreatedTask, portSTACK_TYPE *puxStackBuffer, const xMemoryRegion * const xRegions )\r
 682 {\r
 683 signed portBASE_TYPE xReturn;\r
 684 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 685 \r
 686         xReturn = xTaskGenericCreate( pvTaskCode, pcName, usStackDepth, pvParameters, uxPriority, pxCreatedTask, puxStackBuffer, xRegions );\r
 687         portRESET_PRIVILEGE( xRunningPrivileged );\r
 688         return xReturn;\r
 689 }\r
 690 /*-----------------------------------------------------------*/\r
 691 \r
 692 void MPU_vTaskAllocateMPURegions( xTaskHandle xTask, const xMemoryRegion * const xRegions )\r
 693 {\r
 694 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 695 \r
 696         vTaskAllocateMPURegions( xTask, xRegions );\r
 697         portRESET_PRIVILEGE( xRunningPrivileged );\r
 698 }\r
 699 /*-----------------------------------------------------------*/\r
 700 \r
 701 #if ( INCLUDE_vTaskDelete == 1 )\r
 702         void MPU_vTaskDelete( xTaskHandle pxTaskToDelete )\r
 703         {\r
 704     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 705 \r
 706                 vTaskDelete( pxTaskToDelete );\r
 707         portRESET_PRIVILEGE( xRunningPrivileged );\r
 708         }\r
 709 #endif\r
 710 /*-----------------------------------------------------------*/\r
 711 \r
 712 #if ( INCLUDE_vTaskDelayUntil == 1 )\r
 713         void MPU_vTaskDelayUntil( portTickType * const pxPreviousWakeTime, portTickType xTimeIncrement )\r
 714         {\r
 715     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 716 \r
 717                 vTaskDelayUntil( pxPreviousWakeTime, xTimeIncrement );\r
 718         portRESET_PRIVILEGE( xRunningPrivileged );\r
 719         }\r
 720 #endif\r
 721 /*-----------------------------------------------------------*/\r
 722 \r
 723 #if ( INCLUDE_vTaskDelay == 1 )\r
 724         void MPU_vTaskDelay( portTickType xTicksToDelay )\r
 725         {\r
 726     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 727 \r
 728                 vTaskDelay( xTicksToDelay );\r
 729         portRESET_PRIVILEGE( xRunningPrivileged );\r
 730         }\r
 731 #endif\r
 732 /*-----------------------------------------------------------*/\r
 733 \r
 734 #if ( INCLUDE_uxTaskPriorityGet == 1 )\r
 735         unsigned portBASE_TYPE MPU_uxTaskPriorityGet( xTaskHandle pxTask )\r
 736         {\r
 737         unsigned portBASE_TYPE uxReturn;\r
 738     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 739 \r
 740                 uxReturn = uxTaskPriorityGet( pxTask );\r
 741         portRESET_PRIVILEGE( xRunningPrivileged );\r
 742                 return uxReturn;\r
 743         }\r
 744 #endif\r
 745 /*-----------------------------------------------------------*/\r
 746 \r
 747 #if ( INCLUDE_vTaskPrioritySet == 1 )\r
 748         void MPU_vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority )\r
 749         {\r
 750     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 751 \r
 752                 vTaskPrioritySet( pxTask, uxNewPriority );\r
 753         portRESET_PRIVILEGE( xRunningPrivileged );\r
 754         }\r
 755 #endif\r
 756 /*-----------------------------------------------------------*/\r
 757 \r
 758 #if ( INCLUDE_eTaskGetState == 1 )\r
 759         eTaskState MPU_eTaskGetState( xTaskHandle pxTask )\r
 760         {\r
 761     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 762         eTaskState eReturn;\r
 763 \r
 764                 eReturn = eTaskGetState( pxTask );\r
 765         portRESET_PRIVILEGE( xRunningPrivileged );\r
 766                 return eReturn;\r
 767         }\r
 768 #endif\r
 769 /*-----------------------------------------------------------*/\r
 770 \r
 771 #if ( INCLUDE_xTaskGetIdleTaskHandle == 1 )\r
 772         xTaskHandle MPU_xTaskGetIdleTaskHandle( void )\r
 773         {\r
 774         xTaskHandle xReturn;\r
 775     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 776 \r
 777                 xReturn = xTaskGetIdleTaskHandle();\r
 778         portRESET_PRIVILEGE( xRunningPrivileged );\r
 779                 return eReturn;\r
 780         }\r
 781 #endif\r
 782 /*-----------------------------------------------------------*/\r
 783 \r
 784 #if ( INCLUDE_vTaskSuspend == 1 )\r
 785         void MPU_vTaskSuspend( xTaskHandle pxTaskToSuspend )\r
 786         {\r
 787     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 788 \r
 789                 vTaskSuspend( pxTaskToSuspend );\r
 790         portRESET_PRIVILEGE( xRunningPrivileged );\r
 791         }\r
 792 #endif\r
 793 /*-----------------------------------------------------------*/\r
 794 \r
 795 #if ( INCLUDE_vTaskSuspend == 1 )\r
 796         signed portBASE_TYPE MPU_xTaskIsTaskSuspended( xTaskHandle xTask )\r
 797         {\r
 798         signed portBASE_TYPE xReturn;\r
 799     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 800 \r
 801                 xReturn = xTaskIsTaskSuspended( xTask );\r
 802         portRESET_PRIVILEGE( xRunningPrivileged );\r
 803                 return xReturn;\r
 804         }\r
 805 #endif\r
 806 /*-----------------------------------------------------------*/\r
 807 \r
 808 #if ( INCLUDE_vTaskSuspend == 1 )\r
 809         void MPU_vTaskResume( xTaskHandle pxTaskToResume )\r
 810         {\r
 811     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 812 \r
 813                 vTaskResume( pxTaskToResume );\r
 814         portRESET_PRIVILEGE( xRunningPrivileged );\r
 815         }\r
 816 #endif\r
 817 /*-----------------------------------------------------------*/\r
 818 \r
 819 void MPU_vTaskSuspendAll( void )\r
 820 {\r
 821 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 822 \r
 823         vTaskSuspendAll();\r
 824     portRESET_PRIVILEGE( xRunningPrivileged );\r
 825 }\r
 826 /*-----------------------------------------------------------*/\r
 827 \r
 828 signed portBASE_TYPE MPU_xTaskResumeAll( void )\r
 829 {\r
 830 signed portBASE_TYPE xReturn;\r
 831 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 832 \r
 833         xReturn = xTaskResumeAll();\r
 834     portRESET_PRIVILEGE( xRunningPrivileged );\r
 835     return xReturn;\r
 836 }\r
 837 /*-----------------------------------------------------------*/\r
 838 \r
 839 portTickType MPU_xTaskGetTickCount( void )\r
 840 {\r
 841 portTickType xReturn;\r
 842 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 843 \r
 844         xReturn = xTaskGetTickCount();\r
 845     portRESET_PRIVILEGE( xRunningPrivileged );\r
 846         return xReturn;\r
 847 }\r
 848 /*-----------------------------------------------------------*/\r
 849 \r
 850 unsigned portBASE_TYPE MPU_uxTaskGetNumberOfTasks( void )\r
 851 {\r
 852 unsigned portBASE_TYPE uxReturn;\r
 853 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 854 \r
 855         uxReturn = uxTaskGetNumberOfTasks();\r
 856     portRESET_PRIVILEGE( xRunningPrivileged );\r
 857         return uxReturn;\r
 858 }\r
 859 /*-----------------------------------------------------------*/\r
 860 \r
 861 #if ( configUSE_TRACE_FACILITY == 1 )\r
 862         void MPU_vTaskList( signed char *pcWriteBuffer )\r
 863         {\r
 864         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 865 \r
 866                 vTaskList( pcWriteBuffer );\r
 867                 portRESET_PRIVILEGE( xRunningPrivileged );\r
 868         }\r
 869 #endif\r
 870 /*-----------------------------------------------------------*/\r
 871 \r
 872 #if ( configGENERATE_RUN_TIME_STATS == 1 )\r
 873         void MPU_vTaskGetRunTimeStats( signed char *pcWriteBuffer )\r
 874         {\r
 875     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 876 \r
 877                 vTaskGetRunTimeStats( pcWriteBuffer );\r
 878         portRESET_PRIVILEGE( xRunningPrivileged );\r
 879         }\r
 880 #endif\r
 881 /*-----------------------------------------------------------*/\r
 882 \r
 883 #if ( configUSE_APPLICATION_TASK_TAG == 1 )\r
 884         void MPU_vTaskSetApplicationTaskTag( xTaskHandle xTask, pdTASK_HOOK_CODE pxTagValue )\r
 885         {\r
 886     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 887 \r
 888                 vTaskSetApplicationTaskTag( xTask, pxTagValue );\r
 889         portRESET_PRIVILEGE( xRunningPrivileged );\r
 890         }\r
 891 #endif\r
 892 /*-----------------------------------------------------------*/\r
 893 \r
 894 #if ( configUSE_APPLICATION_TASK_TAG == 1 )\r
 895         pdTASK_HOOK_CODE MPU_xTaskGetApplicationTaskTag( xTaskHandle xTask )\r
 896         {\r
 897         pdTASK_HOOK_CODE xReturn;\r
 898     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 899 \r
 900                 xReturn = xTaskGetApplicationTaskTag( xTask );\r
 901         portRESET_PRIVILEGE( xRunningPrivileged );\r
 902                 return xReturn;\r
 903         }\r
 904 #endif\r
 905 /*-----------------------------------------------------------*/\r
 906 \r
 907 #if ( configUSE_APPLICATION_TASK_TAG == 1 )\r
 908         portBASE_TYPE MPU_xTaskCallApplicationTaskHook( xTaskHandle xTask, void *pvParameter )\r
 909         {\r
 910         portBASE_TYPE xReturn;\r
 911     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 912 \r
 913                 xReturn = xTaskCallApplicationTaskHook( xTask, pvParameter );\r
 914         portRESET_PRIVILEGE( xRunningPrivileged );\r
 915                 return xReturn;\r
 916         }\r
 917 #endif\r
 918 /*-----------------------------------------------------------*/\r
 919 \r
 920 #if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 )\r
 921         unsigned portBASE_TYPE MPU_uxTaskGetStackHighWaterMark( xTaskHandle xTask )\r
 922         {\r
 923         unsigned portBASE_TYPE uxReturn;\r
 924     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 925 \r
 926                 uxReturn = uxTaskGetStackHighWaterMark( xTask );\r
 927         portRESET_PRIVILEGE( xRunningPrivileged );\r
 928                 return uxReturn;\r
 929         }\r
 930 #endif\r
 931 /*-----------------------------------------------------------*/\r
 932 \r
 933 #if ( INCLUDE_xTaskGetCurrentTaskHandle == 1 )\r
 934         xTaskHandle MPU_xTaskGetCurrentTaskHandle( void )\r
 935         {\r
 936         xTaskHandle xReturn;\r
 937     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 938 \r
 939                 xReturn = xTaskGetCurrentTaskHandle();\r
 940         portRESET_PRIVILEGE( xRunningPrivileged );\r
 941                 return xReturn;\r
 942         }\r
 943 #endif\r
 944 /*-----------------------------------------------------------*/\r
 945 \r
 946 #if ( INCLUDE_xTaskGetSchedulerState == 1 )\r
 947         portBASE_TYPE MPU_xTaskGetSchedulerState( void )\r
 948         {\r
 949         portBASE_TYPE xReturn;\r
 950     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 951 \r
 952                 xReturn = xTaskGetSchedulerState();\r
 953         portRESET_PRIVILEGE( xRunningPrivileged );\r
 954                 return xReturn;\r
 955         }\r
 956 #endif\r
 957 /*-----------------------------------------------------------*/\r
 958 \r
 959 xQueueHandle MPU_xQueueGenericCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize, unsigned char ucQueueType )\r
 960 {\r
 961 xQueueHandle xReturn;\r
 962 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 963 \r
 964         xReturn = xQueueGenericCreate( uxQueueLength, uxItemSize, ucQueueType );\r
 965         portRESET_PRIVILEGE( xRunningPrivileged );\r
 966         return xReturn;\r
 967 }\r
 968 /*-----------------------------------------------------------*/\r
 969 \r
 970 portBASE_TYPE MPU_xQueueGenericReset( xQueueHandle pxQueue, portBASE_TYPE xNewQueue )\r
 971 {\r
 972 portBASE_TYPE xReturn;\r
 973 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 974 \r
 975         xReturn = xQueueGenericReset( pxQueue, xNewQueue );\r
 976         portRESET_PRIVILEGE( xRunningPrivileged );\r
 977         return xReturn;\r
 978 }\r
 979 /*-----------------------------------------------------------*/\r
 980 \r
 981 signed portBASE_TYPE MPU_xQueueGenericSend( xQueueHandle xQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition )\r
 982 {\r
 983 signed portBASE_TYPE xReturn;\r
 984 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 985 \r
 986         xReturn = xQueueGenericSend( xQueue, pvItemToQueue, xTicksToWait, xCopyPosition );\r
 987         portRESET_PRIVILEGE( xRunningPrivileged );\r
 988         return xReturn;\r
 989 }\r
 990 /*-----------------------------------------------------------*/\r
 991 \r
 992 unsigned portBASE_TYPE MPU_uxQueueMessagesWaiting( const xQueueHandle pxQueue )\r
 993 {\r
 994 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 995 unsigned portBASE_TYPE uxReturn;\r
 996 \r
 997         uxReturn = uxQueueMessagesWaiting( pxQueue );\r
 998         portRESET_PRIVILEGE( xRunningPrivileged );\r
 999         return uxReturn;\r
1000 }\r
1001 /*-----------------------------------------------------------*/\r
1002 \r
1003 signed portBASE_TYPE MPU_xQueueGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking )\r
1004 {\r
1005 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1006 signed portBASE_TYPE xReturn;\r
1007 \r
1008         xReturn = xQueueGenericReceive( pxQueue, pvBuffer, xTicksToWait, xJustPeeking );\r
1009         portRESET_PRIVILEGE( xRunningPrivileged );\r
1010         return xReturn;\r
1011 }\r
1012 /*-----------------------------------------------------------*/\r
1013 \r
1014 #if ( configUSE_MUTEXES == 1 )\r
1015         xQueueHandle MPU_xQueueCreateMutex( void )\r
1016         {\r
1017     xQueueHandle xReturn;\r
1018         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1019 \r
1020                 xReturn = xQueueCreateMutex( queueQUEUE_TYPE_MUTEX );\r
1021                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1022                 return xReturn;\r
1023         }\r
1024 #endif\r
1025 /*-----------------------------------------------------------*/\r
1026 \r
1027 #if configUSE_COUNTING_SEMAPHORES == 1\r
1028         xQueueHandle MPU_xQueueCreateCountingSemaphore( unsigned portBASE_TYPE uxCountValue, unsigned portBASE_TYPE uxInitialCount )\r
1029         {\r
1030     xQueueHandle xReturn;\r
1031         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1032 \r
1033                 xReturn = xQueueCreateCountingSemaphore( uxCountValue, uxInitialCount );\r
1034                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1035                 return xReturn;\r
1036         }\r
1037 #endif\r
1038 /*-----------------------------------------------------------*/\r
1039 \r
1040 #if ( configUSE_MUTEXES == 1 )\r
1041         portBASE_TYPE MPU_xQueueTakeMutexRecursive( xQueueHandle xMutex, portTickType xBlockTime )\r
1042         {\r
1043         portBASE_TYPE xReturn;\r
1044         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1045 \r
1046                 xReturn = xQueueTakeMutexRecursive( xMutex, xBlockTime );\r
1047                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1048                 return xReturn;\r
1049         }\r
1050 #endif\r
1051 /*-----------------------------------------------------------*/\r
1052 \r
1053 #if ( configUSE_MUTEXES == 1 )\r
1054         portBASE_TYPE MPU_xQueueGiveMutexRecursive( xQueueHandle xMutex )\r
1055         {\r
1056         portBASE_TYPE xReturn;\r
1057         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1058 \r
1059                 xReturn = xQueueGiveMutexRecursive( xMutex );\r
1060                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1061                 return xReturn;\r
1062         }\r
1063 #endif\r
1064 /*-----------------------------------------------------------*/\r
1065 \r
1066 #if ( configUSE_QUEUE_SETS == 1 )\r
1067         xQueueSetHandle MPU_xQueueCreateSet( unsigned portBASE_TYPE uxEventQueueLength )\r
1068         {\r
1069         xQueueSetHandle xReturn;\r
1070         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1071 \r
1072                 xReturn = xQueueCreateSet( uxEventQueueLength );\r
1073                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1074                 return xReturn;\r
1075         }\r
1076 #endif\r
1077 /*-----------------------------------------------------------*/\r
1078 \r
1079 #if ( configUSE_QUEUE_SETS == 1 )\r
1080         xQueueSetMemberHandle MPU_xQueueSelectFromSet( xQueueSetHandle xQueueSet, portTickType xBlockTimeTicks )\r
1081         {\r
1082         xQueueSetMemberHandle xReturn;\r
1083         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1084 \r
1085                 xReturn = xQueueSelectFromSet( xQueueSet, xBlockTimeTicks );\r
1086                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1087                 return xReturn;\r
1088         }\r
1089 #endif\r
1090 /*-----------------------------------------------------------*/\r
1091 \r
1092 #if ( configUSE_QUEUE_SETS == 1 )\r
1093         portBASE_TYPE MPU_xQueueAddToSet( xQueueSetMemberHandle xQueueOrSemaphore, xQueueSetHandle xQueueSet )\r
1094         {\r
1095         portBASE_TYPE xReturn;\r
1096         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1097 \r
1098                 xReturn = xQueueAddToSet( xQueueOrSemaphore, xQueueSet );\r
1099                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1100                 return xReturn;\r
1101         }\r
1102 #endif\r
1103 /*-----------------------------------------------------------*/\r
1104 \r
1105 #if ( configUSE_QUEUE_SETS == 1 )\r
1106         portBASE_TYPE MPU_xQueueRemoveFromSet( xQueueSetMemberHandle xQueueOrSemaphore, xQueueSetHandle xQueueSet )\r
1107         {\r
1108         portBASE_TYPE xReturn;\r
1109         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1110 \r
1111                 xReturn = xQueueRemoveFromSet( xQueueOrSemaphore, xQueueSet );\r
1112                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1113                 return xReturn;\r
1114         }\r
1115 #endif\r
1116 /*-----------------------------------------------------------*/\r
1117 \r
1118 #if configUSE_ALTERNATIVE_API == 1\r
1119         signed portBASE_TYPE MPU_xQueueAltGenericSend( xQueueHandle pxQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition )\r
1120         {\r
1121         signed portBASE_TYPE xReturn;\r
1122         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1123 \r
1124                 xReturn =       signed portBASE_TYPE xQueueAltGenericSend( pxQueue, pvItemToQueue, xTicksToWait, xCopyPosition );\r
1125                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1126                 return xReturn;\r
1127         }\r
1128 #endif\r
1129 /*-----------------------------------------------------------*/\r
1130 \r
1131 #if configUSE_ALTERNATIVE_API == 1\r
1132         signed portBASE_TYPE MPU_xQueueAltGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking )\r
1133         {\r
1134     signed portBASE_TYPE xReturn;\r
1135         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1136 \r
1137                 xReturn = xQueueAltGenericReceive( pxQueue, pvBuffer, xTicksToWait, xJustPeeking );\r
1138                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1139                 return xReturn;\r
1140         }\r
1141 #endif\r
1142 /*-----------------------------------------------------------*/\r
1143 \r
1144 #if configQUEUE_REGISTRY_SIZE > 0\r
1145         void MPU_vQueueAddToRegistry( xQueueHandle xQueue, signed char *pcName )\r
1146         {\r
1147         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1148 \r
1149                 vQueueAddToRegistry( xQueue, pcName );\r
1150 \r
1151                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1152         }\r
1153 #endif\r
1154 /*-----------------------------------------------------------*/\r
1155 \r
1156 void MPU_vQueueDelete( xQueueHandle xQueue )\r
1157 {\r
1158 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1159 \r
1160         vQueueDelete( xQueue );\r
1161 \r
1162         portRESET_PRIVILEGE( xRunningPrivileged );\r
1163 }\r
1164 /*-----------------------------------------------------------*/\r
1165 \r
1166 void *MPU_pvPortMalloc( size_t xSize )\r
1167 {\r
1168 void *pvReturn;\r
1169 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1170 \r
1171         pvReturn = pvPortMalloc( xSize );\r
1172 \r
1173         portRESET_PRIVILEGE( xRunningPrivileged );\r
1174 \r
1175         return pvReturn;\r
1176 }\r
1177 /*-----------------------------------------------------------*/\r
1178 \r
1179 void MPU_vPortFree( void *pv )\r
1180 {\r
1181 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1182 \r
1183         vPortFree( pv );\r
1184 \r
1185         portRESET_PRIVILEGE( xRunningPrivileged );\r
1186 }\r
1187 /*-----------------------------------------------------------*/\r
1188 \r
1189 void MPU_vPortInitialiseBlocks( void )\r
1190 {\r
1191 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1192 \r
1193         vPortInitialiseBlocks();\r
1194 \r
1195         portRESET_PRIVILEGE( xRunningPrivileged );\r
1196 }\r
1197 /*-----------------------------------------------------------*/\r
1198 \r
1199 size_t MPU_xPortGetFreeHeapSize( void )\r
1200 {\r
1201 size_t xReturn;\r
1202 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1203 \r
1204         xReturn = xPortGetFreeHeapSize();\r
1205 \r
1206         portRESET_PRIVILEGE( xRunningPrivileged );\r
1207 \r
1208         return xReturn;\r
1209 }\r
1210 \r