git.sur5r.net Git - freertos/blob - FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c

   1 /*\r
   2     FreeRTOS V7.3.0 - Copyright (C) 2012 Real Time Engineers Ltd.\r
   3 \r
   4     FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME.  PLEASE VISIT \r
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   6 \r
   7     ***************************************************************************\r
   8      *                                                                       *\r
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  24     ***************************************************************************\r
  25 \r
  26 \r
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  28 \r
  29     FreeRTOS is free software; you can redistribute it and/or modify it under\r
  30     the terms of the GNU General Public License (version 2) as published by the\r
  31     Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
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  33     distribute a combined work that includes FreeRTOS without being obliged to\r
  34     provide the source code for proprietary components outside of the FreeRTOS\r
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  36     WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
  37     or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for\r
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  41     by writing to Richard Barry, contact details for whom are available on the\r
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  43 \r
  44     1 tab == 4 spaces!\r
  45     \r
  46     ***************************************************************************\r
  47      *                                                                       *\r
  48      *    Having a problem?  Start by reading the FAQ "My application does   *\r
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  54 \r
  55     \r
  56     http://www.FreeRTOS.org - Documentation, training, latest versions, license \r
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  62     Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell \r
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  66     the SafeRTOS brand: http://www.SafeRTOS.com.\r
  67 */\r
  68 \r
  69 /*-----------------------------------------------------------\r
  70  * Implementation of functions defined in portable.h for the ARM CM4F port.\r
  71  *----------------------------------------------------------*/\r
  72 \r
  73 /* Scheduler includes. */\r
  74 #include "FreeRTOS.h"\r
  75 #include "task.h"\r
  76 \r
  77 #ifndef __VFP_FP__\r
  78         #error This port can only be used when the project options are configured to enable hardware floating point support.\r
  79 #endif\r
  80 \r
  81 #ifndef configSYSTICK_CLOCK_HZ\r
  82         #define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ\r
  83         #if configUSE_TICKLESS_IDLE == 1\r
  84                 static const unsigned long ulStoppedTimerCompensation = 45UL;\r
  85         #endif\r
  86 #else /* configSYSTICK_CLOCK_HZ */\r
  87         #if configUSE_TICKLESS_IDLE == 1\r
  88                 /* Assumes the SysTick clock is slower than the CPU clock. */\r
  89                 static const unsigned long ulStoppedTimerCompensation = 45UL / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );\r
  90         #endif\r
  91 #endif  /* configSYSTICK_CLOCK_HZ */\r
  92 \r
  93 /* Constants required to manipulate the core.  Registers first... */\r
  94 #define portNVIC_SYSTICK_CTRL_REG                       ( * ( ( volatile unsigned long * ) 0xe000e010 ) )\r
  95 #define portNVIC_SYSTICK_LOAD_REG                       ( * ( ( volatile unsigned long * ) 0xe000e014 ) )\r
  96 #define portNVIC_SYSTICK_CURRENT_VALUE_REG      ( * ( ( volatile unsigned long * ) 0xe000e018 ) )\r
  97 #define portNVIC_INT_CTRL_REG                           ( * ( ( volatile unsigned long * ) 0xe000ed04 ) )\r
  98 #define portNVIC_SYSPRI2_REG                            ( * ( ( volatile unsigned long * ) 0xe000ed20 ) )\r
  99 /* ...then bits in the registers. */\r
 100 #define portNVIC_SYSTICK_CLK_BIT                        ( 1UL << 2UL )\r
 101 #define portNVIC_SYSTICK_INT_BIT                        ( 1UL << 1UL )\r
 102 #define portNVIC_SYSTICK_ENABLE_BIT                     ( 1UL << 0UL )\r
 103 #define portNVIC_SYSTICK_COUNT_FLAG_BIT         ( 1UL << 16UL )\r
 104 #define portNVIC_PENDSVSET_BIT                          ( 1UL << 28UL )\r
 105 #define portNVIC_PENDSVCLEAR_BIT                        ( 1UL << 27UL )\r
 106 #define portNVIC_PEND_SYSTICK_CLEAR_BIT         ( 1UL << 25UL )\r
 107 \r
 108 #define portNVIC_PENDSV_PRI                             ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )\r
 109 #define portNVIC_SYSTICK_PRI                    ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )\r
 110 \r
 111 /* Constants required to manipulate the VFP. */\r
 112 #define portFPCCR                                       ( ( volatile unsigned long * ) 0xe000ef34 ) /* Floating point context control register. */\r
 113 #define portASPEN_AND_LSPEN_BITS        ( 0x3UL << 30UL )\r
 114 \r
 115 /* Constants required to set up the initial stack. */\r
 116 #define portINITIAL_XPSR                        ( 0x01000000 )\r
 117 #define portINITIAL_EXEC_RETURN         ( 0xfffffffd )\r
 118 \r
 119 /* The priority used by the kernel is assigned to a variable to make access\r
 120 from inline assembler easier. */\r
 121 const unsigned long ulKernelPriority = configKERNEL_INTERRUPT_PRIORITY;\r
 122 \r
 123 /* Each task maintains its own interrupt status in the critical nesting\r
 124 variable. */\r
 125 static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;\r
 126 \r
 127 /*\r
 128  * Setup the timer to generate the tick interrupts.\r
 129  */\r
 130 static void prvSetupTimerInterrupt( void );\r
 131 \r
 132 /*\r
 133  * Exception handlers.\r
 134  */\r
 135 void xPortPendSVHandler( void ) __attribute__ (( naked ));\r
 136 void xPortSysTickHandler( void );\r
 137 void vPortSVCHandler( void ) __attribute__ (( naked ));\r
 138 \r
 139 /*\r
 140  * Start first task is a separate function so it can be tested in isolation.\r
 141  */\r
 142 static void prvPortStartFirstTask( void ) __attribute__ (( naked ));\r
 143 \r
 144 /*\r
 145  * Function to enable the VFP.\r
 146  */\r
 147  static void vPortEnableVFP( void ) __attribute__ (( naked ));\r
 148 \r
 149 /*-----------------------------------------------------------*/\r
 150 \r
 151 /*\r
 152  * The number of SysTick increments that make up one tick period.\r
 153  */\r
 154 static unsigned long ulTimerReloadValueForOneTick = 0;\r
 155 \r
 156 /*\r
 157  * The maximum number of tick periods that can be suppressed is limited by the\r
 158  * 24 bit resolution of the SysTick timer.\r
 159  */\r
 160 #if configUSE_TICKLESS_IDLE == 1\r
 161         static unsigned long xMaximumPossibleSuppressedTicks = 0;\r
 162 #endif /* configUSE_TICKLESS_IDLE */\r
 163 \r
 164 \r
 165 /*-----------------------------------------------------------*/\r
 166 \r
 167 /*\r
 168  * See header file for description.\r
 169  */\r
 170 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
 171 {\r
 172         /* Simulate the stack frame as it would be created by a context switch\r
 173         interrupt. */\r
 174 \r
 175         /* Offset added to account for the way the MCU uses the stack on entry/exit\r
 176         of interrupts, and to ensure alignment. */\r
 177         pxTopOfStack--;\r
 178 \r
 179         *pxTopOfStack = portINITIAL_XPSR;       /* xPSR */\r
 180         pxTopOfStack--;\r
 181         *pxTopOfStack = ( portSTACK_TYPE ) pxCode;      /* PC */\r
 182         pxTopOfStack--;\r
 183         *pxTopOfStack = 0;      /* LR */\r
 184 \r
 185         /* Save code space by skipping register initialisation. */\r
 186         pxTopOfStack -= 5;      /* R12, R3, R2 and R1. */\r
 187         *pxTopOfStack = ( portSTACK_TYPE ) pvParameters;        /* R0 */\r
 188 \r
 189         /* A save method is being used that requires each task to maintain its\r
 190         own exec return value. */\r
 191         pxTopOfStack--;\r
 192         *pxTopOfStack = portINITIAL_EXEC_RETURN;\r
 193 \r
 194         pxTopOfStack -= 8;      /* R11, R10, R9, R8, R7, R6, R5 and R4. */\r
 195 \r
 196         return pxTopOfStack;\r
 197 }\r
 198 /*-----------------------------------------------------------*/\r
 199 \r
 200 void vPortSVCHandler( void )\r
 201 {\r
 202         __asm volatile (\r
 203                                         "       ldr     r3, pxCurrentTCBConst2          \n" /* Restore the context. */\r
 204                                         "       ldr r1, [r3]                                    \n" /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */\r
 205                                         "       ldr r0, [r1]                                    \n" /* The first item in pxCurrentTCB is the task top of stack. */\r
 206                                         "       ldmia r0!, {r4-r11, r14}                \n" /* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */\r
 207                                         "       msr psp, r0                                             \n" /* Restore the task stack pointer. */\r
 208                                         "       mov r0, #0                                              \n"\r
 209                                         "       msr     basepri, r0                                     \n"\r
 210                                         "       bx r14                                                  \n"\r
 211                                         "                                                                       \n"\r
 212                                         "       .align 2                                                \n"\r
 213                                         "pxCurrentTCBConst2: .word pxCurrentTCB                         \n"\r
 214                                 );\r
 215 }\r
 216 /*-----------------------------------------------------------*/\r
 217 \r
 218 static void prvPortStartFirstTask( void )\r
 219 {\r
 220         __asm volatile(\r
 221                                         " ldr r0, =0xE000ED08   \n" /* Use the NVIC offset register to locate the stack. */\r
 222                                         " ldr r0, [r0]                  \n"\r
 223                                         " ldr r0, [r0]                  \n"\r
 224                                         " msr msp, r0                   \n" /* Set the msp back to the start of the stack. */\r
 225                                         " cpsie i                               \n" /* Globally enable interrupts. */\r
 226                                         " svc 0                                 \n" /* System call to start first task. */\r
 227                                         " nop                                   \n"\r
 228                                 );\r
 229 }\r
 230 /*-----------------------------------------------------------*/\r
 231 \r
 232 /*\r
 233  * See header file for description.\r
 234  */\r
 235 portBASE_TYPE xPortStartScheduler( void )\r
 236 {\r
 237         /* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.\r
 238         See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */\r
 239         configASSERT( configMAX_SYSCALL_INTERRUPT_PRIORITY );\r
 240 \r
 241         /* Make PendSV, CallSV and SysTick the same priroity as the kernel. */\r
 242         portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;\r
 243         portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;\r
 244 \r
 245         /* Start the timer that generates the tick ISR.  Interrupts are disabled\r
 246         here already. */\r
 247         prvSetupTimerInterrupt();\r
 248 \r
 249         /* Initialise the critical nesting count ready for the first task. */\r
 250         uxCriticalNesting = 0;\r
 251 \r
 252         /* Ensure the VFP is enabled - it should be anyway. */\r
 253         vPortEnableVFP();\r
 254 \r
 255         /* Lazy save always. */\r
 256         *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;\r
 257 \r
 258         /* Start the first task. */\r
 259         prvPortStartFirstTask();\r
 260 \r
 261         /* Should not get here! */\r
 262         return 0;\r
 263 }\r
 264 /*-----------------------------------------------------------*/\r
 265 \r
 266 void vPortEndScheduler( void )\r
 267 {\r
 268         /* It is unlikely that the CM4F port will require this function as there\r
 269         is nothing to return to.  */\r
 270 }\r
 271 /*-----------------------------------------------------------*/\r
 272 \r
 273 void vPortYieldFromISR( void )\r
 274 {\r
 275         /* Set a PendSV to request a context switch. */\r
 276         portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;\r
 277 }\r
 278 /*-----------------------------------------------------------*/\r
 279 \r
 280 void vPortEnterCritical( void )\r
 281 {\r
 282         portDISABLE_INTERRUPTS();\r
 283         uxCriticalNesting++;\r
 284 }\r
 285 /*-----------------------------------------------------------*/\r
 286 \r
 287 void vPortExitCritical( void )\r
 288 {\r
 289         uxCriticalNesting--;\r
 290         if( uxCriticalNesting == 0 )\r
 291         {\r
 292                 portENABLE_INTERRUPTS();\r
 293         }\r
 294 }\r
 295 /*-----------------------------------------------------------*/\r
 296 \r
 297 __attribute__(( naked )) unsigned long ulPortSetInterruptMask( void )\r
 298 {\r
 299         __asm volatile                                                                                                          \\r
 300         (                                                                                                                                       \\r
 301                 "       mrs r0, basepri                                                                                 \n" \\r
 302                 "       mov r1, %0                                                                                              \n"     \\r
 303                 "       msr basepri, r1                                                                                 \n" \\r
 304                 "       bx lr                                                                                                   \n" \\r
 305                 :: "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "r0", "r1"    \\r
 306         );\r
 307 \r
 308         /* This return will not be reached but is necessary to prevent compiler\r
 309         warnings. */\r
 310         return 0;\r
 311 }\r
 312 /*-----------------------------------------------------------*/\r
 313 \r
 314 __attribute__(( naked )) void vPortClearInterruptMask( unsigned long ulNewMaskValue )\r
 315 {\r
 316         __asm volatile                                                                                                  \\r
 317         (                                                                                                                               \\r
 318                 "       msr basepri, r0                                                                         \n"     \\r
 319                 "       bx lr                                                                                           \n" \\r
 320                 :::"r0"                                                                                                         \\r
 321         );\r
 322 }\r
 323 /*-----------------------------------------------------------*/\r
 324 \r
 325 void xPortPendSVHandler( void )\r
 326 {\r
 327         /* This is a naked function. */\r
 328 \r
 329         __asm volatile\r
 330         (\r
 331         "       mrs r0, psp                                                     \n"\r
 332         "                                                                               \n"\r
 333         "       ldr     r3, pxCurrentTCBConst                           \n" /* Get the location of the current TCB. */\r
 334         "       ldr     r2, [r3]                                                \n"\r
 335         "                                                                               \n"\r
 336         "       tst r14, #0x10                                          \n" /* Is the task using the FPU context?  If so, push high vfp registers. */\r
 337         "       it eq                                                           \n"\r
 338         "       vstmdbeq r0!, {s16-s31}                         \n"\r
 339         "                                                                               \n"\r
 340         "       stmdb r0!, {r4-r11, r14}                        \n" /* Save the core registers. */\r
 341         "                                                                               \n"\r
 342         "       str r0, [r2]                                            \n" /* Save the new top of stack into the first member of the TCB. */\r
 343         "                                                                               \n"\r
 344         "       stmdb sp!, {r3, r14}                            \n"\r
 345         "       mov r0, %0                                                      \n"\r
 346         "       msr basepri, r0                                         \n"\r
 347         "       bl vTaskSwitchContext                           \n"\r
 348         "       mov r0, #0                                                      \n"\r
 349         "       msr basepri, r0                                         \n"\r
 350         "       ldmia sp!, {r3, r14}                            \n"\r
 351         "                                                                               \n"\r
 352         "       ldr r1, [r3]                                            \n" /* The first item in pxCurrentTCB is the task top of stack. */\r
 353         "       ldr r0, [r1]                                            \n"\r
 354         "                                                                               \n"\r
 355         "       ldmia r0!, {r4-r11, r14}                        \n" /* Pop the core registers. */\r
 356         "                                                                               \n"\r
 357         "       tst r14, #0x10                                          \n" /* Is the task using the FPU context?  If so, pop the high vfp registers too. */\r
 358         "       it eq                                                           \n"\r
 359         "       vldmiaeq r0!, {s16-s31}                         \n"\r
 360         "                                                                               \n"\r
 361         "       msr psp, r0                                                     \n"\r
 362         "       bx r14                                                          \n"\r
 363         "                                                                               \n"\r
 364         "       .align 2                                                        \n"\r
 365         "pxCurrentTCBConst: .word pxCurrentTCB  \n"\r
 366         ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)\r
 367         );\r
 368 }\r
 369 /*-----------------------------------------------------------*/\r
 370 \r
 371 void xPortSysTickHandler( void )\r
 372 {\r
 373         /* If using preemption, also force a context switch. */\r
 374         #if configUSE_PREEMPTION == 1\r
 375                 portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;\r
 376         #endif\r
 377 \r
 378         #if configUSE_TICKLESS_IDLE == 1\r
 379                 portNVIC_SYSTICK_LOAD_REG = ulTimerReloadValueForOneTick;\r
 380         #endif\r
 381 \r
 382         ( void ) portSET_INTERRUPT_MASK_FROM_ISR();\r
 383         {\r
 384                 vTaskIncrementTick();\r
 385         }\r
 386         portCLEAR_INTERRUPT_MASK_FROM_ISR( 0 );\r
 387 }\r
 388 /*-----------------------------------------------------------*/\r
 389 \r
 390 #if configUSE_TICKLESS_IDLE == 1\r
 391 \r
 392         __attribute__((weak)) void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime )\r
 393         {\r
 394         unsigned long ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickIncrements;\r
 395 \r
 396                 /* Make sure the SysTick reload value does not overflow the counter. */\r
 397                 if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )\r
 398                 {\r
 399                         xExpectedIdleTime = xMaximumPossibleSuppressedTicks;\r
 400                 }\r
 401 \r
 402                 /* Calculate the reload value required to wait xExpectedIdleTime\r
 403                 tick periods.  -1 is used because this code will execute part way\r
 404                 through one of the tick periods, and the fraction of a tick period is\r
 405                 accounted for later. */\r
 406                 ulReloadValue = ( ulTimerReloadValueForOneTick * ( xExpectedIdleTime - 1UL ) );\r
 407                 if( ulReloadValue > ulStoppedTimerCompensation )\r
 408                 {\r
 409                         ulReloadValue -= ulStoppedTimerCompensation;\r
 410                 }\r
 411 \r
 412                 /* Stop the SysTick momentarily.  The time the SysTick is stopped for\r
 413                 is accounted for as best it can be, but using the tickless mode will\r
 414                 inevitably result in some tiny drift of the time maintained by the\r
 415                 kernel with respect to calendar time. */\r
 416                 portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT;\r
 417 \r
 418                 /* If a context switch is pending then abandon the low power entry as\r
 419                 the context switch might have been pended by an external interrupt that\r
 420                 requires processing. */\r
 421                 if( ( portNVIC_INT_CTRL_REG & portNVIC_PENDSVSET_BIT ) != 0 )\r
 422                 {\r
 423                         /* Restart SysTick. */\r
 424                         portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;\r
 425                 }\r
 426                 else\r
 427                 {\r
 428                         /* Adjust the reload value to take into account that the current\r
 429                         time slice is already partially complete. */\r
 430                         ulReloadValue += ( portNVIC_SYSTICK_LOAD_REG - ( portNVIC_SYSTICK_LOAD_REG - portNVIC_SYSTICK_CURRENT_VALUE_REG ) );\r
 431                         portNVIC_SYSTICK_LOAD_REG = ulReloadValue;\r
 432 \r
 433                         /* Clear the SysTick count flag and set the count value back to\r
 434                         zero. */\r
 435                         portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;\r
 436 \r
 437                         /* Restart SysTick. */\r
 438                         portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;\r
 439 \r
 440                         /* Sleep until something happens. */\r
 441                         configPRE_SLEEP_PROCESSING();\r
 442                         __asm volatile( "wfi" );\r
 443                         configPOST_SLEEP_PROCESSING();\r
 444 \r
 445                         /* Stop SysTick.  Again, the time the SysTick is stopped for is\r
 446                         accounted for as best it can be, but using the tickless mode will\r
 447                         inevitably result in some tiny drift of the time maintained by the\r
 448                         kernel with respect to calendar time. */\r
 449                         portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT;\r
 450 \r
 451                         if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )\r
 452                         {\r
 453                                 /* The tick interrupt has already executed, and the SysTick\r
 454                                 count reloaded with the portNVIC_SYSTICK_LOAD_REG value.\r
 455                                 Reset the portNVIC_SYSTICK_LOAD_REG with whatever remains of\r
 456                                 this tick period. */\r
 457                                 portNVIC_SYSTICK_LOAD_REG = ulTimerReloadValueForOneTick - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );\r
 458 \r
 459                                 /* The tick interrupt handler will already have pended the tick\r
 460                                 processing in the kernel.  As the pending tick will be\r
 461                                 processed as soon as this function exits, the tick value\r
 462                                 maintained by the tick is stepped forward by one less than the\r
 463                                 time spent waiting. */\r
 464                                 ulCompleteTickPeriods = xExpectedIdleTime - 1UL;\r
 465                         }\r
 466                         else\r
 467                         {\r
 468                                 /* Something other than the tick interrupt ended the sleep.\r
 469                                 Work out how long the sleep lasted. */\r
 470                                 ulCompletedSysTickIncrements = ( xExpectedIdleTime * ulTimerReloadValueForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;\r
 471 \r
 472                                 /* How many complete tick periods passed while the processor\r
 473                                 was waiting? */\r
 474                                 ulCompleteTickPeriods = ulCompletedSysTickIncrements / ulTimerReloadValueForOneTick;\r
 475 \r
 476                                 /* The reload value is set to whatever fraction of a single tick\r
 477                                 period remains. */\r
 478                                 portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1 ) * ulTimerReloadValueForOneTick ) - ulCompletedSysTickIncrements;\r
 479                         }\r
 480 \r
 481                         /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG\r
 482                         again, then set portNVIC_SYSTICK_LOAD_REG back to its standard\r
 483                         value. */\r
 484                         portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;\r
 485                         portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;\r
 486 \r
 487                         vTaskStepTick( ulCompleteTickPeriods );\r
 488                 }\r
 489         }\r
 490 \r
 491 #endif /* #if configUSE_TICKLESS_IDLE */\r
 492 /*-----------------------------------------------------------*/\r
 493 \r
 494 /*\r
 495  * Setup the systick timer to generate the tick interrupts at the required\r
 496  * frequency.\r
 497  */\r
 498 void prvSetupTimerInterrupt( void )\r
 499 {\r
 500         /* Calculate the constants required to configure the tick interrupt. */\r
 501         ulTimerReloadValueForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;\r
 502         #if configUSE_TICKLESS_IDLE == 1\r
 503                 xMaximumPossibleSuppressedTicks = 0xffffffUL / ( ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL );\r
 504         #endif /* configUSE_TICKLESS_IDLE */\r
 505 \r
 506 \r
 507         /* Configure SysTick to interrupt at the requested rate. */\r
 508         portNVIC_SYSTICK_LOAD_REG = ulTimerReloadValueForOneTick;\r
 509         portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;\r
 510 }\r
 511 /*-----------------------------------------------------------*/\r
 512 \r
 513 /* This is a naked function. */\r
 514 static void vPortEnableVFP( void )\r
 515 {\r
 516         __asm volatile\r
 517         (\r
 518                 "       ldr.w r0, =0xE000ED88           \n" /* The FPU enable bits are in the CPACR. */\r
 519                 "       ldr r1, [r0]                            \n"\r
 520                 "                                                               \n"\r
 521                 "       orr r1, r1, #( 0xf << 20 )      \n" /* Enable CP10 and CP11 coprocessors, then save back. */\r
 522                 "       str r1, [r0]                            \n"\r
 523                 "       bx r14                                          "\r
 524         );\r
 525 }\r
 526 \r