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Update version number ready for the V8.2.3 release.
[freertos] / FreeRTOS / Source / portable / GCC / ARM_CM4F / portmacro.h
1 /*\r
2     FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.\r
3     All rights reserved\r
4 \r
5     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
6 \r
7     This file is part of the FreeRTOS distribution.\r
8 \r
9     FreeRTOS is free software; you can redistribute it and/or modify it under\r
10     the terms of the GNU General Public License (version 2) as published by the\r
11     Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
12 \r
13     ***************************************************************************\r
14     >>!   NOTE: The modification to the GPL is included to allow you to     !<<\r
15     >>!   distribute a combined work that includes FreeRTOS without being   !<<\r
16     >>!   obliged to provide the source code for proprietary components     !<<\r
17     >>!   outside of the FreeRTOS kernel.                                   !<<\r
18     ***************************************************************************\r
19 \r
20     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
21     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
22     FOR A PARTICULAR PURPOSE.  Full license text is available on the following\r
23     link: http://www.freertos.org/a00114.html\r
24 \r
25     ***************************************************************************\r
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35      *    http://www.FreeRTOS.org/Documentation                              *\r
36      *                                                                       *\r
37     ***************************************************************************\r
38 \r
39     http://www.FreeRTOS.org/FAQHelp.html - Having a problem?  Start by reading\r
40     the FAQ page "My application does not run, what could be wrong?".  Have you\r
41     defined configASSERT()?\r
42 \r
43     http://www.FreeRTOS.org/support - In return for receiving this top quality\r
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58 \r
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62 \r
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65     mission critical applications that require provable dependability.\r
66 \r
67     1 tab == 4 spaces!\r
68 */\r
69 \r
70 \r
71 #ifndef PORTMACRO_H\r
72 #define PORTMACRO_H\r
73 \r
74 #ifdef __cplusplus\r
75 extern "C" {\r
76 #endif\r
77 \r
78 /*-----------------------------------------------------------\r
79  * Port specific definitions.\r
80  *\r
81  * The settings in this file configure FreeRTOS correctly for the\r
82  * given hardware and compiler.\r
83  *\r
84  * These settings should not be altered.\r
85  *-----------------------------------------------------------\r
86  */\r
87 \r
88 /* Type definitions. */\r
89 #define portCHAR                char\r
90 #define portFLOAT               float\r
91 #define portDOUBLE              double\r
92 #define portLONG                long\r
93 #define portSHORT               short\r
94 #define portSTACK_TYPE  uint32_t\r
95 #define portBASE_TYPE   long\r
96 \r
97 typedef portSTACK_TYPE StackType_t;\r
98 typedef long BaseType_t;\r
99 typedef unsigned long UBaseType_t;\r
100 \r
101 #if( configUSE_16_BIT_TICKS == 1 )\r
102         typedef uint16_t TickType_t;\r
103         #define portMAX_DELAY ( TickType_t ) 0xffff\r
104 #else\r
105         typedef uint32_t TickType_t;\r
106         #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
107 \r
108         /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do\r
109         not need to be guarded with a critical section. */\r
110         #define portTICK_TYPE_IS_ATOMIC 1\r
111 #endif\r
112 /*-----------------------------------------------------------*/\r
113 \r
114 /* Architecture specifics. */\r
115 #define portSTACK_GROWTH                        ( -1 )\r
116 #define portTICK_PERIOD_MS                      ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
117 #define portBYTE_ALIGNMENT                      8\r
118 /*-----------------------------------------------------------*/\r
119 \r
120 /* Scheduler utilities. */\r
121 #define portYIELD()                                                                                                                     \\r
122 {                                                                                                                                                               \\r
123         /* Set a PendSV to request a context switch. */                                                         \\r
124         portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;                                                         \\r
125                                                                                                                                                                 \\r
126         /* Barriers are normally not required but do ensure the code is completely      \\r
127         within the specified behaviour for the architecture. */                                         \\r
128         __asm volatile( "dsb" );                                                                                                        \\r
129         __asm volatile( "isb" );                                                                                                        \\r
130 }\r
131 \r
132 #define portNVIC_INT_CTRL_REG           ( * ( ( volatile uint32_t * ) 0xe000ed04 ) )\r
133 #define portNVIC_PENDSVSET_BIT          ( 1UL << 28UL )\r
134 #define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired != pdFALSE ) portYIELD()\r
135 #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )\r
136 /*-----------------------------------------------------------*/\r
137 \r
138 /* Critical section management. */\r
139 extern void vPortEnterCritical( void );\r
140 extern void vPortExitCritical( void );\r
141 #define portSET_INTERRUPT_MASK_FROM_ISR()               ulPortRaiseBASEPRI()\r
142 #define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)    vPortSetBASEPRI(x)\r
143 #define portDISABLE_INTERRUPTS()                                vPortRaiseBASEPRI()\r
144 #define portENABLE_INTERRUPTS()                                 vPortSetBASEPRI(0)\r
145 #define portENTER_CRITICAL()                                    vPortEnterCritical()\r
146 #define portEXIT_CRITICAL()                                             vPortExitCritical()\r
147 \r
148 /*-----------------------------------------------------------*/\r
149 \r
150 /* Task function macros as described on the FreeRTOS.org WEB site.  These are\r
151 not necessary for to use this port.  They are defined so the common demo files\r
152 (which build with all the ports) will build. */\r
153 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
154 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
155 /*-----------------------------------------------------------*/\r
156 \r
157 /* Tickless idle/low power functionality. */\r
158 #ifndef portSUPPRESS_TICKS_AND_SLEEP\r
159         extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );\r
160         #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )\r
161 #endif\r
162 /*-----------------------------------------------------------*/\r
163 \r
164 /* Architecture specific optimisations. */\r
165 #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION\r
166         #define configUSE_PORT_OPTIMISED_TASK_SELECTION 1\r
167 #endif\r
168 \r
169 #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1\r
170 \r
171         /* Generic helper function. */\r
172         __attribute__( ( always_inline ) ) static inline uint8_t ucPortCountLeadingZeros( uint32_t ulBitmap )\r
173         {\r
174         uint8_t ucReturn;\r
175 \r
176                 __asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) );\r
177                 return ucReturn;\r
178         }\r
179 \r
180         /* Check the configuration. */\r
181         #if( configMAX_PRIORITIES > 32 )\r
182                 #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32.  It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.\r
183         #endif\r
184 \r
185         /* Store/clear the ready priorities in a bit map. */\r
186         #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )\r
187         #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )\r
188 \r
189         /*-----------------------------------------------------------*/\r
190 \r
191         #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - ucPortCountLeadingZeros( ( uxReadyPriorities ) ) )\r
192 \r
193 #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */\r
194 \r
195 /*-----------------------------------------------------------*/\r
196 \r
197 #ifdef configASSERT\r
198         void vPortValidateInterruptPriority( void );\r
199         #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID()      vPortValidateInterruptPriority()\r
200 #endif\r
201 \r
202 /* portNOP() is not required by this port. */\r
203 #define portNOP()\r
204 \r
205 #ifndef portFORCE_INLINE\r
206         #define portFORCE_INLINE inline __attribute__(( always_inline))\r
207 #endif\r
208 \r
209 /*-----------------------------------------------------------*/\r
210 \r
211 portFORCE_INLINE static void vPortRaiseBASEPRI( void )\r
212 {\r
213 uint32_t ulNewBASEPRI;\r
214 \r
215         __asm volatile\r
216         (\r
217                 "       mov %0, %1                                                                                              \n"     \\r
218                 "       msr basepri, %0                                                                                 \n" \\r
219                 "       isb                                                                                                             \n" \\r
220                 "       dsb                                                                                                             \n" \\r
221                 :"=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )\r
222         );\r
223 }\r
224 \r
225 /*-----------------------------------------------------------*/\r
226 \r
227 portFORCE_INLINE static uint32_t ulPortRaiseBASEPRI( void )\r
228 {\r
229 uint32_t ulOriginalBASEPRI, ulNewBASEPRI;\r
230 \r
231         __asm volatile\r
232         (\r
233                 "       mrs %0, basepri                                                                                 \n" \\r
234                 "       mov %1, %2                                                                                              \n"     \\r
235                 "       msr basepri, %1                                                                                 \n" \\r
236                 "       isb                                                                                                             \n" \\r
237                 "       dsb                                                                                                             \n" \\r
238                 :"=r" (ulOriginalBASEPRI), "=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )\r
239         );\r
240 \r
241         /* This return will not be reached but is necessary to prevent compiler\r
242         warnings. */\r
243         return ulOriginalBASEPRI;\r
244 }\r
245 /*-----------------------------------------------------------*/\r
246 \r
247 portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )\r
248 {\r
249         __asm volatile\r
250         (\r
251                 "       msr basepri, %0 " :: "r" ( ulNewMaskValue )\r
252         );\r
253 }\r
254 /*-----------------------------------------------------------*/\r
255 \r
256 \r
257 #ifdef __cplusplus\r
258 }\r
259 #endif\r
260 \r
261 #endif /* PORTMACRO_H */\r
262 \r