1 /*This file is prepared for Doxygen automatic documentation generation.*/
\r
2 /*! \file *********************************************************************
\r
4 * \brief Exception and interrupt vectors.
\r
6 * This file maps all events supported by an AVR32UC.
\r
8 * - Compiler: GNU GCC for AVR32
\r
9 * - Supported devices: All AVR32UC devices with an INTC module can be used.
\r
12 * \author Atmel Corporation: http://www.atmel.com \n
\r
13 * Support and FAQ: http://support.atmel.no/
\r
15 ******************************************************************************/
\r
17 /* Copyright (c) 2007, Atmel Corporation All rights reserved.
\r
19 * Redistribution and use in source and binary forms, with or without
\r
20 * modification, are permitted provided that the following conditions are met:
\r
22 * 1. Redistributions of source code must retain the above copyright notice,
\r
23 * this list of conditions and the following disclaimer.
\r
25 * 2. Redistributions in binary form must reproduce the above copyright notice,
\r
26 * this list of conditions and the following disclaimer in the documentation
\r
27 * and/or other materials provided with the distribution.
\r
29 * 3. The name of ATMEL may not be used to endorse or promote products derived
\r
30 * from this software without specific prior written permission.
\r
32 * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
\r
33 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
\r
34 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
\r
35 * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
\r
36 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
\r
37 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
\r
38 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
\r
39 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
\r
40 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
\r
41 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
\r
45 #include <avr32/io.h>
\r
53 .section .exception, "ax", @progbits
\r
56 // Start of Exception Vector Table.
\r
58 // EVBA must be aligned with a power of two strictly greater than the EVBA-
\r
59 // relative offset of the last vector.
\r
64 .type _evba, @function
\r
68 // Unrecoverable Exception.
\r
69 _handle_Unrecoverable_Exception:
\r
73 // TLB Multiple Hit: UNUSED IN AVR32UC.
\r
74 _handle_TLB_Multiple_Hit:
\r
78 // Bus Error Data Fetch.
\r
79 _handle_Bus_Error_Data_Fetch:
\r
83 // Bus Error Instruction Fetch.
\r
84 _handle_Bus_Error_Instruction_Fetch:
\r
93 // Instruction Address.
\r
94 _handle_Instruction_Address:
\r
99 _handle_ITLB_Protection:
\r
104 _handle_Breakpoint:
\r
109 _handle_Illegal_Opcode:
\r
113 // Unimplemented Instruction.
\r
114 _handle_Unimplemented_Instruction:
\r
118 // Privilege Violation.
\r
119 _handle_Privilege_Violation:
\r
123 // Floating-Point: UNUSED IN AVR32UC.
\r
124 _handle_Floating_Point:
\r
128 // Coprocessor Absent: UNUSED IN AVR32UC.
\r
129 _handle_Coprocessor_Absent:
\r
133 // Data Address (Read).
\r
134 _handle_Data_Address_Read:
\r
138 // Data Address (Write).
\r
139 _handle_Data_Address_Write:
\r
143 // DTLB Protection (Read).
\r
144 _handle_DTLB_Protection_Read:
\r
148 // DTLB Protection (Write).
\r
149 _handle_DTLB_Protection_Write:
\r
153 // DTLB Modified: UNUSED IN AVR32UC.
\r
154 _handle_DTLB_Modified:
\r
158 // ITLB Miss: UNUSED IN AVR32UC.
\r
163 // DTLB Miss (Read): UNUSED IN AVR32UC.
\r
164 _handle_DTLB_Miss_Read:
\r
168 // DTLB Miss (Write): UNUSED IN AVR32UC.
\r
169 _handle_DTLB_Miss_Write:
\r
173 // Supervisor Call.
\r
174 _handle_Supervisor_Call:
\r
175 lda.w pc, SCALLYield
\r
178 // Interrupt support.
\r
179 // The interrupt controller must provide the offset address relative to EVBA.
\r
181 // All interrupts call a C function named _get_interrupt_handler.
\r
182 // This function will read group and interrupt line number to then return in
\r
183 // R12 a pointer to a user-provided interrupt handler.
\r
188 // R8-R12, LR, PC and SR are automatically pushed onto the system stack by the
\r
189 // CPU upon interrupt entry.
\r
190 #if 1 // B1832: interrupt stack changed to exception stack if exception is detected.
\r
192 bfextu r12, r12, AVR32_SR_M0_OFFSET, AVR32_SR_M0_SIZE + AVR32_SR_M1_SIZE + AVR32_SR_M2_SIZE
\r
195 lddsp r12, sp[0 * 4]
\r
196 stdsp sp[6 * 4], r12
\r
197 lddsp r12, sp[1 * 4]
\r
198 stdsp sp[7 * 4], r12
\r
199 lddsp r12, sp[3 * 4]
\r
204 mov r12, 0 // Pass the int_lev parameter to the _get_interrupt_handler function.
\r
205 call _get_interrupt_handler
\r
206 cp.w r12, 0 // Get the pointer to the interrupt handler returned by the function.
\r
207 movne pc, r12 // If this was not a spurious interrupt (R12 != NULL), jump to the handler.
\r
208 rete // If this was a spurious interrupt (R12 == NULL), return from event handler.
\r
211 // R8-R12, LR, PC and SR are automatically pushed onto the system stack by the
\r
212 // CPU upon interrupt entry.
\r
213 #if 1 // B1832: interrupt stack changed to exception stack if exception is detected.
\r
215 bfextu r12, r12, AVR32_SR_M0_OFFSET, AVR32_SR_M0_SIZE + AVR32_SR_M1_SIZE + AVR32_SR_M2_SIZE
\r
218 lddsp r12, sp[0 * 4]
\r
219 stdsp sp[6 * 4], r12
\r
220 lddsp r12, sp[1 * 4]
\r
221 stdsp sp[7 * 4], r12
\r
222 lddsp r12, sp[3 * 4]
\r
227 mov r12, 1 // Pass the int_lev parameter to the _get_interrupt_handler function.
\r
228 call _get_interrupt_handler
\r
229 cp.w r12, 0 // Get the pointer to the interrupt handler returned by the function.
\r
230 movne pc, r12 // If this was not a spurious interrupt (R12 != NULL), jump to the handler.
\r
231 rete // If this was a spurious interrupt (R12 == NULL), return from event handler.
\r
234 // R8-R12, LR, PC and SR are automatically pushed onto the system stack by the
\r
235 // CPU upon interrupt entry.
\r
236 #if 1 // B1832: interrupt stack changed to exception stack if exception is detected.
\r
238 bfextu r12, r12, AVR32_SR_M0_OFFSET, AVR32_SR_M0_SIZE + AVR32_SR_M1_SIZE + AVR32_SR_M2_SIZE
\r
241 lddsp r12, sp[0 * 4]
\r
242 stdsp sp[6 * 4], r12
\r
243 lddsp r12, sp[1 * 4]
\r
244 stdsp sp[7 * 4], r12
\r
245 lddsp r12, sp[3 * 4]
\r
250 mov r12, 2 // Pass the int_lev parameter to the _get_interrupt_handler function.
\r
251 call _get_interrupt_handler
\r
252 cp.w r12, 0 // Get the pointer to the interrupt handler returned by the function.
\r
253 movne pc, r12 // If this was not a spurious interrupt (R12 != NULL), jump to the handler.
\r
254 rete // If this was a spurious interrupt (R12 == NULL), return from event handler.
\r
257 // R8-R12, LR, PC and SR are automatically pushed onto the system stack by the
\r
258 // CPU upon interrupt entry.
\r
259 #if 1 // B1832: interrupt stack changed to exception stack if exception is detected.
\r
261 bfextu r12, r12, AVR32_SR_M0_OFFSET, AVR32_SR_M0_SIZE + AVR32_SR_M1_SIZE + AVR32_SR_M2_SIZE
\r
264 lddsp r12, sp[0 * 4]
\r
265 stdsp sp[6 * 4], r12
\r
266 lddsp r12, sp[1 * 4]
\r
267 stdsp sp[7 * 4], r12
\r
268 lddsp r12, sp[3 * 4]
\r
273 mov r12, 3 // Pass the int_lev parameter to the _get_interrupt_handler function.
\r
274 call _get_interrupt_handler
\r
275 cp.w r12, 0 // Get the pointer to the interrupt handler returned by the function.
\r
276 movne pc, r12 // If this was not a spurious interrupt (R12 != NULL), jump to the handler.
\r
277 rete // If this was a spurious interrupt (R12 == NULL), return from event handler.
\r
280 // Constant data area.
\r
284 // Values to store in the interrupt priority registers for the various interrupt priority levels.
\r
285 // The interrupt priority registers contain the interrupt priority level and
\r
286 // the EVBA-relative interrupt vector offset.
\r
288 .type ipr_val, @object
\r
290 .word (INT0 << AVR32_INTC_IPR0_INTLEV_OFFSET) | (_int0 - _evba),\
\r
291 (INT1 << AVR32_INTC_IPR0_INTLEV_OFFSET) | (_int1 - _evba),\
\r
292 (INT2 << AVR32_INTC_IPR0_INTLEV_OFFSET) | (_int2 - _evba),\
\r
293 (INT3 << AVR32_INTC_IPR0_INTLEV_OFFSET) | (_int3 - _evba)
\r