1 /*This file has been prepared for Doxygen automatic documentation generation.*/
\r
2 /*! \file *********************************************************************
\r
4 * \brief FreeRTOS port source for AVR32 UC3.
\r
6 * - Compiler: GNU GCC for AVR32
\r
7 * - Supported devices: All AVR32 devices can be used.
\r
10 * \author Atmel Corporation: http://www.atmel.com \n
\r
11 * Support and FAQ: http://support.atmel.no/
\r
13 *****************************************************************************/
\r
16 * FreeRTOS Kernel V10.0.0
\r
17 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
\r
19 * Permission is hereby granted, free of charge, to any person obtaining a copy of
\r
20 * this software and associated documentation files (the "Software"), to deal in
\r
21 * the Software without restriction, including without limitation the rights to
\r
22 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
\r
23 * the Software, and to permit persons to whom the Software is furnished to do so,
\r
24 * subject to the following conditions:
\r
26 * The above copyright notice and this permission notice shall be included in all
\r
27 * copies or substantial portions of the Software. If you wish to use our Amazon
\r
28 * FreeRTOS name, please do so in a fair use way that does not cause confusion.
\r
30 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
\r
31 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
\r
32 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
\r
33 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
\r
34 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
\r
35 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
\r
37 * http://www.FreeRTOS.org
\r
38 * http://aws.amazon.com/freertos
\r
40 * 1 tab == 4 spaces!
\r
44 /* Standard includes. */
\r
45 #include <sys/cpu.h>
\r
46 #include <sys/usart.h>
\r
49 /* Scheduler includes. */
\r
50 #include "FreeRTOS.h"
\r
53 /* AVR32 UC3 includes. */
\r
54 #include <avr32/io.h>
\r
56 #if( configTICK_USE_TC==1 )
\r
61 /* Constants required to setup the task context. */
\r
62 #define portINITIAL_SR ( ( StackType_t ) 0x00400000 ) /* AVR32 : [M2:M0]=001 I1M=0 I0M=0, GM=0 */
\r
63 #define portINSTRUCTION_SIZE ( ( StackType_t ) 0 )
\r
65 /* Each task maintains its own critical nesting variable. */
\r
66 #define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
\r
67 volatile uint32_t ulCriticalNesting = 9999UL;
\r
69 #if( configTICK_USE_TC==0 )
\r
70 static void prvScheduleNextTick( void );
\r
72 static void prvClearTcInt( void );
\r
75 /* Setup the timer to generate the tick interrupts. */
\r
76 static void prvSetupTimerInterrupt( void );
\r
78 /*-----------------------------------------------------------*/
\r
81 * Low-level initialization routine called during startup, before the main
\r
83 * This version comes in replacement to the default one provided by Newlib.
\r
84 * Newlib's _init_startup only calls init_exceptions, but Newlib's exception
\r
85 * vectors are not compatible with the SCALL management in the current FreeRTOS
\r
86 * port. More low-level initializations are besides added here.
\r
88 void _init_startup(void)
\r
90 /* Import the Exception Vector Base Address. */
\r
94 extern void __heap_start__;
\r
95 extern void __heap_end__;
\r
99 /* Load the Exception Vector Base Address in the corresponding system register. */
\r
100 Set_system_register( AVR32_EVBA, ( int ) &_evba );
\r
102 /* Enable exceptions. */
\r
103 ENABLE_ALL_EXCEPTIONS();
\r
105 /* Initialize interrupt handling. */
\r
106 INTC_init_interrupts();
\r
108 #if configHEAP_INIT
\r
110 /* Initialize the heap used by malloc. */
\r
111 for( pxMem = &__heap_start__; pxMem < ( BaseType_t * )&__heap_end__; )
\r
113 *pxMem++ = 0xA5A5A5A5;
\r
118 /* Give the used CPU clock frequency to Newlib, so it can work properly. */
\r
119 set_cpu_hz( configCPU_CLOCK_HZ );
\r
121 /* Code section present if and only if the debug trace is activated. */
\r
124 static const gpio_map_t DBG_USART_GPIO_MAP =
\r
126 { configDBG_USART_RX_PIN, configDBG_USART_RX_FUNCTION },
\r
127 { configDBG_USART_TX_PIN, configDBG_USART_TX_FUNCTION }
\r
130 /* Initialize the USART used for the debug trace with the configured parameters. */
\r
131 set_usart_base( ( void * ) configDBG_USART );
\r
132 gpio_enable_module( DBG_USART_GPIO_MAP,
\r
133 sizeof( DBG_USART_GPIO_MAP ) / sizeof( DBG_USART_GPIO_MAP[0] ) );
\r
134 usart_init( configDBG_USART_BAUDRATE );
\r
138 /*-----------------------------------------------------------*/
\r
141 * malloc, realloc and free are meant to be called through respectively
\r
142 * pvPortMalloc, pvPortRealloc and vPortFree.
\r
143 * The latter functions call the former ones from within sections where tasks
\r
144 * are suspended, so the latter functions are task-safe. __malloc_lock and
\r
145 * __malloc_unlock use the same mechanism to also keep the former functions
\r
146 * task-safe as they may be called directly from Newlib's functions.
\r
147 * However, all these functions are interrupt-unsafe and SHALL THEREFORE NOT BE
\r
148 * CALLED FROM WITHIN AN INTERRUPT, because __malloc_lock and __malloc_unlock do
\r
149 * not call portENTER_CRITICAL and portEXIT_CRITICAL in order not to disable
\r
150 * interrupts during memory allocation management as this may be a very time-
\r
151 * consuming process.
\r
155 * Lock routine called by Newlib on malloc / realloc / free entry to guarantee a
\r
156 * safe section as memory allocation management uses global data.
\r
157 * See the aforementioned details.
\r
159 void __malloc_lock(struct _reent *ptr)
\r
165 * Unlock routine called by Newlib on malloc / realloc / free exit to guarantee
\r
166 * a safe section as memory allocation management uses global data.
\r
167 * See the aforementioned details.
\r
169 void __malloc_unlock(struct _reent *ptr)
\r
173 /*-----------------------------------------------------------*/
\r
175 /* Added as there is no such function in FreeRTOS. */
\r
176 void *pvPortRealloc( void *pv, size_t xWantedSize )
\r
182 pvReturn = realloc( pv, xWantedSize );
\r
188 /*-----------------------------------------------------------*/
\r
190 /* The cooperative scheduler requires a normal IRQ service routine to
\r
191 simply increment the system tick. */
\r
192 /* The preemptive scheduler is defined as "naked" as the full context is saved
\r
193 on entry as part of the context switch. */
\r
194 __attribute__((__naked__)) static void vTick( void )
\r
196 /* Save the context of the interrupted task. */
\r
197 portSAVE_CONTEXT_OS_INT();
\r
199 #if( configTICK_USE_TC==1 )
\r
200 /* Clear the interrupt flag. */
\r
203 /* Schedule the COUNT&COMPARE match interrupt in (configCPU_CLOCK_HZ/configTICK_RATE_HZ)
\r
204 clock cycles from now. */
\r
205 prvScheduleNextTick();
\r
208 /* Because FreeRTOS is not supposed to run with nested interrupts, put all OS
\r
209 calls in a critical section . */
\r
210 portENTER_CRITICAL();
\r
211 xTaskIncrementTick();
\r
212 portEXIT_CRITICAL();
\r
214 /* Restore the context of the "elected task". */
\r
215 portRESTORE_CONTEXT_OS_INT();
\r
217 /*-----------------------------------------------------------*/
\r
219 __attribute__((__naked__)) void SCALLYield( void )
\r
221 /* Save the context of the interrupted task. */
\r
222 portSAVE_CONTEXT_SCALL();
\r
223 vTaskSwitchContext();
\r
224 portRESTORE_CONTEXT_SCALL();
\r
226 /*-----------------------------------------------------------*/
\r
228 /* The code generated by the GCC compiler uses the stack in different ways at
\r
229 different optimisation levels. The interrupt flags can therefore not always
\r
230 be saved to the stack. Instead the critical section nesting level is stored
\r
231 in a variable, which is then saved as part of the stack context. */
\r
232 __attribute__((__noinline__)) void vPortEnterCritical( void )
\r
234 /* Disable interrupts */
\r
235 portDISABLE_INTERRUPTS();
\r
237 /* Now interrupts are disabled ulCriticalNesting can be accessed
\r
238 directly. Increment ulCriticalNesting to keep a count of how many times
\r
239 portENTER_CRITICAL() has been called. */
\r
240 ulCriticalNesting++;
\r
242 /*-----------------------------------------------------------*/
\r
244 __attribute__((__noinline__)) void vPortExitCritical( void )
\r
246 if(ulCriticalNesting > portNO_CRITICAL_NESTING)
\r
248 ulCriticalNesting--;
\r
249 if( ulCriticalNesting == portNO_CRITICAL_NESTING )
\r
251 /* Enable all interrupt/exception. */
\r
252 portENABLE_INTERRUPTS();
\r
256 /*-----------------------------------------------------------*/
\r
259 * Initialise the stack of a task to look exactly as if a call to
\r
260 * portSAVE_CONTEXT had been called.
\r
262 * See header file for description.
\r
264 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
\r
266 /* Setup the initial stack of the task. The stack is set exactly as
\r
267 expected by the portRESTORE_CONTEXT() macro. */
\r
269 /* When the task starts, it will expect to find the function parameter in R12. */
\r
271 *pxTopOfStack-- = ( StackType_t ) 0x08080808; /* R8 */
\r
272 *pxTopOfStack-- = ( StackType_t ) 0x09090909; /* R9 */
\r
273 *pxTopOfStack-- = ( StackType_t ) 0x0A0A0A0A; /* R10 */
\r
274 *pxTopOfStack-- = ( StackType_t ) 0x0B0B0B0B; /* R11 */
\r
275 *pxTopOfStack-- = ( StackType_t ) pvParameters; /* R12 */
\r
276 *pxTopOfStack-- = ( StackType_t ) 0xDEADBEEF; /* R14/LR */
\r
277 *pxTopOfStack-- = ( StackType_t ) pxCode + portINSTRUCTION_SIZE; /* R15/PC */
\r
278 *pxTopOfStack-- = ( StackType_t ) portINITIAL_SR; /* SR */
\r
279 *pxTopOfStack-- = ( StackType_t ) 0xFF0000FF; /* R0 */
\r
280 *pxTopOfStack-- = ( StackType_t ) 0x01010101; /* R1 */
\r
281 *pxTopOfStack-- = ( StackType_t ) 0x02020202; /* R2 */
\r
282 *pxTopOfStack-- = ( StackType_t ) 0x03030303; /* R3 */
\r
283 *pxTopOfStack-- = ( StackType_t ) 0x04040404; /* R4 */
\r
284 *pxTopOfStack-- = ( StackType_t ) 0x05050505; /* R5 */
\r
285 *pxTopOfStack-- = ( StackType_t ) 0x06060606; /* R6 */
\r
286 *pxTopOfStack-- = ( StackType_t ) 0x07070707; /* R7 */
\r
287 *pxTopOfStack = ( StackType_t ) portNO_CRITICAL_NESTING; /* ulCriticalNesting */
\r
289 return pxTopOfStack;
\r
291 /*-----------------------------------------------------------*/
\r
293 BaseType_t xPortStartScheduler( void )
\r
295 /* Start the timer that generates the tick ISR. Interrupts are disabled
\r
297 prvSetupTimerInterrupt();
\r
299 /* Start the first task. */
\r
300 portRESTORE_CONTEXT();
\r
302 /* Should not get here! */
\r
305 /*-----------------------------------------------------------*/
\r
307 void vPortEndScheduler( void )
\r
309 /* It is unlikely that the AVR32 port will require this function as there
\r
310 is nothing to return to. */
\r
312 /*-----------------------------------------------------------*/
\r
314 /* Schedule the COUNT&COMPARE match interrupt in (configCPU_CLOCK_HZ/configTICK_RATE_HZ)
\r
315 clock cycles from now. */
\r
316 #if( configTICK_USE_TC==0 )
\r
317 static void prvScheduleFirstTick(void)
\r
321 lCycles = Get_system_register(AVR32_COUNT);
\r
322 lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
\r
323 // If lCycles ends up to be 0, make it 1 so that the COMPARE and exception
\r
324 // generation feature does not get disabled.
\r
329 Set_system_register(AVR32_COMPARE, lCycles);
\r
332 __attribute__((__noinline__)) static void prvScheduleNextTick(void)
\r
334 uint32_t lCycles, lCount;
\r
336 lCycles = Get_system_register(AVR32_COMPARE);
\r
337 lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
\r
338 // If lCycles ends up to be 0, make it 1 so that the COMPARE and exception
\r
339 // generation feature does not get disabled.
\r
344 lCount = Get_system_register(AVR32_COUNT);
\r
345 if( lCycles < lCount )
\r
346 { // We missed a tick, recover for the next.
\r
347 lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
\r
349 Set_system_register(AVR32_COMPARE, lCycles);
\r
352 __attribute__((__noinline__)) static void prvClearTcInt(void)
\r
354 AVR32_TC.channel[configTICK_TC_CHANNEL].sr;
\r
357 /*-----------------------------------------------------------*/
\r
359 /* Setup the timer to generate the tick interrupts. */
\r
360 static void prvSetupTimerInterrupt(void)
\r
362 #if( configTICK_USE_TC==1 )
\r
364 volatile avr32_tc_t *tc = &AVR32_TC;
\r
366 // Options for waveform genration.
\r
367 tc_waveform_opt_t waveform_opt =
\r
369 .channel = configTICK_TC_CHANNEL, /* Channel selection. */
\r
371 .bswtrg = TC_EVT_EFFECT_NOOP, /* Software trigger effect on TIOB. */
\r
372 .beevt = TC_EVT_EFFECT_NOOP, /* External event effect on TIOB. */
\r
373 .bcpc = TC_EVT_EFFECT_NOOP, /* RC compare effect on TIOB. */
\r
374 .bcpb = TC_EVT_EFFECT_NOOP, /* RB compare effect on TIOB. */
\r
376 .aswtrg = TC_EVT_EFFECT_NOOP, /* Software trigger effect on TIOA. */
\r
377 .aeevt = TC_EVT_EFFECT_NOOP, /* External event effect on TIOA. */
\r
378 .acpc = TC_EVT_EFFECT_NOOP, /* RC compare effect on TIOA: toggle. */
\r
379 .acpa = TC_EVT_EFFECT_NOOP, /* RA compare effect on TIOA: toggle (other possibilities are none, set and clear). */
\r
381 .wavsel = TC_WAVEFORM_SEL_UP_MODE_RC_TRIGGER,/* Waveform selection: Up mode without automatic trigger on RC compare. */
\r
382 .enetrg = FALSE, /* External event trigger enable. */
\r
383 .eevt = 0, /* External event selection. */
\r
384 .eevtedg = TC_SEL_NO_EDGE, /* External event edge selection. */
\r
385 .cpcdis = FALSE, /* Counter disable when RC compare. */
\r
386 .cpcstop = FALSE, /* Counter clock stopped with RC compare. */
\r
388 .burst = FALSE, /* Burst signal selection. */
\r
389 .clki = FALSE, /* Clock inversion. */
\r
390 .tcclks = TC_CLOCK_SOURCE_TC2 /* Internal source clock 2. */
\r
393 tc_interrupt_t tc_interrupt =
\r
407 /* Disable all interrupt/exception. */
\r
408 portDISABLE_INTERRUPTS();
\r
410 /* Register the compare interrupt handler to the interrupt controller and
\r
411 enable the compare interrupt. */
\r
413 #if( configTICK_USE_TC==1 )
\r
415 INTC_register_interrupt(&vTick, configTICK_TC_IRQ, INT0);
\r
417 /* Initialize the timer/counter. */
\r
418 tc_init_waveform(tc, &waveform_opt);
\r
420 /* Set the compare triggers.
\r
421 Remember TC counter is 16-bits, so counting second is not possible!
\r
422 That's why we configure it to count ms. */
\r
423 tc_write_rc( tc, configTICK_TC_CHANNEL, ( configPBA_CLOCK_HZ / 4) / configTICK_RATE_HZ );
\r
425 tc_configure_interrupts( tc, configTICK_TC_CHANNEL, &tc_interrupt );
\r
427 /* Start the timer/counter. */
\r
428 tc_start(tc, configTICK_TC_CHANNEL);
\r
432 INTC_register_interrupt(&vTick, AVR32_CORE_COMPARE_IRQ, INT0);
\r
433 prvScheduleFirstTick();
\r