1 /*This file has been prepared for Doxygen automatic documentation generation.*/
\r
2 /*! \file *********************************************************************
\r
4 * \brief FreeRTOS port source for AVR32 UC3.
\r
6 * - Compiler: GNU GCC for AVR32
\r
7 * - Supported devices: All AVR32 devices can be used.
\r
10 * \author Atmel Corporation: http://www.atmel.com \n
\r
11 * Support and FAQ: http://support.atmel.no/
\r
13 *****************************************************************************/
\r
16 * FreeRTOS Kernel V10.2.0
\r
17 * Copyright (C) 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved.
\r
19 * Permission is hereby granted, free of charge, to any person obtaining a copy of
\r
20 * this software and associated documentation files (the "Software"), to deal in
\r
21 * the Software without restriction, including without limitation the rights to
\r
22 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
\r
23 * the Software, and to permit persons to whom the Software is furnished to do so,
\r
24 * subject to the following conditions:
\r
26 * The above copyright notice and this permission notice shall be included in all
\r
27 * copies or substantial portions of the Software.
\r
29 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
\r
30 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
\r
31 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
\r
32 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
\r
33 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
\r
34 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
\r
36 * http://www.FreeRTOS.org
\r
37 * http://aws.amazon.com/freertos
\r
39 * 1 tab == 4 spaces!
\r
43 /* Standard includes. */
\r
44 #include <sys/cpu.h>
\r
45 #include <sys/usart.h>
\r
48 /* Scheduler includes. */
\r
49 #include "FreeRTOS.h"
\r
52 /* AVR32 UC3 includes. */
\r
53 #include <avr32/io.h>
\r
55 #if( configTICK_USE_TC==1 )
\r
60 /* Constants required to setup the task context. */
\r
61 #define portINITIAL_SR ( ( StackType_t ) 0x00400000 ) /* AVR32 : [M2:M0]=001 I1M=0 I0M=0, GM=0 */
\r
62 #define portINSTRUCTION_SIZE ( ( StackType_t ) 0 )
\r
64 /* Each task maintains its own critical nesting variable. */
\r
65 #define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
\r
66 volatile uint32_t ulCriticalNesting = 9999UL;
\r
68 #if( configTICK_USE_TC==0 )
\r
69 static void prvScheduleNextTick( void );
\r
71 static void prvClearTcInt( void );
\r
74 /* Setup the timer to generate the tick interrupts. */
\r
75 static void prvSetupTimerInterrupt( void );
\r
77 /*-----------------------------------------------------------*/
\r
80 * Low-level initialization routine called during startup, before the main
\r
82 * This version comes in replacement to the default one provided by Newlib.
\r
83 * Newlib's _init_startup only calls init_exceptions, but Newlib's exception
\r
84 * vectors are not compatible with the SCALL management in the current FreeRTOS
\r
85 * port. More low-level initializations are besides added here.
\r
87 void _init_startup(void)
\r
89 /* Import the Exception Vector Base Address. */
\r
93 extern void __heap_start__;
\r
94 extern void __heap_end__;
\r
98 /* Load the Exception Vector Base Address in the corresponding system register. */
\r
99 Set_system_register( AVR32_EVBA, ( int ) &_evba );
\r
101 /* Enable exceptions. */
\r
102 ENABLE_ALL_EXCEPTIONS();
\r
104 /* Initialize interrupt handling. */
\r
105 INTC_init_interrupts();
\r
107 #if configHEAP_INIT
\r
109 /* Initialize the heap used by malloc. */
\r
110 for( pxMem = &__heap_start__; pxMem < ( BaseType_t * )&__heap_end__; )
\r
112 *pxMem++ = 0xA5A5A5A5;
\r
117 /* Give the used CPU clock frequency to Newlib, so it can work properly. */
\r
118 set_cpu_hz( configCPU_CLOCK_HZ );
\r
120 /* Code section present if and only if the debug trace is activated. */
\r
123 static const gpio_map_t DBG_USART_GPIO_MAP =
\r
125 { configDBG_USART_RX_PIN, configDBG_USART_RX_FUNCTION },
\r
126 { configDBG_USART_TX_PIN, configDBG_USART_TX_FUNCTION }
\r
129 /* Initialize the USART used for the debug trace with the configured parameters. */
\r
130 set_usart_base( ( void * ) configDBG_USART );
\r
131 gpio_enable_module( DBG_USART_GPIO_MAP,
\r
132 sizeof( DBG_USART_GPIO_MAP ) / sizeof( DBG_USART_GPIO_MAP[0] ) );
\r
133 usart_init( configDBG_USART_BAUDRATE );
\r
137 /*-----------------------------------------------------------*/
\r
140 * malloc, realloc and free are meant to be called through respectively
\r
141 * pvPortMalloc, pvPortRealloc and vPortFree.
\r
142 * The latter functions call the former ones from within sections where tasks
\r
143 * are suspended, so the latter functions are task-safe. __malloc_lock and
\r
144 * __malloc_unlock use the same mechanism to also keep the former functions
\r
145 * task-safe as they may be called directly from Newlib's functions.
\r
146 * However, all these functions are interrupt-unsafe and SHALL THEREFORE NOT BE
\r
147 * CALLED FROM WITHIN AN INTERRUPT, because __malloc_lock and __malloc_unlock do
\r
148 * not call portENTER_CRITICAL and portEXIT_CRITICAL in order not to disable
\r
149 * interrupts during memory allocation management as this may be a very time-
\r
150 * consuming process.
\r
154 * Lock routine called by Newlib on malloc / realloc / free entry to guarantee a
\r
155 * safe section as memory allocation management uses global data.
\r
156 * See the aforementioned details.
\r
158 void __malloc_lock(struct _reent *ptr)
\r
164 * Unlock routine called by Newlib on malloc / realloc / free exit to guarantee
\r
165 * a safe section as memory allocation management uses global data.
\r
166 * See the aforementioned details.
\r
168 void __malloc_unlock(struct _reent *ptr)
\r
172 /*-----------------------------------------------------------*/
\r
174 /* Added as there is no such function in FreeRTOS. */
\r
175 void *pvPortRealloc( void *pv, size_t xWantedSize )
\r
181 pvReturn = realloc( pv, xWantedSize );
\r
187 /*-----------------------------------------------------------*/
\r
189 /* The cooperative scheduler requires a normal IRQ service routine to
\r
190 simply increment the system tick. */
\r
191 /* The preemptive scheduler is defined as "naked" as the full context is saved
\r
192 on entry as part of the context switch. */
\r
193 __attribute__((__naked__)) static void vTick( void )
\r
195 /* Save the context of the interrupted task. */
\r
196 portSAVE_CONTEXT_OS_INT();
\r
198 #if( configTICK_USE_TC==1 )
\r
199 /* Clear the interrupt flag. */
\r
202 /* Schedule the COUNT&COMPARE match interrupt in (configCPU_CLOCK_HZ/configTICK_RATE_HZ)
\r
203 clock cycles from now. */
\r
204 prvScheduleNextTick();
\r
207 /* Because FreeRTOS is not supposed to run with nested interrupts, put all OS
\r
208 calls in a critical section . */
\r
209 portENTER_CRITICAL();
\r
210 xTaskIncrementTick();
\r
211 portEXIT_CRITICAL();
\r
213 /* Restore the context of the "elected task". */
\r
214 portRESTORE_CONTEXT_OS_INT();
\r
216 /*-----------------------------------------------------------*/
\r
218 __attribute__((__naked__)) void SCALLYield( void )
\r
220 /* Save the context of the interrupted task. */
\r
221 portSAVE_CONTEXT_SCALL();
\r
222 vTaskSwitchContext();
\r
223 portRESTORE_CONTEXT_SCALL();
\r
225 /*-----------------------------------------------------------*/
\r
227 /* The code generated by the GCC compiler uses the stack in different ways at
\r
228 different optimisation levels. The interrupt flags can therefore not always
\r
229 be saved to the stack. Instead the critical section nesting level is stored
\r
230 in a variable, which is then saved as part of the stack context. */
\r
231 __attribute__((__noinline__)) void vPortEnterCritical( void )
\r
233 /* Disable interrupts */
\r
234 portDISABLE_INTERRUPTS();
\r
236 /* Now interrupts are disabled ulCriticalNesting can be accessed
\r
237 directly. Increment ulCriticalNesting to keep a count of how many times
\r
238 portENTER_CRITICAL() has been called. */
\r
239 ulCriticalNesting++;
\r
241 /*-----------------------------------------------------------*/
\r
243 __attribute__((__noinline__)) void vPortExitCritical( void )
\r
245 if(ulCriticalNesting > portNO_CRITICAL_NESTING)
\r
247 ulCriticalNesting--;
\r
248 if( ulCriticalNesting == portNO_CRITICAL_NESTING )
\r
250 /* Enable all interrupt/exception. */
\r
251 portENABLE_INTERRUPTS();
\r
255 /*-----------------------------------------------------------*/
\r
258 * Initialise the stack of a task to look exactly as if a call to
\r
259 * portSAVE_CONTEXT had been called.
\r
261 * See header file for description.
\r
263 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
\r
265 /* Setup the initial stack of the task. The stack is set exactly as
\r
266 expected by the portRESTORE_CONTEXT() macro. */
\r
268 /* When the task starts, it will expect to find the function parameter in R12. */
\r
270 *pxTopOfStack-- = ( StackType_t ) 0x08080808; /* R8 */
\r
271 *pxTopOfStack-- = ( StackType_t ) 0x09090909; /* R9 */
\r
272 *pxTopOfStack-- = ( StackType_t ) 0x0A0A0A0A; /* R10 */
\r
273 *pxTopOfStack-- = ( StackType_t ) 0x0B0B0B0B; /* R11 */
\r
274 *pxTopOfStack-- = ( StackType_t ) pvParameters; /* R12 */
\r
275 *pxTopOfStack-- = ( StackType_t ) 0xDEADBEEF; /* R14/LR */
\r
276 *pxTopOfStack-- = ( StackType_t ) pxCode + portINSTRUCTION_SIZE; /* R15/PC */
\r
277 *pxTopOfStack-- = ( StackType_t ) portINITIAL_SR; /* SR */
\r
278 *pxTopOfStack-- = ( StackType_t ) 0xFF0000FF; /* R0 */
\r
279 *pxTopOfStack-- = ( StackType_t ) 0x01010101; /* R1 */
\r
280 *pxTopOfStack-- = ( StackType_t ) 0x02020202; /* R2 */
\r
281 *pxTopOfStack-- = ( StackType_t ) 0x03030303; /* R3 */
\r
282 *pxTopOfStack-- = ( StackType_t ) 0x04040404; /* R4 */
\r
283 *pxTopOfStack-- = ( StackType_t ) 0x05050505; /* R5 */
\r
284 *pxTopOfStack-- = ( StackType_t ) 0x06060606; /* R6 */
\r
285 *pxTopOfStack-- = ( StackType_t ) 0x07070707; /* R7 */
\r
286 *pxTopOfStack = ( StackType_t ) portNO_CRITICAL_NESTING; /* ulCriticalNesting */
\r
288 return pxTopOfStack;
\r
290 /*-----------------------------------------------------------*/
\r
292 BaseType_t xPortStartScheduler( void )
\r
294 /* Start the timer that generates the tick ISR. Interrupts are disabled
\r
296 prvSetupTimerInterrupt();
\r
298 /* Start the first task. */
\r
299 portRESTORE_CONTEXT();
\r
301 /* Should not get here! */
\r
304 /*-----------------------------------------------------------*/
\r
306 void vPortEndScheduler( void )
\r
308 /* It is unlikely that the AVR32 port will require this function as there
\r
309 is nothing to return to. */
\r
311 /*-----------------------------------------------------------*/
\r
313 /* Schedule the COUNT&COMPARE match interrupt in (configCPU_CLOCK_HZ/configTICK_RATE_HZ)
\r
314 clock cycles from now. */
\r
315 #if( configTICK_USE_TC==0 )
\r
316 static void prvScheduleFirstTick(void)
\r
320 lCycles = Get_system_register(AVR32_COUNT);
\r
321 lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
\r
322 // If lCycles ends up to be 0, make it 1 so that the COMPARE and exception
\r
323 // generation feature does not get disabled.
\r
328 Set_system_register(AVR32_COMPARE, lCycles);
\r
331 __attribute__((__noinline__)) static void prvScheduleNextTick(void)
\r
333 uint32_t lCycles, lCount;
\r
335 lCycles = Get_system_register(AVR32_COMPARE);
\r
336 lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
\r
337 // If lCycles ends up to be 0, make it 1 so that the COMPARE and exception
\r
338 // generation feature does not get disabled.
\r
343 lCount = Get_system_register(AVR32_COUNT);
\r
344 if( lCycles < lCount )
\r
345 { // We missed a tick, recover for the next.
\r
346 lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
\r
348 Set_system_register(AVR32_COMPARE, lCycles);
\r
351 __attribute__((__noinline__)) static void prvClearTcInt(void)
\r
353 AVR32_TC.channel[configTICK_TC_CHANNEL].sr;
\r
356 /*-----------------------------------------------------------*/
\r
358 /* Setup the timer to generate the tick interrupts. */
\r
359 static void prvSetupTimerInterrupt(void)
\r
361 #if( configTICK_USE_TC==1 )
\r
363 volatile avr32_tc_t *tc = &AVR32_TC;
\r
365 // Options for waveform genration.
\r
366 tc_waveform_opt_t waveform_opt =
\r
368 .channel = configTICK_TC_CHANNEL, /* Channel selection. */
\r
370 .bswtrg = TC_EVT_EFFECT_NOOP, /* Software trigger effect on TIOB. */
\r
371 .beevt = TC_EVT_EFFECT_NOOP, /* External event effect on TIOB. */
\r
372 .bcpc = TC_EVT_EFFECT_NOOP, /* RC compare effect on TIOB. */
\r
373 .bcpb = TC_EVT_EFFECT_NOOP, /* RB compare effect on TIOB. */
\r
375 .aswtrg = TC_EVT_EFFECT_NOOP, /* Software trigger effect on TIOA. */
\r
376 .aeevt = TC_EVT_EFFECT_NOOP, /* External event effect on TIOA. */
\r
377 .acpc = TC_EVT_EFFECT_NOOP, /* RC compare effect on TIOA: toggle. */
\r
378 .acpa = TC_EVT_EFFECT_NOOP, /* RA compare effect on TIOA: toggle (other possibilities are none, set and clear). */
\r
380 .wavsel = TC_WAVEFORM_SEL_UP_MODE_RC_TRIGGER,/* Waveform selection: Up mode without automatic trigger on RC compare. */
\r
381 .enetrg = FALSE, /* External event trigger enable. */
\r
382 .eevt = 0, /* External event selection. */
\r
383 .eevtedg = TC_SEL_NO_EDGE, /* External event edge selection. */
\r
384 .cpcdis = FALSE, /* Counter disable when RC compare. */
\r
385 .cpcstop = FALSE, /* Counter clock stopped with RC compare. */
\r
387 .burst = FALSE, /* Burst signal selection. */
\r
388 .clki = FALSE, /* Clock inversion. */
\r
389 .tcclks = TC_CLOCK_SOURCE_TC2 /* Internal source clock 2. */
\r
392 tc_interrupt_t tc_interrupt =
\r
406 /* Disable all interrupt/exception. */
\r
407 portDISABLE_INTERRUPTS();
\r
409 /* Register the compare interrupt handler to the interrupt controller and
\r
410 enable the compare interrupt. */
\r
412 #if( configTICK_USE_TC==1 )
\r
414 INTC_register_interrupt(&vTick, configTICK_TC_IRQ, INT0);
\r
416 /* Initialize the timer/counter. */
\r
417 tc_init_waveform(tc, &waveform_opt);
\r
419 /* Set the compare triggers.
\r
420 Remember TC counter is 16-bits, so counting second is not possible!
\r
421 That's why we configure it to count ms. */
\r
422 tc_write_rc( tc, configTICK_TC_CHANNEL, ( configPBA_CLOCK_HZ / 4) / configTICK_RATE_HZ );
\r
424 tc_configure_interrupts( tc, configTICK_TC_CHANNEL, &tc_interrupt );
\r
426 /* Start the timer/counter. */
\r
427 tc_start(tc, configTICK_TC_CHANNEL);
\r
431 INTC_register_interrupt(&vTick, AVR32_CORE_COMPARE_IRQ, INT0);
\r
432 prvScheduleFirstTick();
\r