2 FreeRTOS V7.2.0 - Copyright (C) 2012 Real Time Engineers Ltd.
\r
5 ***************************************************************************
\r
7 * FreeRTOS tutorial books are available in pdf and paperback. *
\r
8 * Complete, revised, and edited pdf reference manuals are also *
\r
11 * Purchasing FreeRTOS documentation will not only help you, by *
\r
12 * ensuring you get running as quickly as possible and with an *
\r
13 * in-depth knowledge of how to use FreeRTOS, it will also help *
\r
14 * the FreeRTOS project to continue with its mission of providing *
\r
15 * professional grade, cross platform, de facto standard solutions *
\r
16 * for microcontrollers - completely free of charge! *
\r
18 * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
\r
20 * Thank you for using FreeRTOS, and thank you for your support! *
\r
22 ***************************************************************************
\r
25 This file is part of the FreeRTOS distribution.
\r
27 FreeRTOS is free software; you can redistribute it and/or modify it under
\r
28 the terms of the GNU General Public License (version 2) as published by the
\r
29 Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
\r
30 >>>NOTE<<< The modification to the GPL is included to allow you to
\r
31 distribute a combined work that includes FreeRTOS without being obliged to
\r
32 provide the source code for proprietary components outside of the FreeRTOS
\r
33 kernel. FreeRTOS is distributed in the hope that it will be useful, but
\r
34 WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
\r
35 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
\r
36 more details. You should have received a copy of the GNU General Public
\r
37 License and the FreeRTOS license exception along with FreeRTOS; if not it
\r
38 can be viewed here: http://www.freertos.org/a00114.html and also obtained
\r
39 by writing to Richard Barry, contact details for whom are available on the
\r
44 ***************************************************************************
\r
46 * Having a problem? Start by reading the FAQ "My application does *
\r
47 * not run, what could be wrong? *
\r
49 * http://www.FreeRTOS.org/FAQHelp.html *
\r
51 ***************************************************************************
\r
54 http://www.FreeRTOS.org - Documentation, training, latest information,
\r
55 license and contact details.
\r
57 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
\r
58 including FreeRTOS+Trace - an indispensable productivity tool.
\r
60 Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell
\r
61 the code with commercial support, indemnification, and middleware, under
\r
62 the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also
\r
63 provide a safety engineered and independently SIL3 certified version under
\r
64 the SafeRTOS brand: http://www.SafeRTOS.com.
\r
67 /* Scheduler includes. */
\r
68 #include "FreeRTOS.h"
\r
72 /*-----------------------------------------------------------
\r
73 * Implementation of functions defined in portable.h for the H8S port.
\r
74 *----------------------------------------------------------*/
\r
77 /*-----------------------------------------------------------*/
\r
79 /* When the task starts interrupts should be enabled. */
\r
80 #define portINITIAL_CCR ( ( portSTACK_TYPE ) 0x00 )
\r
82 /* Hardware specific constants used to generate the RTOS tick from the TPU. */
\r
83 #define portCLEAR_ON_TGRA_COMPARE_MATCH ( ( unsigned char ) 0x20 )
\r
84 #define portCLOCK_DIV_64 ( ( unsigned char ) 0x03 )
\r
85 #define portCLOCK_DIV ( ( unsigned long ) 64 )
\r
86 #define portTGRA_INTERRUPT_ENABLE ( ( unsigned char ) 0x01 )
\r
87 #define portTIMER_CHANNEL ( ( unsigned char ) 0x02 )
\r
88 #define portMSTP13 ( ( unsigned short ) 0x2000 )
\r
91 * Setup TPU channel one for the RTOS tick at the requested frequency.
\r
93 static void prvSetupTimerInterrupt( void );
\r
96 * The ISR used by portYIELD(). This is installed as a trap handler.
\r
98 void vPortYield( void ) __attribute__ ( ( saveall, interrupt_handler ) );
\r
100 /*-----------------------------------------------------------*/
\r
103 * See header file for description.
\r
105 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
\r
107 unsigned long ulValue;
\r
109 /* This requires an even address. */
\r
110 ulValue = ( unsigned long ) pxTopOfStack;
\r
111 if( ulValue & 1UL )
\r
113 pxTopOfStack = pxTopOfStack - 1;
\r
116 /* Place a few bytes of known values on the bottom of the stack.
\r
117 This is just useful for debugging. */
\r
119 *pxTopOfStack = 0xaa;
\r
121 *pxTopOfStack = 0xbb;
\r
123 *pxTopOfStack = 0xcc;
\r
125 *pxTopOfStack = 0xdd;
\r
127 /* The initial stack mimics an interrupt stack. First there is the program
\r
128 counter (24 bits). */
\r
129 ulValue = ( unsigned long ) pxCode;
\r
132 *pxTopOfStack = ( portSTACK_TYPE ) ( ulValue & 0xff );
\r
135 *pxTopOfStack = ( portSTACK_TYPE ) ( ulValue & 0xff );
\r
138 *pxTopOfStack = ( portSTACK_TYPE ) ( ulValue & 0xff );
\r
140 /* Followed by the CCR. */
\r
142 *pxTopOfStack = portINITIAL_CCR;
\r
144 /* Next all the general purpose registers - with the parameters being passed
\r
145 in ER0. The parameter order must match that used by the compiler when the
\r
146 "saveall" function attribute is used. */
\r
150 *pxTopOfStack = 0x66;
\r
152 *pxTopOfStack = 0x66;
\r
154 *pxTopOfStack = 0x66;
\r
156 *pxTopOfStack = 0x66;
\r
159 ulValue = ( unsigned long ) pvParameters;
\r
162 *pxTopOfStack = ( portSTACK_TYPE ) ( ulValue & 0xff );
\r
165 *pxTopOfStack = ( portSTACK_TYPE ) ( ulValue & 0xff );
\r
168 *pxTopOfStack = ( portSTACK_TYPE ) ( ulValue & 0xff );
\r
171 *pxTopOfStack = ( portSTACK_TYPE ) ( ulValue & 0xff );
\r
175 *pxTopOfStack = 0x11;
\r
177 *pxTopOfStack = 0x11;
\r
179 *pxTopOfStack = 0x11;
\r
181 *pxTopOfStack = 0x11;
\r
185 *pxTopOfStack = 0x22;
\r
187 *pxTopOfStack = 0x22;
\r
189 *pxTopOfStack = 0x22;
\r
191 *pxTopOfStack = 0x22;
\r
195 *pxTopOfStack = 0x33;
\r
197 *pxTopOfStack = 0x33;
\r
199 *pxTopOfStack = 0x33;
\r
201 *pxTopOfStack = 0x33;
\r
205 *pxTopOfStack = 0x44;
\r
207 *pxTopOfStack = 0x44;
\r
209 *pxTopOfStack = 0x44;
\r
211 *pxTopOfStack = 0x44;
\r
215 *pxTopOfStack = 0x55;
\r
217 *pxTopOfStack = 0x55;
\r
219 *pxTopOfStack = 0x55;
\r
221 *pxTopOfStack = 0x55;
\r
223 return pxTopOfStack;
\r
225 /*-----------------------------------------------------------*/
\r
227 portBASE_TYPE xPortStartScheduler( void )
\r
229 extern void * pxCurrentTCB;
\r
231 /* Setup the hardware to generate the tick. */
\r
232 prvSetupTimerInterrupt();
\r
234 /* Restore the context of the first task that is going to run. This
\r
235 mirrors the function epilogue code generated by the compiler when the
\r
236 "saveall" function attribute is used. */
\r
238 "MOV.L @_pxCurrentTCB, ER6 \n\t"
\r
239 "MOV.L @ER6, ER7 \n\t"
\r
240 "LDM.L @SP+, (ER4-ER5) \n\t"
\r
241 "LDM.L @SP+, (ER0-ER3) \n\t"
\r
242 "MOV.L @ER7+, ER6 \n\t"
\r
246 ( void ) pxCurrentTCB;
\r
248 /* Should not get here. */
\r
251 /*-----------------------------------------------------------*/
\r
253 void vPortEndScheduler( void )
\r
255 /* It is unlikely that the h8 port will get stopped. */
\r
257 /*-----------------------------------------------------------*/
\r
260 * Manual context switch. This is a trap handler. The "saveall" function
\r
261 * attribute is used so the context is saved by the compiler prologue. All
\r
262 * we have to do is save the stack pointer.
\r
264 void vPortYield( void )
\r
266 portSAVE_STACK_POINTER();
\r
267 vTaskSwitchContext();
\r
268 portRESTORE_STACK_POINTER();
\r
270 /*-----------------------------------------------------------*/
\r
273 * The interrupt handler installed for the RTOS tick depends on whether the
\r
274 * preemptive or cooperative scheduler is being used.
\r
276 #if( configUSE_PREEMPTION == 1 )
\r
279 * The preemptive scheduler is used so the ISR calls vTaskSwitchContext().
\r
280 * The function prologue saves the context so all we have to do is save
\r
281 * the stack pointer.
\r
283 void vTickISR( void ) __attribute__ ( ( saveall, interrupt_handler ) );
\r
284 void vTickISR( void )
\r
286 portSAVE_STACK_POINTER();
\r
288 vTaskIncrementTick();
\r
289 vTaskSwitchContext();
\r
291 /* Clear the interrupt. */
\r
294 portRESTORE_STACK_POINTER();
\r
300 * The cooperative scheduler is being used so all we have to do is
\r
301 * periodically increment the tick. This can just be a normal ISR and
\r
302 * the "saveall" attribute is not required.
\r
304 void vTickISR( void ) __attribute__ ( ( interrupt_handler ) );
\r
305 void vTickISR( void )
\r
307 vTaskIncrementTick();
\r
309 /* Clear the interrupt. */
\r
314 /*-----------------------------------------------------------*/
\r
317 * Setup timer 1 compare match to generate a tick interrupt.
\r
319 static void prvSetupTimerInterrupt( void )
\r
321 const unsigned long ulCompareMatch = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) / portCLOCK_DIV;
\r
323 /* Turn the module on. */
\r
324 MSTPCR &= ~portMSTP13;
\r
326 /* Configure timer 1. */
\r
327 TCR1 = portCLEAR_ON_TGRA_COMPARE_MATCH | portCLOCK_DIV_64;
\r
329 /* Configure the compare match value for a tick of configTICK_RATE_HZ. */
\r
330 TGR1A = ulCompareMatch;
\r
332 /* Start the timer and enable the interrupt - we can do this here as
\r
333 interrupts are globally disabled when this function is called. */
\r
334 TIER1 |= portTGRA_INTERRUPT_ENABLE;
\r
335 TSTR |= portTIMER_CHANNEL;
\r
337 /*-----------------------------------------------------------*/
\r