2 FreeRTOS V8.0.0:rc1 - Copyright (C) 2014 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 ***************************************************************************
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9 * FreeRTOS provides completely free yet professionally developed, *
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10 * robust, strictly quality controlled, supported, and cross *
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11 * platform software that has become a de facto standard. *
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13 * Help yourself get started quickly and support the FreeRTOS *
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14 * project by purchasing a FreeRTOS tutorial book, reference *
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15 * manual, or both from: http://www.FreeRTOS.org/Documentation *
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19 ***************************************************************************
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21 This file is part of the FreeRTOS distribution.
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23 FreeRTOS is free software; you can redistribute it and/or modify it under
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24 the terms of the GNU General Public License (version 2) as published by the
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25 Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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27 >>! NOTE: The modification to the GPL is included to allow you to distribute
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28 >>! a combined work that includes FreeRTOS without being obliged to provide
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29 >>! the source code for proprietary components outside of the FreeRTOS
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32 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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33 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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34 FOR A PARTICULAR PURPOSE. Full license text is available from the following
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35 link: http://www.freertos.org/a00114.html
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39 ***************************************************************************
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41 * Having a problem? Start by reading the FAQ "My application does *
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42 * not run, what could be wrong?" *
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44 * http://www.FreeRTOS.org/FAQHelp.html *
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46 ***************************************************************************
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48 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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49 license and Real Time Engineers Ltd. contact details.
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51 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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52 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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53 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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55 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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56 Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
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57 licenses offer ticketed support, indemnification and middleware.
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59 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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60 engineered and independently SIL3 certified version for use in safety and
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61 mission critical applications that require provable dependability.
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74 /*-----------------------------------------------------------
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75 * Port specific definitions.
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77 * The settings in this file configure FreeRTOS correctly for the
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78 * given hardware and compiler.
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80 * These settings should not be altered.
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81 *-----------------------------------------------------------
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84 /* Type definitions. */
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85 #define portCHAR char
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86 #define portFLOAT float
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87 #define portDOUBLE double
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88 #define portLONG long
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89 #define portSHORT short
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90 #define portSTACK_TYPE uint8_t
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91 #define portBASE_TYPE char
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93 typedef portSTACK_TYPE StackType_t;
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94 typedef signed char BaseType_t;
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95 typedef unsigned char UBaseType_t;
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98 #if( configUSE_16_BIT_TICKS == 1 )
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99 typedef uint16_t TickType_t;
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100 #define portMAX_DELAY ( TickType_t ) 0xffff
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102 typedef uint32_t TickType_t;
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103 #define portMAX_DELAY ( TickType_t ) 0xffffffffUL
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105 /*-----------------------------------------------------------*/
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107 /* Hardware specifics. */
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108 #define portBYTE_ALIGNMENT 1
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109 #define portSTACK_GROWTH ( -1 )
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110 #define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
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111 #define portYIELD() __asm( "swi" );
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112 /*-----------------------------------------------------------*/
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114 /* Critical section handling. */
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115 #define portENABLE_INTERRUPTS() __asm( "cli" )
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116 #define portDISABLE_INTERRUPTS() __asm( "sei" )
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119 * Disable interrupts before incrementing the count of critical section nesting.
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120 * The nesting count is maintained so we know when interrupts should be
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121 * re-enabled. Once interrupts are disabled the nesting count can be accessed
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122 * directly. Each task maintains its own nesting count.
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124 #define portENTER_CRITICAL() \
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126 extern volatile UBaseType_t uxCriticalNesting; \
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128 portDISABLE_INTERRUPTS(); \
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129 uxCriticalNesting++; \
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133 * Interrupts are disabled so we can access the nesting count directly. If the
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134 * nesting is found to be 0 (no nesting) then we are leaving the critical
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135 * section and interrupts can be re-enabled.
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137 #define portEXIT_CRITICAL() \
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139 extern volatile UBaseType_t uxCriticalNesting; \
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141 uxCriticalNesting--; \
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142 if( uxCriticalNesting == 0 ) \
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144 portENABLE_INTERRUPTS(); \
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147 /*-----------------------------------------------------------*/
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149 /* Task utilities. */
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152 * These macros are very simple as the processor automatically saves and
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153 * restores its registers as interrupts are entered and exited. In
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154 * addition to the (automatically stacked) registers we also stack the
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155 * critical nesting count. Each task maintains its own critical nesting
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156 * count as it is legitimate for a task to yield from within a critical
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157 * section. If the banked memory model is being used then the PPAGE
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158 * register is also stored as part of the tasks context.
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161 #ifdef BANKED_MODEL
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163 * Load the stack pointer for the task, then pull the critical nesting
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164 * count and PPAGE register from the stack. The remains of the
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165 * context are restored by the RTI instruction.
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167 #define portRESTORE_CONTEXT() \
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170 .globl pxCurrentTCB ; void * \n\
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171 .globl uxCriticalNesting ; char \n\
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173 ldx pxCurrentTCB \n\
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174 lds 0,x ; Stack \n\
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176 movb 1,sp+,uxCriticalNesting \n\
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177 movb 1,sp+,0x30 ; PPAGE \n\
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182 * By the time this macro is called the processor has already stacked the
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183 * registers. Simply stack the nesting count and PPAGE value, then save
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184 * the task stack pointer.
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186 #define portSAVE_CONTEXT() \
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189 .globl pxCurrentTCB ; void * \n\
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190 .globl uxCriticalNesting ; char \n\
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192 movb 0x30, 1,-sp ; PPAGE \n\
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193 movb uxCriticalNesting, 1,-sp \n\
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195 ldx pxCurrentTCB \n\
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196 sts 0,x ; Stack \n\
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202 * These macros are as per the BANKED versions above, but without saving
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203 * and restoring the PPAGE register.
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206 #define portRESTORE_CONTEXT() \
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209 .globl pxCurrentTCB ; void * \n\
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210 .globl uxCriticalNesting ; char \n\
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212 ldx pxCurrentTCB \n\
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213 lds 0,x ; Stack \n\
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215 movb 1,sp+,uxCriticalNesting \n\
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219 #define portSAVE_CONTEXT() \
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222 .globl pxCurrentTCB ; void * \n\
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223 .globl uxCriticalNesting ; char \n\
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225 movb uxCriticalNesting, 1,-sp \n\
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227 ldx pxCurrentTCB \n\
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228 sts 0,x ; Stack \n\
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234 * Utility macros to save/restore correct software registers for GCC. This is
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235 * useful when GCC does not generate appropriate ISR head/tail code.
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237 #define portISR_HEAD() \
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240 movw _.frame, 2,-sp \n\
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241 movw _.tmp, 2,-sp \n\
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242 movw _.z, 2,-sp \n\
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243 movw _.xy, 2,-sp \n\
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244 ;movw _.d2, 2,-sp \n\
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245 ;movw _.d1, 2,-sp \n\
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249 #define portISR_TAIL() \
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252 movw 2,sp+, _.xy \n\
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253 movw 2,sp+, _.z \n\
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254 movw 2,sp+, _.tmp \n\
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255 movw 2,sp+, _.frame \n\
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256 ;movw 2,sp+, _.d1 \n\
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257 ;movw 2,sp+, _.d2 \n\
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263 * Utility macro to call macros above in correct order in order to perform a
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264 * task switch from within a standard ISR. This macro can only be used if
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265 * the ISR does not use any local (stack) variables. If the ISR uses stack
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266 * variables portYIELD() should be used in it's place.
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269 #define portTASK_SWITCH_FROM_ISR() \
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270 portSAVE_CONTEXT(); \
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271 vTaskSwitchContext(); \
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272 portRESTORE_CONTEXT();
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275 /* Task function macros as described on the FreeRTOS.org WEB site. */
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276 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
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277 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
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283 #endif /* PORTMACRO_H */
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