2 FreeRTOS V7.4.2 - Copyright (C) 2013 Real Time Engineers Ltd.
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4 FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
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5 http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 ***************************************************************************
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9 * FreeRTOS tutorial books are available in pdf and paperback. *
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10 * Complete, revised, and edited pdf reference manuals are also *
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13 * Purchasing FreeRTOS documentation will not only help you, by *
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14 * ensuring you get running as quickly as possible and with an *
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15 * in-depth knowledge of how to use FreeRTOS, it will also help *
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16 * the FreeRTOS project to continue with its mission of providing *
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17 * professional grade, cross platform, de facto standard solutions *
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18 * for microcontrollers - completely free of charge! *
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20 * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
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22 * Thank you for using FreeRTOS, and thank you for your support! *
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24 ***************************************************************************
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27 This file is part of the FreeRTOS distribution.
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29 FreeRTOS is free software; you can redistribute it and/or modify it under
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30 the terms of the GNU General Public License (version 2) as published by the
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31 Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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33 >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to
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34 distribute a combined work that includes FreeRTOS without being obliged to
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35 provide the source code for proprietary components outside of the FreeRTOS
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38 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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39 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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40 FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
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41 details. You should have received a copy of the GNU General Public License
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42 and the FreeRTOS license exception along with FreeRTOS; if not it can be
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43 viewed here: http://www.freertos.org/a00114.html and also obtained by
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44 writing to Real Time Engineers Ltd., contact details for whom are available
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45 on the FreeRTOS WEB site.
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49 ***************************************************************************
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51 * Having a problem? Start by reading the FAQ "My application does *
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52 * not run, what could be wrong?" *
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54 * http://www.FreeRTOS.org/FAQHelp.html *
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56 ***************************************************************************
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59 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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60 license and Real Time Engineers Ltd. contact details.
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62 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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63 including FreeRTOS+Trace - an indispensable productivity tool, and our new
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64 fully thread aware and reentrant UDP/IP stack.
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66 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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67 Integrity Systems, who sell the code with commercial support,
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68 indemnification and middleware, under the OpenRTOS brand.
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70 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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71 engineered and independently SIL3 certified version for use in safety and
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72 mission critical applications that require provable dependability.
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75 /* Scheduler includes. */
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76 #include "FreeRTOS.h"
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79 /* Hardware includes. */
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80 #include <microblaze_exceptions_i.h>
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81 #include <microblaze_exceptions_g.h>
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83 /* The Xilinx library defined exception entry point stacks a number of
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84 registers. These definitions are offsets from the stack pointer to the various
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85 stacked register values. */
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86 #define portexR3_STACK_OFFSET 4
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87 #define portexR4_STACK_OFFSET 5
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88 #define portexR5_STACK_OFFSET 6
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89 #define portexR6_STACK_OFFSET 7
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90 #define portexR7_STACK_OFFSET 8
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91 #define portexR8_STACK_OFFSET 9
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92 #define portexR9_STACK_OFFSET 10
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93 #define portexR10_STACK_OFFSET 11
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94 #define portexR11_STACK_OFFSET 12
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95 #define portexR12_STACK_OFFSET 13
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96 #define portexR15_STACK_OFFSET 16
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97 #define portexR18_STACK_OFFSET 19
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98 #define portexMSR_STACK_OFFSET 20
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99 #define portexR19_STACK_OFFSET -1
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101 /* This is defined to equal the size, in bytes, of the stack frame generated by
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102 the Xilinx standard library exception entry point. It is required to determine
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103 the stack pointer value prior to the exception being entered. */
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104 #define portexASM_HANDLER_STACK_FRAME_SIZE 84UL
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106 /* The number of bytes a MicroBlaze instruction consumes. */
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107 #define portexINSTRUCTION_SIZE 4
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109 /* Exclude this entire file if the MicroBlaze is not configured to handle
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110 exceptions, or the application defined configuration constant
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111 configINSTALL_EXCEPTION_HANDLERS is not set to 1. */
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112 #if ( MICROBLAZE_EXCEPTIONS_ENABLED == 1 ) && ( configINSTALL_EXCEPTION_HANDLERS == 1 )
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114 /* This variable is set in the exception entry code, before
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115 vPortExceptionHandler is called. */
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116 unsigned long *pulStackPointerOnFunctionEntry = NULL;
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118 /* This is the structure that is filled with the MicroBlaze context as it
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119 existed immediately prior to the exception occurrence. A pointer to this
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120 structure is passed into the vApplicationExceptionRegisterDump() callback
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121 function, if one is defined. */
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122 static xPortRegisterDump xRegisterDump;
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124 /* This is the FreeRTOS exception handler that is installed for all exception
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125 types. It is called from vPortExceptionHanlderEntry() - which is itself defined
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127 void vPortExceptionHandler( void *pvExceptionID );
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128 extern void vPortExceptionHandlerEntry( void *pvExceptionID );
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130 /*-----------------------------------------------------------*/
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132 /* vApplicationExceptionRegisterDump() is a callback function that the
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133 application can optionally define to receive a populated xPortRegisterDump
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134 structure. If the application chooses not to define a version of
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135 vApplicationExceptionRegisterDump() then this weekly defined default
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136 implementation will be called instead. */
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137 extern void vApplicationExceptionRegisterDump( xPortRegisterDump *xRegisterDump ) __attribute__((weak));
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138 void vApplicationExceptionRegisterDump( xPortRegisterDump *xRegisterDump )
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140 ( void ) xRegisterDump;
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147 /*-----------------------------------------------------------*/
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149 void vPortExceptionHandler( void *pvExceptionID )
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151 extern void *pxCurrentTCB;
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153 /* Fill an xPortRegisterDump structure with the MicroBlaze context as it
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154 was immediately before the exception occurrence. */
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156 /* First fill in the name and handle of the task that was in the Running
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157 state when the exception occurred. */
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158 xRegisterDump.xCurrentTaskHandle = pxCurrentTCB;
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159 xRegisterDump.pcCurrentTaskName = pcTaskGetTaskName( NULL );
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161 configASSERT( pulStackPointerOnFunctionEntry );
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163 /* Obtain the values of registers that were stacked prior to this function
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164 being called, and may have changed since they were stacked. */
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165 xRegisterDump.ulR3 = pulStackPointerOnFunctionEntry[ portexR3_STACK_OFFSET ];
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166 xRegisterDump.ulR4 = pulStackPointerOnFunctionEntry[ portexR4_STACK_OFFSET ];
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167 xRegisterDump.ulR5 = pulStackPointerOnFunctionEntry[ portexR5_STACK_OFFSET ];
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168 xRegisterDump.ulR6 = pulStackPointerOnFunctionEntry[ portexR6_STACK_OFFSET ];
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169 xRegisterDump.ulR7 = pulStackPointerOnFunctionEntry[ portexR7_STACK_OFFSET ];
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170 xRegisterDump.ulR8 = pulStackPointerOnFunctionEntry[ portexR8_STACK_OFFSET ];
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171 xRegisterDump.ulR9 = pulStackPointerOnFunctionEntry[ portexR9_STACK_OFFSET ];
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172 xRegisterDump.ulR10 = pulStackPointerOnFunctionEntry[ portexR10_STACK_OFFSET ];
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173 xRegisterDump.ulR11 = pulStackPointerOnFunctionEntry[ portexR11_STACK_OFFSET ];
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174 xRegisterDump.ulR12 = pulStackPointerOnFunctionEntry[ portexR12_STACK_OFFSET ];
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175 xRegisterDump.ulR15_return_address_from_subroutine = pulStackPointerOnFunctionEntry[ portexR15_STACK_OFFSET ];
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176 xRegisterDump.ulR18 = pulStackPointerOnFunctionEntry[ portexR18_STACK_OFFSET ];
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177 xRegisterDump.ulR19 = pulStackPointerOnFunctionEntry[ portexR19_STACK_OFFSET ];
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178 xRegisterDump.ulMSR = pulStackPointerOnFunctionEntry[ portexMSR_STACK_OFFSET ];
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180 /* Obtain the value of all other registers. */
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181 xRegisterDump.ulR2_small_data_area = mfgpr( R2 );
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182 xRegisterDump.ulR13_read_write_small_data_area = mfgpr( R13 );
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183 xRegisterDump.ulR14_return_address_from_interrupt = mfgpr( R14 );
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184 xRegisterDump.ulR16_return_address_from_trap = mfgpr( R16 );
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185 xRegisterDump.ulR17_return_address_from_exceptions = mfgpr( R17 );
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186 xRegisterDump.ulR20 = mfgpr( R20 );
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187 xRegisterDump.ulR21 = mfgpr( R21 );
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188 xRegisterDump.ulR22 = mfgpr( R22 );
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189 xRegisterDump.ulR23 = mfgpr( R23 );
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190 xRegisterDump.ulR24 = mfgpr( R24 );
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191 xRegisterDump.ulR25 = mfgpr( R25 );
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192 xRegisterDump.ulR26 = mfgpr( R26 );
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193 xRegisterDump.ulR27 = mfgpr( R27 );
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194 xRegisterDump.ulR28 = mfgpr( R28 );
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195 xRegisterDump.ulR29 = mfgpr( R29 );
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196 xRegisterDump.ulR30 = mfgpr( R30 );
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197 xRegisterDump.ulR31 = mfgpr( R31 );
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198 xRegisterDump.ulR1_SP = ( ( unsigned long ) pulStackPointerOnFunctionEntry ) + portexASM_HANDLER_STACK_FRAME_SIZE;
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199 xRegisterDump.ulEAR = mfear();
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200 xRegisterDump.ulESR = mfesr();
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201 xRegisterDump.ulEDR = mfedr();
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203 /* Move the saved program counter back to the instruction that was executed
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204 when the exception occurred. This is only valid for certain types of
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206 xRegisterDump.ulPC = xRegisterDump.ulR17_return_address_from_exceptions - portexINSTRUCTION_SIZE;
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208 #if XPAR_MICROBLAZE_0_USE_FPU == 1
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210 xRegisterDump.ulFSR = mffsr();
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214 xRegisterDump.ulFSR = 0UL;
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218 /* Also fill in a string that describes what type of exception this is.
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219 The string uses the same ID names as defined in the MicroBlaze standard
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220 library exception header files. */
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221 switch( ( unsigned long ) pvExceptionID )
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224 xRegisterDump.pcExceptionCause = ( signed char * const ) "XEXC_ID_FSL";
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227 case XEXC_ID_UNALIGNED_ACCESS :
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228 xRegisterDump.pcExceptionCause = ( signed char * const ) "XEXC_ID_UNALIGNED_ACCESS";
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231 case XEXC_ID_ILLEGAL_OPCODE :
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232 xRegisterDump.pcExceptionCause = ( signed char * const ) "XEXC_ID_ILLEGAL_OPCODE";
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235 case XEXC_ID_M_AXI_I_EXCEPTION :
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236 xRegisterDump.pcExceptionCause = ( signed char * const ) "XEXC_ID_M_AXI_I_EXCEPTION or XEXC_ID_IPLB_EXCEPTION";
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239 case XEXC_ID_M_AXI_D_EXCEPTION :
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240 xRegisterDump.pcExceptionCause = ( signed char * const ) "XEXC_ID_M_AXI_D_EXCEPTION or XEXC_ID_DPLB_EXCEPTION";
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243 case XEXC_ID_DIV_BY_ZERO :
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244 xRegisterDump.pcExceptionCause = ( signed char * const ) "XEXC_ID_DIV_BY_ZERO";
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247 case XEXC_ID_STACK_VIOLATION :
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248 xRegisterDump.pcExceptionCause = ( signed char * const ) "XEXC_ID_STACK_VIOLATION or XEXC_ID_MMU";
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251 #if XPAR_MICROBLAZE_0_USE_FPU == 1
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254 xRegisterDump.pcExceptionCause = ( signed char * const ) "XEXC_ID_FPU see ulFSR value";
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257 #endif /* XPAR_MICROBLAZE_0_USE_FPU */
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260 /* vApplicationExceptionRegisterDump() is a callback function that the
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261 application can optionally define to receive the populated xPortRegisterDump
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262 structure. If the application chooses not to define a version of
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263 vApplicationExceptionRegisterDump() then the weekly defined default
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264 implementation within this file will be called instead. */
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265 vApplicationExceptionRegisterDump( &xRegisterDump );
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267 /* Must not attempt to leave this function! */
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273 /*-----------------------------------------------------------*/
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275 void vPortExceptionsInstallHandlers( void )
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277 static unsigned long ulHandlersAlreadyInstalled = pdFALSE;
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279 if( ulHandlersAlreadyInstalled == pdFALSE )
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281 ulHandlersAlreadyInstalled = pdTRUE;
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283 #if XPAR_MICROBLAZE_0_UNALIGNED_EXCEPTIONS == 1
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284 microblaze_register_exception_handler( XEXC_ID_UNALIGNED_ACCESS, vPortExceptionHandlerEntry, ( void * ) XEXC_ID_UNALIGNED_ACCESS );
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285 #endif /* XPAR_MICROBLAZE_0_UNALIGNED_EXCEPTIONS*/
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287 #if XPAR_MICROBLAZE_0_ILL_OPCODE_EXCEPTION == 1
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288 microblaze_register_exception_handler( XEXC_ID_ILLEGAL_OPCODE, vPortExceptionHandlerEntry, ( void * ) XEXC_ID_ILLEGAL_OPCODE );
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289 #endif /* XPAR_MICROBLAZE_0_ILL_OPCODE_EXCEPTION*/
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291 #if XPAR_MICROBLAZE_0_M_AXI_I_BUS_EXCEPTION == 1
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292 microblaze_register_exception_handler( XEXC_ID_M_AXI_I_EXCEPTION, vPortExceptionHandlerEntry, ( void * ) XEXC_ID_M_AXI_I_EXCEPTION );
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293 #endif /* XPAR_MICROBLAZE_0_M_AXI_I_BUS_EXCEPTION*/
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295 #if XPAR_MICROBLAZE_0_M_AXI_D_BUS_EXCEPTION == 1
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296 microblaze_register_exception_handler( XEXC_ID_M_AXI_D_EXCEPTION, vPortExceptionHandlerEntry, ( void * ) XEXC_ID_M_AXI_D_EXCEPTION );
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297 #endif /* XPAR_MICROBLAZE_0_M_AXI_D_BUS_EXCEPTION*/
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299 #if XPAR_MICROBLAZE_0_IPLB_BUS_EXCEPTION == 1
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300 microblaze_register_exception_handler( XEXC_ID_IPLB_EXCEPTION, vPortExceptionHandlerEntry, ( void * ) XEXC_ID_IPLB_EXCEPTION );
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301 #endif /* XPAR_MICROBLAZE_0_IPLB_BUS_EXCEPTION*/
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303 #if XPAR_MICROBLAZE_0_DPLB_BUS_EXCEPTION == 1
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304 microblaze_register_exception_handler( XEXC_ID_DPLB_EXCEPTION, vPortExceptionHandlerEntry, ( void * ) XEXC_ID_DPLB_EXCEPTION );
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305 #endif /* XPAR_MICROBLAZE_0_DPLB_BUS_EXCEPTION*/
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307 #if XPAR_MICROBLAZE_0_DIV_ZERO_EXCEPTION == 1
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308 microblaze_register_exception_handler( XEXC_ID_DIV_BY_ZERO, vPortExceptionHandlerEntry, ( void * ) XEXC_ID_DIV_BY_ZERO );
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309 #endif /* XPAR_MICROBLAZE_0_DIV_ZERO_EXCEPTION*/
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311 #if XPAR_MICROBLAZE_0_FPU_EXCEPTION == 1
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312 microblaze_register_exception_handler( XEXC_ID_FPU, vPortExceptionHandlerEntry, ( void * ) XEXC_ID_FPU );
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313 #endif /* XPAR_MICROBLAZE_0_FPU_EXCEPTION*/
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315 #if XPAR_MICROBLAZE_0_FSL_EXCEPTION == 1
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316 microblaze_register_exception_handler( XEXC_ID_FSL, vPortExceptionHandlerEntry, ( void * ) XEXC_ID_FSL );
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317 #endif /* XPAR_MICROBLAZE_0_FSL_EXCEPTION*/
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321 /* Exclude the entire file if the MicroBlaze is not configured to handle
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322 exceptions, or the application defined configuration item
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323 configINSTALL_EXCEPTION_HANDLERS is not set to 1. */
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324 #endif /* ( MICROBLAZE_EXCEPTIONS_ENABLED == 1 ) && ( configINSTALL_EXCEPTION_HANDLERS == 1 ) */
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