2 FreeRTOS V8.2.0rc1 - Copyright (C) 2014 Real Time Engineers Ltd.
\r
5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
\r
7 This file is part of the FreeRTOS distribution.
\r
9 FreeRTOS is free software; you can redistribute it and/or modify it under
\r
10 the terms of the GNU General Public License (version 2) as published by the
\r
11 Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
\r
13 >>! NOTE: The modification to the GPL is included to allow you to !<<
\r
14 >>! distribute a combined work that includes FreeRTOS without being !<<
\r
15 >>! obliged to provide the source code for proprietary components !<<
\r
16 >>! outside of the FreeRTOS kernel. !<<
\r
18 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
\r
19 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
\r
20 FOR A PARTICULAR PURPOSE. Full license text is available on the following
\r
21 link: http://www.freertos.org/a00114.html
\r
25 ***************************************************************************
\r
27 * Having a problem? Start by reading the FAQ "My application does *
\r
28 * not run, what could be wrong?". Have you defined configASSERT()? *
\r
30 * http://www.FreeRTOS.org/FAQHelp.html *
\r
32 ***************************************************************************
\r
34 ***************************************************************************
\r
36 * FreeRTOS provides completely free yet professionally developed, *
\r
37 * robust, strictly quality controlled, supported, and cross *
\r
38 * platform software that is more than just the market leader, it *
\r
39 * is the industry's de facto standard. *
\r
41 * Help yourself get started quickly while simultaneously helping *
\r
42 * to support the FreeRTOS project by purchasing a FreeRTOS *
\r
43 * tutorial book, reference manual, or both: *
\r
44 * http://www.FreeRTOS.org/Documentation *
\r
46 ***************************************************************************
\r
48 ***************************************************************************
\r
50 * Investing in training allows your team to be as productive as *
\r
51 * possible as early as possible, lowering your overall development *
\r
52 * cost, and enabling you to bring a more robust product to market *
\r
53 * earlier than would otherwise be possible. Richard Barry is both *
\r
54 * the architect and key author of FreeRTOS, and so also the world's *
\r
55 * leading authority on what is the world's most popular real time *
\r
56 * kernel for deeply embedded MCU designs. Obtaining your training *
\r
57 * from Richard ensures your team will gain directly from his in-depth *
\r
58 * product knowledge and years of usage experience. Contact Real Time *
\r
59 * Engineers Ltd to enquire about the FreeRTOS Masterclass, presented *
\r
60 * by Richard Barry: http://www.FreeRTOS.org/contact
\r
62 ***************************************************************************
\r
64 ***************************************************************************
\r
66 * You are receiving this top quality software for free. Please play *
\r
67 * fair and reciprocate by reporting any suspected issues and *
\r
68 * participating in the community forum: *
\r
69 * http://www.FreeRTOS.org/support *
\r
73 ***************************************************************************
\r
75 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
\r
76 license and Real Time Engineers Ltd. contact details.
\r
78 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
\r
79 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
\r
80 compatible FAT file system, and our tiny thread aware UDP/IP stack.
\r
82 http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
\r
83 Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
\r
85 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
\r
86 Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
\r
87 licenses offer ticketed support, indemnification and commercial middleware.
\r
89 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
\r
90 engineered and independently SIL3 certified version for use in safety and
\r
91 mission critical applications that require provable dependability.
\r
96 /* FreeRTOS includes. */
\r
97 #include "FreeRTOSConfig.h"
\r
99 /* Xilinx library includes. */
\r
100 #include "microblaze_exceptions_g.h"
\r
101 #include "xparameters.h"
\r
103 /* The context is oversized to allow functions called from the ISR to write
\r
104 back into the caller stack. */
\r
105 #if XPAR_MICROBLAZE_0_USE_FPU != 0
\r
106 #define portCONTEXT_SIZE 136
\r
107 #define portMINUS_CONTEXT_SIZE -136
\r
109 #define portCONTEXT_SIZE 132
\r
110 #define portMINUS_CONTEXT_SIZE -132
\r
113 /* Offsets from the stack pointer at which saved registers are placed. */
\r
114 #define portR31_OFFSET 4
\r
115 #define portR30_OFFSET 8
\r
116 #define portR29_OFFSET 12
\r
117 #define portR28_OFFSET 16
\r
118 #define portR27_OFFSET 20
\r
119 #define portR26_OFFSET 24
\r
120 #define portR25_OFFSET 28
\r
121 #define portR24_OFFSET 32
\r
122 #define portR23_OFFSET 36
\r
123 #define portR22_OFFSET 40
\r
124 #define portR21_OFFSET 44
\r
125 #define portR20_OFFSET 48
\r
126 #define portR19_OFFSET 52
\r
127 #define portR18_OFFSET 56
\r
128 #define portR17_OFFSET 60
\r
129 #define portR16_OFFSET 64
\r
130 #define portR15_OFFSET 68
\r
131 #define portR14_OFFSET 72
\r
132 #define portR13_OFFSET 76
\r
133 #define portR12_OFFSET 80
\r
134 #define portR11_OFFSET 84
\r
135 #define portR10_OFFSET 88
\r
136 #define portR9_OFFSET 92
\r
137 #define portR8_OFFSET 96
\r
138 #define portR7_OFFSET 100
\r
139 #define portR6_OFFSET 104
\r
140 #define portR5_OFFSET 108
\r
141 #define portR4_OFFSET 112
\r
142 #define portR3_OFFSET 116
\r
143 #define portR2_OFFSET 120
\r
144 #define portCRITICAL_NESTING_OFFSET 124
\r
145 #define portMSR_OFFSET 128
\r
146 #define portFSR_OFFSET 132
\r
148 .extern pxCurrentTCB
\r
149 .extern XIntc_DeviceInterruptHandler
\r
150 .extern vTaskSwitchContext
\r
151 .extern uxCriticalNesting
\r
152 .extern pulISRStack
\r
153 .extern ulTaskSwitchRequested
\r
154 .extern vPortExceptionHandler
\r
155 .extern pulStackPointerOnFunctionEntry
\r
157 .global _interrupt_handler
\r
158 .global VPortYieldASM
\r
159 .global vPortStartFirstTask
\r
160 .global vPortExceptionHandlerEntry
\r
163 .macro portSAVE_CONTEXT
\r
165 /* Make room for the context on the stack. */
\r
166 addik r1, r1, portMINUS_CONTEXT_SIZE
\r
168 /* Stack general registers. */
\r
169 swi r31, r1, portR31_OFFSET
\r
170 swi r30, r1, portR30_OFFSET
\r
171 swi r29, r1, portR29_OFFSET
\r
172 swi r28, r1, portR28_OFFSET
\r
173 swi r27, r1, portR27_OFFSET
\r
174 swi r26, r1, portR26_OFFSET
\r
175 swi r25, r1, portR25_OFFSET
\r
176 swi r24, r1, portR24_OFFSET
\r
177 swi r23, r1, portR23_OFFSET
\r
178 swi r22, r1, portR22_OFFSET
\r
179 swi r21, r1, portR21_OFFSET
\r
180 swi r20, r1, portR20_OFFSET
\r
181 swi r19, r1, portR19_OFFSET
\r
182 swi r18, r1, portR18_OFFSET
\r
183 swi r17, r1, portR17_OFFSET
\r
184 swi r16, r1, portR16_OFFSET
\r
185 swi r15, r1, portR15_OFFSET
\r
186 /* R14 is saved later as it needs adjustment if a yield is performed. */
\r
187 swi r13, r1, portR13_OFFSET
\r
188 swi r12, r1, portR12_OFFSET
\r
189 swi r11, r1, portR11_OFFSET
\r
190 swi r10, r1, portR10_OFFSET
\r
191 swi r9, r1, portR9_OFFSET
\r
192 swi r8, r1, portR8_OFFSET
\r
193 swi r7, r1, portR7_OFFSET
\r
194 swi r6, r1, portR6_OFFSET
\r
195 swi r5, r1, portR5_OFFSET
\r
196 swi r4, r1, portR4_OFFSET
\r
197 swi r3, r1, portR3_OFFSET
\r
198 swi r2, r1, portR2_OFFSET
\r
200 /* Stack the critical section nesting value. */
\r
201 lwi r18, r0, uxCriticalNesting
\r
202 swi r18, r1, portCRITICAL_NESTING_OFFSET
\r
206 swi r18, r1, portMSR_OFFSET
\r
208 #if XPAR_MICROBLAZE_0_USE_FPU != 0
\r
211 swi r18, r1, portFSR_OFFSET
\r
214 /* Save the top of stack value to the TCB. */
\r
215 lwi r3, r0, pxCurrentTCB
\r
220 .macro portRESTORE_CONTEXT
\r
222 /* Load the top of stack value from the TCB. */
\r
223 lwi r18, r0, pxCurrentTCB
\r
226 /* Restore the general registers. */
\r
227 lwi r31, r1, portR31_OFFSET
\r
228 lwi r30, r1, portR30_OFFSET
\r
229 lwi r29, r1, portR29_OFFSET
\r
230 lwi r28, r1, portR28_OFFSET
\r
231 lwi r27, r1, portR27_OFFSET
\r
232 lwi r26, r1, portR26_OFFSET
\r
233 lwi r25, r1, portR25_OFFSET
\r
234 lwi r24, r1, portR24_OFFSET
\r
235 lwi r23, r1, portR23_OFFSET
\r
236 lwi r22, r1, portR22_OFFSET
\r
237 lwi r21, r1, portR21_OFFSET
\r
238 lwi r20, r1, portR20_OFFSET
\r
239 lwi r19, r1, portR19_OFFSET
\r
240 lwi r17, r1, portR17_OFFSET
\r
241 lwi r16, r1, portR16_OFFSET
\r
242 lwi r15, r1, portR15_OFFSET
\r
243 lwi r14, r1, portR14_OFFSET
\r
244 lwi r13, r1, portR13_OFFSET
\r
245 lwi r12, r1, portR12_OFFSET
\r
246 lwi r11, r1, portR11_OFFSET
\r
247 lwi r10, r1, portR10_OFFSET
\r
248 lwi r9, r1, portR9_OFFSET
\r
249 lwi r8, r1, portR8_OFFSET
\r
250 lwi r7, r1, portR7_OFFSET
\r
251 lwi r6, r1, portR6_OFFSET
\r
252 lwi r5, r1, portR5_OFFSET
\r
253 lwi r4, r1, portR4_OFFSET
\r
254 lwi r3, r1, portR3_OFFSET
\r
255 lwi r2, r1, portR2_OFFSET
\r
257 /* Reload the rmsr from the stack. */
\r
258 lwi r18, r1, portMSR_OFFSET
\r
261 #if XPAR_MICROBLAZE_0_USE_FPU != 0
\r
262 /* Reload the FSR from the stack. */
\r
263 lwi r18, r1, portFSR_OFFSET
\r
267 /* Load the critical nesting value. */
\r
268 lwi r18, r1, portCRITICAL_NESTING_OFFSET
\r
269 swi r18, r0, uxCriticalNesting
\r
271 /* Test the critical nesting value. If it is non zero then the task last
\r
272 exited the running state using a yield. If it is zero, then the task
\r
273 last exited the running state through an interrupt. */
\r
275 bnei r18, exit_from_yield
\r
277 /* r18 was being used as a temporary. Now restore its true value from the
\r
279 lwi r18, r1, portR18_OFFSET
\r
281 /* Remove the stack frame. */
\r
282 addik r1, r1, portCONTEXT_SIZE
\r
284 /* Return using rtid so interrupts are re-enabled as this function is
\r
291 /* This function is used to exit portRESTORE_CONTEXT() if the task being
\r
292 returned to last left the Running state by calling taskYIELD() (rather than
\r
293 being preempted by an interrupt). */
\r
298 /* r18 was being used as a temporary. Now restore its true value from the
\r
300 lwi r18, r1, portR18_OFFSET
\r
302 /* Remove the stack frame. */
\r
303 addik r1, r1, portCONTEXT_SIZE
\r
305 /* Return to the task. */
\r
312 _interrupt_handler:
\r
316 /* Stack the return address. */
\r
317 swi r14, r1, portR14_OFFSET
\r
319 /* Switch to the ISR stack. */
\r
320 lwi r1, r0, pulISRStack
\r
322 /* The parameter to the interrupt handler. */
\r
323 ori r5, r0, configINTERRUPT_CONTROLLER_TO_USE
\r
325 /* Execute any pending interrupts. */
\r
326 bralid r15, XIntc_DeviceInterruptHandler
\r
329 /* See if a new task should be selected to execute. */
\r
330 lwi r18, r0, ulTaskSwitchRequested
\r
333 /* If ulTaskSwitchRequested is already zero, then jump straight to
\r
334 restoring the task that is already in the Running state. */
\r
335 beqi r18, task_switch_not_requested
\r
337 /* Set ulTaskSwitchRequested back to zero as a task switch is about to be
\r
339 swi r0, r0, ulTaskSwitchRequested
\r
341 /* ulTaskSwitchRequested was not 0 when tested. Select the next task to
\r
343 bralid r15, vTaskSwitchContext
\r
346 task_switch_not_requested:
\r
348 /* Restore the context of the next task scheduled to execute. */
\r
349 portRESTORE_CONTEXT
\r
358 /* Modify the return address so a return is done to the instruction after
\r
359 the call to VPortYieldASM. */
\r
361 swi r14, r1, portR14_OFFSET
\r
363 /* Switch to use the ISR stack. */
\r
364 lwi r1, r0, pulISRStack
\r
366 /* Select the next task to execute. */
\r
367 bralid r15, vTaskSwitchContext
\r
370 /* Restore the context of the next task scheduled to execute. */
\r
371 portRESTORE_CONTEXT
\r
375 vPortStartFirstTask:
\r
377 portRESTORE_CONTEXT
\r
381 #if MICROBLAZE_EXCEPTIONS_ENABLED == 1
\r
385 vPortExceptionHandlerEntry:
\r
387 /* Take a copy of the stack pointer before vPortExecptionHandler is called,
\r
388 storing its value prior to the function stack frame being created. */
\r
389 swi r1, r0, pulStackPointerOnFunctionEntry
\r
390 bralid r15, vPortExceptionHandler
\r
393 #endif /* MICROBLAZE_EXCEPTIONS_ENABLED */
\r