2 FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 This file is part of the FreeRTOS distribution.
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9 FreeRTOS is free software; you can redistribute it and/or modify it under
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10 the terms of the GNU General Public License (version 2) as published by the
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11 Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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13 ***************************************************************************
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14 >>! NOTE: The modification to the GPL is included to allow you to !<<
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15 >>! distribute a combined work that includes FreeRTOS without being !<<
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16 >>! obliged to provide the source code for proprietary components !<<
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17 >>! outside of the FreeRTOS kernel. !<<
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18 ***************************************************************************
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20 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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21 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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22 FOR A PARTICULAR PURPOSE. Full license text is available on the following
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23 link: http://www.freertos.org/a00114.html
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25 ***************************************************************************
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27 * FreeRTOS provides completely free yet professionally developed, *
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28 * robust, strictly quality controlled, supported, and cross *
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29 * platform software that is more than just the market leader, it *
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30 * is the industry's de facto standard. *
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32 * Help yourself get started quickly while simultaneously helping *
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33 * to support the FreeRTOS project by purchasing a FreeRTOS *
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34 * tutorial book, reference manual, or both: *
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35 * http://www.FreeRTOS.org/Documentation *
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37 ***************************************************************************
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39 http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
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40 the FAQ page "My application does not run, what could be wrong?". Have you
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41 defined configASSERT()?
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43 http://www.FreeRTOS.org/support - In return for receiving this top quality
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44 embedded software for free we request you assist our global community by
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45 participating in the support forum.
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47 http://www.FreeRTOS.org/training - Investing in training allows your team to
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48 be as productive as possible as early as possible. Now you can receive
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49 FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
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50 Ltd, and the world's leading authority on the world's leading RTOS.
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52 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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53 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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54 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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56 http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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57 Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
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59 http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
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60 Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
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61 licenses offer ticketed support, indemnification and commercial middleware.
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63 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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64 engineered and independently SIL3 certified version for use in safety and
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65 mission critical applications that require provable dependability.
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70 /*-----------------------------------------------------------
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71 * Implementation of functions defined in portable.h for the PPC405 port.
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72 *----------------------------------------------------------*/
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75 /* Scheduler includes. */
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76 #include "FreeRTOS.h"
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79 /* Library includes. */
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80 #include "xtime_l.h"
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82 #include "xintc_i.h"
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84 /*-----------------------------------------------------------*/
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86 /* Definitions to set the initial MSR of each task. */
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87 #define portCRITICAL_INTERRUPT_ENABLE ( 1UL << 17UL )
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88 #define portEXTERNAL_INTERRUPT_ENABLE ( 1UL << 15UL )
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89 #define portMACHINE_CHECK_ENABLE ( 1UL << 12UL )
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91 #if configUSE_FPU == 1
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92 #define portAPU_PRESENT ( 1UL << 25UL )
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93 #define portFCM_FPU_PRESENT ( 1UL << 13UL )
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95 #define portAPU_PRESENT ( 0UL )
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96 #define portFCM_FPU_PRESENT ( 0UL )
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99 #define portINITIAL_MSR ( portCRITICAL_INTERRUPT_ENABLE | portEXTERNAL_INTERRUPT_ENABLE | portMACHINE_CHECK_ENABLE | portAPU_PRESENT | portFCM_FPU_PRESENT )
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102 extern const unsigned _SDA_BASE_;
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103 extern const unsigned _SDA2_BASE_;
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105 /*-----------------------------------------------------------*/
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108 * Setup the system timer to generate the tick interrupt.
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110 static void prvSetupTimerInterrupt( void );
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113 * The handler for the tick interrupt - defined in portasm.s.
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115 extern void vPortTickISR( void );
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118 * The handler for the yield function - defined in portasm.s.
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120 extern void vPortYield( void );
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123 * Function to start the scheduler running by starting the highest
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124 * priority task that has thus far been created.
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126 extern void vPortStartFirstTask( void );
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128 /*-----------------------------------------------------------*/
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130 /* Structure used to hold the state of the interrupt controller. */
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131 static XIntc xInterruptController;
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133 /*-----------------------------------------------------------*/
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136 * Initialise the stack of a task to look exactly as if the task had been
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139 * See the header file portable.h.
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141 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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143 /* Place a known value at the bottom of the stack for debugging. */
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144 *pxTopOfStack = 0xDEADBEEF;
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147 /* EABI stack frame. */
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148 pxTopOfStack -= 20; /* Previous backchain and LR, R31 to R4 inclusive. */
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150 /* Parameters in R13. */
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151 *pxTopOfStack = ( StackType_t ) &_SDA_BASE_; /* address of the first small data area */
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152 pxTopOfStack -= 10;
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154 /* Parameters in R3. */
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155 *pxTopOfStack = ( StackType_t ) pvParameters;
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158 /* Parameters in R2. */
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159 *pxTopOfStack = ( StackType_t ) &_SDA2_BASE_; /* address of the second small data area */
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162 /* R1 is the stack pointer so is omitted. */
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164 *pxTopOfStack = 0x10000001UL;; /* R0. */
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166 *pxTopOfStack = 0x00000000UL; /* USPRG0. */
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168 *pxTopOfStack = 0x00000000UL; /* CR. */
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170 *pxTopOfStack = 0x00000000UL; /* XER. */
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172 *pxTopOfStack = 0x00000000UL; /* CTR. */
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174 *pxTopOfStack = ( StackType_t ) vPortEndScheduler; /* LR. */
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176 *pxTopOfStack = ( StackType_t ) pxCode; /* SRR0. */
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178 *pxTopOfStack = portINITIAL_MSR;/* SRR1. */
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180 *pxTopOfStack = ( StackType_t ) vPortEndScheduler;/* Next LR. */
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182 *pxTopOfStack = 0x00000000UL;/* Backchain. */
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184 return pxTopOfStack;
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186 /*-----------------------------------------------------------*/
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188 BaseType_t xPortStartScheduler( void )
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190 prvSetupTimerInterrupt();
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191 XExc_RegisterHandler( XEXC_ID_SYSTEM_CALL, ( XExceptionHandler ) vPortYield, ( void * ) 0 );
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192 vPortStartFirstTask();
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194 /* Should not get here as the tasks are now running! */
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197 /*-----------------------------------------------------------*/
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199 void vPortEndScheduler( void )
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201 /* Not implemented. */
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204 /*-----------------------------------------------------------*/
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207 * Hardware initialisation to generate the RTOS tick.
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209 static void prvSetupTimerInterrupt( void )
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211 const uint32_t ulInterval = ( ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL );
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213 XTime_PITClearInterrupt();
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214 XTime_FITClearInterrupt();
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215 XTime_WDTClearInterrupt();
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216 XTime_WDTDisableInterrupt();
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217 XTime_FITDisableInterrupt();
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219 XExc_RegisterHandler( XEXC_ID_PIT_INT, ( XExceptionHandler ) vPortTickISR, ( void * ) 0 );
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221 XTime_PITEnableAutoReload();
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222 XTime_PITSetInterval( ulInterval );
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223 XTime_PITEnableInterrupt();
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225 /*-----------------------------------------------------------*/
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227 void vPortISRHandler( void *pvNullDoNotUse )
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229 uint32_t ulInterruptStatus, ulInterruptMask = 1UL;
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230 BaseType_t xInterruptNumber;
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231 XIntc_Config *pxInterruptController;
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232 XIntc_VectorTableEntry *pxTable;
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234 /* Just to remove compiler warning. */
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235 ( void ) pvNullDoNotUse;
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237 /* Get the configuration by using the device ID - in this case it is
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238 assumed that only one interrupt controller is being used. */
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239 pxInterruptController = &XIntc_ConfigTable[ XPAR_XPS_INTC_0_DEVICE_ID ];
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241 /* Which interrupts are pending? */
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242 ulInterruptStatus = XIntc_mGetIntrStatus( pxInterruptController->BaseAddress );
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244 for( xInterruptNumber = 0; xInterruptNumber < XPAR_INTC_MAX_NUM_INTR_INPUTS; xInterruptNumber++ )
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246 if( ulInterruptStatus & 0x01UL )
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248 /* Clear the pending interrupt. */
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249 XIntc_mAckIntr( pxInterruptController->BaseAddress, ulInterruptMask );
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251 /* Call the registered handler. */
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252 pxTable = &( pxInterruptController->HandlerTable[ xInterruptNumber ] );
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253 pxTable->Handler( pxTable->CallBackRef );
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256 /* Check the next interrupt. */
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257 ulInterruptMask <<= 0x01UL;
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258 ulInterruptStatus >>= 0x01UL;
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260 /* Have we serviced all interrupts? */
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261 if( ulInterruptStatus == 0UL )
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267 /*-----------------------------------------------------------*/
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269 void vPortSetupInterruptController( void )
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271 extern void vPortISRWrapper( void );
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273 /* Perform all library calls necessary to initialise the exception table
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274 and interrupt controller. This assumes only one interrupt controller is in
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276 XExc_mDisableExceptions( XEXC_NON_CRITICAL );
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279 /* The library functions save the context - we then jump to a wrapper to
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280 save the stack into the TCB. The wrapper then calls the handler defined
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282 XExc_RegisterHandler( XEXC_ID_NON_CRITICAL_INT, ( XExceptionHandler ) vPortISRWrapper, NULL );
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283 XIntc_Initialize( &xInterruptController, XPAR_XPS_INTC_0_DEVICE_ID );
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284 XIntc_Start( &xInterruptController, XIN_REAL_MODE );
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286 /*-----------------------------------------------------------*/
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288 BaseType_t xPortInstallInterruptHandler( uint8_t ucInterruptID, XInterruptHandler pxHandler, void *pvCallBackRef )
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290 BaseType_t xReturn = pdFAIL;
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292 /* This function is defined here so the scope of xInterruptController can
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293 remain within this file. */
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295 if( XST_SUCCESS == XIntc_Connect( &xInterruptController, ucInterruptID, pxHandler, pvCallBackRef ) )
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297 XIntc_Enable( &xInterruptController, ucInterruptID );
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