2 * FreeRTOS Kernel V10.1.1
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3 * Copyright (C) 2018 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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5 * Permission is hereby granted, free of charge, to any person obtaining a copy of
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6 * this software and associated documentation files (the "Software"), to deal in
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7 * the Software without restriction, including without limitation the rights to
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8 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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9 * the Software, and to permit persons to whom the Software is furnished to do so,
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10 * subject to the following conditions:
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12 * The above copyright notice and this permission notice shall be included in all
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13 * copies or substantial portions of the Software.
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15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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17 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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18 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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19 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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20 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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22 * http://www.FreeRTOS.org
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23 * http://aws.amazon.com/freertos
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25 * 1 tab == 4 spaces!
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28 /*-----------------------------------------------------------
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29 * Implementation of functions defined in portable.h for the RISC-V RV32 port.
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30 *----------------------------------------------------------*/
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32 /* Scheduler includes. */
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33 #include "FreeRTOS.h"
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35 #include "portmacro.h"
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37 #ifdef configISR_STACK_SIZE
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38 /* The stack used by interrupt service routines. */
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39 static __attribute__ ((aligned(16))) StackType_t xISRStack[ configISR_STACK_SIZE ] = { 0 };
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40 const StackType_t * const xISRStackTop = &( xISRStack[ ( configISR_STACK_SIZE & ~portBYTE_ALIGNMENT_MASK ) - 1 ] );
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42 extern const uint32_t __freertos_irq_stack_top[];
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43 const uint32_t xISRStackTop = ( uint32_t ) __freertos_irq_stack_top;
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47 * Setup the timer to generate the tick interrupts. The implementation in this
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48 * file is weak to allow application writers to change the timer used to
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49 * generate the tick interrupt.
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51 void vPortSetupTimerInterrupt( void ) __attribute__(( weak ));
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54 * Used to catch tasks that attempt to return from their implementing function.
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56 static void prvTaskExitError( void );
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58 /*-----------------------------------------------------------*/
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60 /* Used to program the machine timer compare register. */
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61 uint64_t ullNextTime = 0ULL;
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62 const uint64_t *pullNextTime = &ullNextTime;
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63 const uint32_t ulTimerIncrementsForOneTick = ( uint32_t ) ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ); /* Assumes increment won't go over 32-bits. */
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64 volatile uint64_t * const pullMachineTimerCompareRegister = ( volatile uint64_t * const ) ( configCLINT_BASE_ADDRESS + 0x4000 );
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66 /* Set configCHECK_FOR_STACK_OVERFLOW to 3 to add ISR stack checking to task
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67 stack checking. A problem in the ISR stack will trigger an assert, not call the
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68 stack overflow hook function (because the stack overflow hook is specific to a
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69 task stack, not the ISR stack). */
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70 #if( configCHECK_FOR_STACK_OVERFLOW > 2 )
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71 #warning This path not tested, or even compiled yet.
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72 /* Don't use 0xa5 as the stack fill bytes as that is used by the kernerl for
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73 the task stacks, and so will legitimately appear in many positions within
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75 #define portISR_STACK_FILL_BYTE 0xee
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77 static const uint8_t ucExpectedStackBytes[] = {
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78 portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
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79 portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
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80 portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
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81 portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
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82 portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE }; \
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84 #define portCHECK_ISR_STACK() configASSERT( ( memcmp( ( void * ) xISRStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) == 0 ) )
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86 /* Define the function away. */
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87 #define portCHECK_ISR_STACK()
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88 #endif /* configCHECK_FOR_STACK_OVERFLOW > 2 */
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90 /*-----------------------------------------------------------*/
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92 void prvTaskExitError( void )
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94 volatile uint32_t ulx = 0;
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96 /* A function that implements a task must not exit or attempt to return to
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97 its caller as there is nothing to return to. If a task wants to exit it
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98 should instead call vTaskDelete( NULL ).
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100 Artificially force an assert() to be triggered if configASSERT() is
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101 defined, then stop here so application writers can catch the error. */
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102 configASSERT( ulx == ~0UL );
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103 portDISABLE_INTERRUPTS();
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106 /*-----------------------------------------------------------*/
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109 * See header file for description.
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111 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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114 const uint32_t ulMPIE_Bit = 0x80, ulMPP_Bits = 0x1800;
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116 X1 to X31 integer registers for the 'I' profile, X1 to X15 for the 'E' profile.
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118 Register ABI Name Description Saver
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119 x0 zero Hard-wired zero -
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120 x1 ra Return address Caller
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121 x2 sp Stack pointer Callee
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122 x3 gp Global pointer -
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123 x4 tp Thread pointer -
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124 x5-7 t0-2 Temporaries Caller
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125 x8 s0/fp Saved register/Frame pointer Callee
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126 x9 s1 Saved register Callee
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127 x10-11 a0-1 Function Arguments/return values Caller
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128 x12-17 a2-7 Function arguments Caller
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129 x18-27 s2-11 Saved registers Callee
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130 x28-31 t3-6 Temporaries Caller
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133 /* Start task with interrupt enabled. */
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134 __asm volatile ("csrr %0, mstatus" : "=r"(mstatus));
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135 mstatus |= ulMPIE_Bit | ulMPP_Bits;
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137 *pxTopOfStack = mstatus;
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139 /* Numbers correspond to the x register number. */
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141 *pxTopOfStack = ( StackType_t ) 31;
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143 *pxTopOfStack = ( StackType_t ) 30;
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145 *pxTopOfStack = ( StackType_t ) 29;
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147 *pxTopOfStack = ( StackType_t ) 28;
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149 *pxTopOfStack = ( StackType_t ) 27;
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151 *pxTopOfStack = ( StackType_t ) 26;
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153 *pxTopOfStack = ( StackType_t ) 25;
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155 *pxTopOfStack = ( StackType_t ) 24;
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157 *pxTopOfStack = ( StackType_t ) 23;
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159 *pxTopOfStack = ( StackType_t ) 22;
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161 *pxTopOfStack = ( StackType_t ) 21;
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163 *pxTopOfStack = ( StackType_t ) 20;
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165 *pxTopOfStack = ( StackType_t ) 19;
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167 *pxTopOfStack = ( StackType_t ) 18;
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169 *pxTopOfStack = ( StackType_t ) 17;
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171 *pxTopOfStack = ( StackType_t ) 16;
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173 *pxTopOfStack = ( StackType_t ) 15;
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175 *pxTopOfStack = ( StackType_t ) 14;
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177 *pxTopOfStack = ( StackType_t ) 13;
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179 *pxTopOfStack = ( StackType_t ) 12;
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181 *pxTopOfStack = ( StackType_t ) 11;
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183 *pxTopOfStack = ( StackType_t ) pvParameters;
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185 *pxTopOfStack = ( StackType_t ) 9;
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187 *pxTopOfStack = ( StackType_t ) 8;
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189 *pxTopOfStack = ( StackType_t ) 7;
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191 *pxTopOfStack = ( StackType_t ) 6;
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193 *pxTopOfStack = ( StackType_t ) 5;
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195 // *pxTopOfStack = ( StackType_t ) 4; /* Thread pointer. */
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197 // *pxTopOfStack = ( StackType_t ) 3; /* Global pointer. */
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199 // *pxTopOfStack = ( StackType_t ) 2; /* Stack pointer. */
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201 *pxTopOfStack = ( StackType_t ) prvTaskExitError;
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203 *pxTopOfStack = ( StackType_t ) pxCode;
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205 return pxTopOfStack;
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207 /*-----------------------------------------------------------*/
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209 #if( configCLINT_BASE_ADDRESS != 0 )
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211 void vPortSetupTimerInterrupt( void )
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213 uint32_t ulCurrentTimeHigh, ulCurrentTimeLow;
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214 volatile uint32_t * const pulTimeHigh = ( volatile uint32_t * const ) ( configCLINT_BASE_ADDRESS + 0xBFFC );
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215 volatile uint32_t * const pulTimeLow = ( volatile uint32_t * const ) ( configCLINT_BASE_ADDRESS + 0xBFF8 );
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219 ulCurrentTimeHigh = *pulTimeHigh;
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220 ulCurrentTimeLow = *pulTimeLow;
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221 } while( ulCurrentTimeHigh != *pulTimeHigh );
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223 ullNextTime = ( uint64_t ) ulCurrentTimeHigh;
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224 ullNextTime <<= 32ULL;
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225 ullNextTime |= ( uint64_t ) ulCurrentTimeLow;
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226 ullNextTime += ( uint64_t ) ulTimerIncrementsForOneTick;
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227 *pullMachineTimerCompareRegister = ullNextTime;
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229 /* Prepare the time to use after the next tick interrupt. */
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230 ullNextTime += ( uint64_t ) ulTimerIncrementsForOneTick;
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233 #endif /* ( configCLINT_BASE_ADDRESS != 0 ) */
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234 /*-----------------------------------------------------------*/
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236 BaseType_t xPortStartScheduler( void )
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238 extern void xPortStartFirstTask( void );
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240 #if( configASSERT_DEFINED == 1 )
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242 volatile uint32_t mtvec = 0;
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244 /* Check the least significant two bits of mtvec are 00 - indicating
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245 single vector mode. */
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246 __asm volatile( "csrr %0, mtvec" : "=r"( mtvec ) );
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247 configASSERT( ( mtvec & 0x03UL ) == 0 );
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249 /* Check alignment of the interrupt stack - which is the same as the
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250 stack that was being used by main() prior to the scheduler being
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252 configASSERT( ( xISRStackTop & portBYTE_ALIGNMENT_MASK ) == 0 );
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254 #endif /* configASSERT_DEFINED */
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256 /* If there is a CLINT then it is ok to use the default implementation
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257 in this file, otherwise vPortSetupTimerInterrupt() must be implemented to
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258 configure whichever clock is to be used to generate the tick interrupt. */
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259 vPortSetupTimerInterrupt();
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261 #if( configCLINT_BASE_ADDRESS != 0 )
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263 /* Enable mtime and external interrupts. 1<<7 for timer interrupt, 1<<11
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264 for external interrupt. _RB_ What happens here when mtime is not present as
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266 __asm volatile( "csrs mie, %0" :: "r"(0x880) );
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270 /* Enable external interrupts. */
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271 __asm volatile( "csrs mie, %0" :: "r"(0x800) );
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273 #endif /* configCLINT_BASE_ADDRESS */
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275 xPortStartFirstTask();
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277 /* Should not get here as after calling xPortStartFirstTask() only tasks
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278 should be executing. */
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281 /*-----------------------------------------------------------*/
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283 void vPortEndScheduler( void )
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285 /* Not implemented. */
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