2 * FreeRTOS Kernel V10.1.1
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3 * Copyright (C) 2018 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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5 * Permission is hereby granted, free of charge, to any person obtaining a copy of
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6 * this software and associated documentation files (the "Software"), to deal in
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7 * the Software without restriction, including without limitation the rights to
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8 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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9 * the Software, and t
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11 o permit persons to whom the Software is furnished to do so,
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12 * subject to the following conditions:
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14 * The above copyright notice and this permission notice shall be included in all
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15 * copies or substantial portions of the Software.
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17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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19 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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20 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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21 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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24 * http://www.FreeRTOS.org
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25 * http://aws.amazon.com/freertos
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27 * 1 tab == 4 spaces!
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30 #if __riscv_xlen == 64
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31 #error Not implemented yet - change lw to ld, and sw to sd.
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33 #elif __riscv_xlen == 32
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36 #error Assembler has not defined __riscv_xlen
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39 #define CONTEXT_SIZE ( 30 * WORD_SIZE )
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41 .global xPortStartFirstTask
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42 .global vPortTrapHandler
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43 .extern pxCurrentTCB
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44 .extern ulPortTrapHandler
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45 .extern vTaskSwitchContext
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46 .extern Timer_IRQHandler
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49 .extern pullMachineTimerCompareRegister
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50 .extern pullNextTime
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51 .extern ulTimerIncrementsForOneTick
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52 .extern xISRStackTop
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54 /*-----------------------------------------------------------*/
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57 xPortStartFirstTask:
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59 la t0, vPortTrapHandler
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62 lw sp, pxCurrentTCB /* Load pxCurrentTCB. */
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63 lw sp, 0( sp ) /* Read sp from first TCB member. */
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65 lw x1, 0( sp ) /* Note for starting the scheduler the exception return address is used as the function return address. */
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66 lw x5, 2 * WORD_SIZE( sp ) /* t0 */
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67 lw x6, 3 * WORD_SIZE( sp ) /* t1 */
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68 lw x7, 4 * WORD_SIZE( sp ) /* t2 */
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69 lw x8, 5 * WORD_SIZE( sp ) /* s0/fp */
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70 lw x9, 6 * WORD_SIZE( sp ) /* s1 */
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71 lw x10, 7 * WORD_SIZE( sp ) /* a0 */
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72 lw x11, 8 * WORD_SIZE( sp ) /* a1 */
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73 lw x12, 9 * WORD_SIZE( sp ) /* a2 */
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74 lw x13, 10 * WORD_SIZE( sp ) /* a3 */
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75 lw x14, 11 * WORD_SIZE( sp ) /* a4 */
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76 lw x15, 12 * WORD_SIZE( sp ) /* a5 */
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77 lw x16, 13 * WORD_SIZE( sp ) /* a6 */
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78 lw x17, 14 * WORD_SIZE( sp ) /* a7 */
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79 lw x18, 15 * WORD_SIZE( sp ) /* s2 */
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80 lw x19, 16 * WORD_SIZE( sp ) /* s3 */
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81 lw x20, 17 * WORD_SIZE( sp ) /* s4 */
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82 lw x21, 18 * WORD_SIZE( sp ) /* s5 */
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83 lw x22, 19 * WORD_SIZE( sp ) /* s6 */
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84 lw x23, 20 * WORD_SIZE( sp ) /* s7 */
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85 lw x24, 21 * WORD_SIZE( sp ) /* s8 */
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86 lw x25, 22 * WORD_SIZE( sp ) /* s9 */
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87 lw x26, 23 * WORD_SIZE( sp ) /* s10 */
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88 lw x27, 24 * WORD_SIZE( sp ) /* s11 */
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89 lw x28, 25 * WORD_SIZE( sp ) /* t3 */
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90 lw x29, 26 * WORD_SIZE( sp ) /* t4 */
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91 lw x30, 27 * WORD_SIZE( sp ) /* t5 */
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92 lw x31, 28 * WORD_SIZE( sp ) /* t6 */
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93 addi sp, sp, CONTEXT_SIZE
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94 csrs mstatus, 8 /* Enable machine interrupts. */
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97 /*-----------------------------------------------------------*/
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101 addi sp, sp, -CONTEXT_SIZE
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102 sw x1, 1 * WORD_SIZE( sp )
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103 sw x5, 2 * WORD_SIZE( sp )
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104 sw x6, 3 * WORD_SIZE( sp )
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105 sw x7, 4 * WORD_SIZE( sp )
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106 sw x8, 5 * WORD_SIZE( sp )
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107 sw x9, 6 * WORD_SIZE( sp )
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108 sw x10, 7 * WORD_SIZE( sp )
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109 sw x11, 8 * WORD_SIZE( sp )
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110 sw x12, 9 * WORD_SIZE( sp )
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111 sw x13, 10 * WORD_SIZE( sp )
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112 sw x14, 11 * WORD_SIZE( sp )
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113 sw x15, 12 * WORD_SIZE( sp )
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114 sw x16, 13 * WORD_SIZE( sp )
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115 sw x17, 14 * WORD_SIZE( sp )
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116 sw x18, 15 * WORD_SIZE( sp )
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117 sw x19, 16 * WORD_SIZE( sp )
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118 sw x20, 17 * WORD_SIZE( sp )
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119 sw x21, 18 * WORD_SIZE( sp )
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120 sw x22, 19 * WORD_SIZE( sp )
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121 sw x23, 20 * WORD_SIZE( sp )
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122 sw x24, 21 * WORD_SIZE( sp )
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123 sw x25, 22 * WORD_SIZE( sp )
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124 sw x26, 23 * WORD_SIZE( sp )
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125 sw x27, 24 * WORD_SIZE( sp )
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126 sw x28, 25 * WORD_SIZE( sp )
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127 sw x29, 26 * WORD_SIZE( sp )
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128 sw x30, 27 * WORD_SIZE( sp )
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129 sw x31, 28 * WORD_SIZE( sp )
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131 csrr t0, mstatus /* Required for MPIE bit. */
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132 sw t0, 29 * WORD_SIZE( sp )
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134 lw t0, pxCurrentTCB /* Load pxCurrentTCB. */
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135 sw sp, 0( t0 ) /* Write sp to first TCB member. */
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140 test_if_environment_call:
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141 li t0, 11 /* 11 == environment call when using qemu. */
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142 bne a0, t0, test_if_timer
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143 addi a1, a1, 4 /* Synchronous so return to the instruction after the environment call. */
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144 sw a1, 0( sp ) /* Save updated exception return address. */
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145 lw sp, xISRStackTop /* Switch to ISR stack before function call. */
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146 jal vTaskSwitchContext
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151 sw a1, 0( sp ) /* Asynch so save unmodified exception return address. */
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154 addi t1,t0, 7 /* 0x80000007 == machine timer interrupt. */
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155 bne a0, t1, as_yet_unhandled
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157 lw t0, pullMachineTimerCompareRegister /* Load address of compare register into t0. */
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158 lw t1, pullNextTime /* Load the address of ullNextTime into t1. */
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159 lw t2, 0(t1) /* Load the low word of ullNextTime into t2. */
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160 lw t3, 4(t1) /* Load the high word of ullNextTime into t3. */
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161 sw t2, 0(t0) /* Store low word of ullNextTime into compare register. */
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162 sw t3, 4(t0) /* Store high word of ullNextTime into compare register. */
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163 lw t0, ulTimerIncrementsForOneTick /* Load the value of ullTimerIncrementForOneTick into t0 (could this be optimized by storing in an array next to pullNextTime?). */
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164 add t4, t0, t2 /* Add the low word of ullNextTime to the timer increments for one tick (assumes timer increment for one tick fits in 32-bits. */
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165 sltu t5, t4, t2 /* See if the sum of low words overflowed (what about the zero case?). */
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166 add t6, t3, t5 /* Add overflow to high word of ullNextTime. */
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167 sw t4, 0(t1) /* Store new low word of ullNextTime. */
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168 sw t6, 4(t1) /* Store new high word of ullNextTime. */
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169 lw sp, xISRStackTop /* Switch to ISR stack before function call. */
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170 jal xTaskIncrementTick
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171 beqz a0, processed_source /* Don't switch context if incrementing tick didn't unblock a task. */
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172 jal vTaskSwitchContext
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176 // ebreak /* External interrupt? */
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180 lw sp, pxCurrentTCB /* Load pxCurrentTCB. */
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181 lw sp, 0( sp ) /* Read sp from first TCB member. */
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183 /* Load mret with the address of the next task. */
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187 /* Load mstatus with the interrupt enable bits used by the task. */
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188 lw t0, 29 * WORD_SIZE( sp )
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189 csrw mstatus, t0 /* Required for MPIE bit. */
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191 lw x1, 1 * WORD_SIZE( sp )
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192 lw x5, 2 * WORD_SIZE( sp ) /* t0 */
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193 lw x6, 3 * WORD_SIZE( sp ) /* t1 */
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194 lw x7, 4 * WORD_SIZE( sp ) /* t2 */
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195 lw x8, 5 * WORD_SIZE( sp ) /* s0/fp */
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196 lw x9, 6 * WORD_SIZE( sp ) /* s1 */
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197 lw x10, 7 * WORD_SIZE( sp ) /* a0 */
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198 lw x11, 8 * WORD_SIZE( sp ) /* a1 */
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199 lw x12, 9 * WORD_SIZE( sp ) /* a2 */
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200 lw x13, 10 * WORD_SIZE( sp ) /* a3 */
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201 lw x14, 11 * WORD_SIZE( sp ) /* a4 */
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202 lw x15, 12 * WORD_SIZE( sp ) /* a5 */
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203 lw x16, 13 * WORD_SIZE( sp ) /* a6 */
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204 lw x17, 14 * WORD_SIZE( sp ) /* a7 */
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205 lw x18, 15 * WORD_SIZE( sp ) /* s2 */
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206 lw x19, 16 * WORD_SIZE( sp ) /* s3 */
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207 lw x20, 17 * WORD_SIZE( sp ) /* s4 */
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208 lw x21, 18 * WORD_SIZE( sp ) /* s5 */
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209 lw x22, 19 * WORD_SIZE( sp ) /* s6 */
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210 lw x23, 20 * WORD_SIZE( sp ) /* s7 */
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211 lw x24, 21 * WORD_SIZE( sp ) /* s8 */
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212 lw x25, 22 * WORD_SIZE( sp ) /* s9 */
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213 lw x26, 23 * WORD_SIZE( sp ) /* s10 */
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214 lw x27, 24 * WORD_SIZE( sp ) /* s11 */
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215 lw x28, 25 * WORD_SIZE( sp ) /* t3 */
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216 lw x29, 26 * WORD_SIZE( sp ) /* t4 */
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217 lw x30, 27 * WORD_SIZE( sp ) /* t5 */
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218 lw x31, 28 * WORD_SIZE( sp ) /* t6 */
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219 addi sp, sp, CONTEXT_SIZE
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