2 * FreeRTOS Kernel V10.0.0
\r
3 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
\r
5 * Permission is hereby granted, free of charge, to any person obtaining a copy of
\r
6 * this software and associated documentation files (the "Software"), to deal in
\r
7 * the Software without restriction, including without limitation the rights to
\r
8 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
\r
9 * the Software, and to permit persons to whom the Software is furnished to do so,
\r
10 * subject to the following conditions:
\r
12 * The above copyright notice and this permission notice shall be included in all
\r
13 * copies or substantial portions of the Software. If you wish to use our Amazon
\r
14 * FreeRTOS name, please do so in a fair use way that does not cause confusion.
\r
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
\r
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
\r
18 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
\r
19 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
\r
20 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
\r
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
\r
23 * http://www.FreeRTOS.org
\r
24 * http://aws.amazon.com/freertos
\r
26 * 1 tab == 4 spaces!
\r
29 /* Scheduler includes. */
\r
30 #include "FreeRTOS.h"
\r
33 /* The critical nesting value is initialised to a non zero value to ensure
\r
34 interrupts don't accidentally become enabled before the scheduler is started. */
\r
35 #define portINITIAL_CRITICAL_NESTING ( ( uint16_t ) 10 )
\r
37 /* Initial PSW value allocated to a newly created task.
\r
39 * ||||||||-------------- Fill byte
\r
40 * |||||||--------------- Carry Flag cleared
\r
41 * |||||----------------- In-service priority Flags set to low level
\r
42 * ||||------------------ Register bank Select 0 Flag cleared
\r
43 * |||------------------- Auxiliary Carry Flag cleared
\r
44 * ||-------------------- Register bank Select 1 Flag cleared
\r
45 * |--------------------- Zero Flag set
\r
46 * ---------------------- Global Interrupt Flag set (enabled)
\r
48 #define portPSW ( 0xc6UL )
\r
50 /* Each task maintains a count of the critical section nesting depth. Each time
\r
51 a critical section is entered the count is incremented. Each time a critical
\r
52 section is exited the count is decremented - with interrupts only being
\r
53 re-enabled if the count is zero.
\r
55 usCriticalNesting will get set to zero when the scheduler starts, but must
\r
56 not be initialised to zero as that could cause problems during the startup
\r
58 volatile uint16_t usCriticalNesting = portINITIAL_CRITICAL_NESTING;
\r
60 /*-----------------------------------------------------------*/
\r
63 * Sets up the periodic ISR used for the RTOS tick.
\r
65 __attribute__((weak)) void vApplicationSetupTimerInterrupt( void );
\r
68 * Starts the scheduler by loading the context of the first task to run.
\r
69 * (defined in portasm.S).
\r
71 extern void vPortStartFirstTask( void );
\r
73 /*-----------------------------------------------------------*/
\r
76 * Initialise the stack of a task to look exactly as if a call to
\r
77 * portSAVE_CONTEXT had been called.
\r
79 * See the header file portable.h.
\r
81 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
\r
85 /* Stack type and pointers to the stack type are both 2 bytes. */
\r
87 /* Parameters are passed in on the stack, and written using a 32bit value
\r
88 hence a space is left for the second two bytes. */
\r
91 /* Write in the parameter value. */
\r
92 pulLocal = ( uint32_t * ) pxTopOfStack;
\r
93 *pulLocal = ( StackType_t ) pvParameters;
\r
96 /* The return address, leaving space for the first two bytes of the
\r
99 pulLocal = ( uint32_t * ) pxTopOfStack;
\r
100 *pulLocal = ( uint32_t ) 0;
\r
103 /* The start address / PSW value is also written in as a 32bit value,
\r
104 so leave a space for the second two bytes. */
\r
107 /* Task function start address combined with the PSW. */
\r
108 pulLocal = ( uint32_t * ) pxTopOfStack;
\r
109 *pulLocal = ( ( ( uint32_t ) pxCode ) | ( portPSW << 24UL ) );
\r
112 /* An initial value for the AX register. */
\r
113 *pxTopOfStack = ( StackType_t ) 0x1111;
\r
116 /* An initial value for the HL register. */
\r
117 *pxTopOfStack = ( StackType_t ) 0x2222;
\r
120 /* CS and ES registers. */
\r
121 *pxTopOfStack = ( StackType_t ) 0x0F00;
\r
124 /* The remaining general purpose registers bank 0 (DE and BC) and the other
\r
125 two register banks...register bank 3 is dedicated for use by interrupts so
\r
126 is not saved as part of the task context. */
\r
127 pxTopOfStack -= 10;
\r
129 /* Finally the critical section nesting count is set to zero when the task
\r
131 *pxTopOfStack = ( StackType_t ) portNO_CRITICAL_SECTION_NESTING;
\r
133 /* Return a pointer to the top of the stack that has beene generated so it
\r
134 can be stored in the task control block for the task. */
\r
135 return pxTopOfStack;
\r
137 /*-----------------------------------------------------------*/
\r
139 portBASE_TYPE xPortStartScheduler( void )
\r
141 /* Setup the hardware to generate the tick. Interrupts are disabled when
\r
142 this function is called. */
\r
143 vApplicationSetupTimerInterrupt();
\r
145 /* Restore the context of the first task that is going to run. */
\r
146 vPortStartFirstTask();
\r
148 /* Execution should not reach here as the tasks are now running! */
\r
151 /*-----------------------------------------------------------*/
\r
153 void vPortEndScheduler( void )
\r
155 /* It is unlikely that the RL78 port will get stopped. */
\r
157 /*-----------------------------------------------------------*/
\r
159 __attribute__((weak)) void vApplicationSetupTimerInterrupt( void )
\r
161 const uint16_t usClockHz = 15000UL; /* Internal clock. */
\r
162 const uint16_t usCompareMatch = ( usClockHz / configTICK_RATE_HZ ) + 1UL;
\r
164 /* Use the internal 15K clock. */
\r
165 OSMC = ( unsigned char ) 0x16;
\r
169 /* Supply the interval timer clock. */
\r
170 RTCEN = ( unsigned char ) 1U;
\r
172 /* Disable INTIT interrupt. */
\r
173 ITMK = ( unsigned char ) 1;
\r
175 /* Disable ITMC operation. */
\r
176 ITMC = ( unsigned char ) 0x0000;
\r
178 /* Clear INIT interrupt. */
\r
179 ITIF = ( unsigned char ) 0;
\r
181 /* Set interval and enable interrupt operation. */
\r
182 ITMC = usCompareMatch | 0x8000U;
\r
184 /* Enable INTIT interrupt. */
\r
185 ITMK = ( unsigned char ) 0;
\r
191 /* Supply the interval timer clock. */
\r
192 TMKAEN = ( unsigned char ) 1U;
\r
194 /* Disable INTIT interrupt. */
\r
195 TMKAMK = ( unsigned char ) 1;
\r
197 /* Disable ITMC operation. */
\r
198 ITMC = ( unsigned char ) 0x0000;
\r
200 /* Clear INIT interrupt. */
\r
201 TMKAIF = ( unsigned char ) 0;
\r
203 /* Set interval and enable interrupt operation. */
\r
204 ITMC = usCompareMatch | 0x8000U;
\r
206 /* Enable INTIT interrupt. */
\r
207 TMKAMK = ( unsigned char ) 0;
\r
211 /*-----------------------------------------------------------*/
\r