2 FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 This file is part of the FreeRTOS distribution.
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9 FreeRTOS is free software; you can redistribute it and/or modify it under
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10 the terms of the GNU General Public License (version 2) as published by the
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11 Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
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13 ***************************************************************************
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14 >>! NOTE: The modification to the GPL is included to allow you to !<<
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15 >>! distribute a combined work that includes FreeRTOS without being !<<
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16 >>! obliged to provide the source code for proprietary components !<<
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17 >>! outside of the FreeRTOS kernel. !<<
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18 ***************************************************************************
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20 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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21 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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22 FOR A PARTICULAR PURPOSE. Full license text is available on the following
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23 link: http://www.freertos.org/a00114.html
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25 ***************************************************************************
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27 * FreeRTOS provides completely free yet professionally developed, *
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28 * robust, strictly quality controlled, supported, and cross *
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29 * platform software that is more than just the market leader, it *
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30 * is the industry's de facto standard. *
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32 * Help yourself get started quickly while simultaneously helping *
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33 * to support the FreeRTOS project by purchasing a FreeRTOS *
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34 * tutorial book, reference manual, or both: *
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35 * http://www.FreeRTOS.org/Documentation *
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37 ***************************************************************************
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39 http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
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40 the FAQ page "My application does not run, what could be wrong?". Have you
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41 defined configASSERT()?
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43 http://www.FreeRTOS.org/support - In return for receiving this top quality
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44 embedded software for free we request you assist our global community by
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45 participating in the support forum.
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47 http://www.FreeRTOS.org/training - Investing in training allows your team to
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48 be as productive as possible as early as possible. Now you can receive
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49 FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
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50 Ltd, and the world's leading authority on the world's leading RTOS.
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52 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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53 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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54 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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56 http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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57 Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
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59 http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
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60 Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
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61 licenses offer ticketed support, indemnification and commercial middleware.
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63 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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64 engineered and independently SIL3 certified version for use in safety and
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65 mission critical applications that require provable dependability.
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70 /*-----------------------------------------------------------
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71 * Implementation of functions defined in portable.h for the SH2A port.
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72 *----------------------------------------------------------*/
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74 /* Scheduler includes. */
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75 #include "FreeRTOS.h"
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78 /* Library includes. */
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81 /* Hardware specifics. */
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82 #include "iodefine.h"
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84 /*-----------------------------------------------------------*/
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86 /* Tasks should start with interrupts enabled and in Supervisor mode, therefore
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87 PSW is set with U and I set, and PM and IPL clear. */
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88 #define portINITIAL_PSW ( ( StackType_t ) 0x00030000 )
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89 #define portINITIAL_FPSW ( ( StackType_t ) 0x00000100 )
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91 /* These macros allow a critical section to be added around the call to
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92 xTaskIncrementTick(), which is only ever called from interrupts at the kernel
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93 priority - ie a known priority. Therefore these local macros are a slight
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94 optimisation compared to calling the global SET/CLEAR_INTERRUPT_MASK macros,
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95 which would require the old IPL to be read first and stored in a local variable. */
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96 #define portMASK_INTERRUPTS_FROM_KERNEL_ISR() __asm volatile ( "MVTIPL %0" ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY) )
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97 #define portUNMASK_INTERRUPTS_FROM_KERNEL_ISR() __asm volatile ( "MVTIPL %0" ::"i"(configKERNEL_INTERRUPT_PRIORITY) )
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99 /*-----------------------------------------------------------*/
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102 * Function to start the first task executing - written in asm code as direct
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103 * access to registers is required.
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105 static void prvStartFirstTask( void ) __attribute__((naked));
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108 * Software interrupt handler. Performs the actual context switch (saving and
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109 * restoring of registers). Written in asm code as direct register access is
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112 void vSoftwareInterruptISR( void ) __attribute__((naked));
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115 * The tick interrupt handler.
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117 void vTickISR( void ) __attribute__((interrupt));
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119 /*-----------------------------------------------------------*/
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121 extern void *pxCurrentTCB;
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123 /*-----------------------------------------------------------*/
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126 * See header file for description.
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128 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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130 /* R0 is not included as it is the stack pointer. */
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132 *pxTopOfStack = 0x00;
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134 *pxTopOfStack = portINITIAL_PSW;
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136 *pxTopOfStack = ( StackType_t ) pxCode;
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138 /* When debugging it can be useful if every register is set to a known
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139 value. Otherwise code space can be saved by just setting the registers
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140 that need to be set. */
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141 #ifdef USE_FULL_REGISTER_INITIALISATION
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144 *pxTopOfStack = 0xffffffff; /* r15. */
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146 *pxTopOfStack = 0xeeeeeeee;
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148 *pxTopOfStack = 0xdddddddd;
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150 *pxTopOfStack = 0xcccccccc;
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152 *pxTopOfStack = 0xbbbbbbbb;
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154 *pxTopOfStack = 0xaaaaaaaa;
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156 *pxTopOfStack = 0x99999999;
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158 *pxTopOfStack = 0x88888888;
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160 *pxTopOfStack = 0x77777777;
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162 *pxTopOfStack = 0x66666666;
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164 *pxTopOfStack = 0x55555555;
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166 *pxTopOfStack = 0x44444444;
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168 *pxTopOfStack = 0x33333333;
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170 *pxTopOfStack = 0x22222222;
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175 pxTopOfStack -= 15;
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179 *pxTopOfStack = ( StackType_t ) pvParameters; /* R1 */
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181 *pxTopOfStack = portINITIAL_FPSW;
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183 *pxTopOfStack = 0x11111111; /* Accumulator 0. */
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185 *pxTopOfStack = 0x22222222; /* Accumulator 0. */
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187 *pxTopOfStack = 0x33333333; /* Accumulator 0. */
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189 *pxTopOfStack = 0x44444444; /* Accumulator 1. */
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191 *pxTopOfStack = 0x55555555; /* Accumulator 1. */
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193 *pxTopOfStack = 0x66666666; /* Accumulator 1. */
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195 return pxTopOfStack;
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197 /*-----------------------------------------------------------*/
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199 BaseType_t xPortStartScheduler( void )
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201 extern void vApplicationSetupTimerInterrupt( void );
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203 /* Use pxCurrentTCB just so it does not get optimised away. */
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204 if( pxCurrentTCB != NULL )
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206 /* Call an application function to set up the timer that will generate the
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207 tick interrupt. This way the application can decide which peripheral to
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208 use. A demo application is provided to show a suitable example. */
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209 vApplicationSetupTimerInterrupt();
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211 /* Enable the software interrupt. */
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212 _IEN( _ICU_SWINT ) = 1;
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214 /* Ensure the software interrupt is clear. */
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215 _IR( _ICU_SWINT ) = 0;
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217 /* Ensure the software interrupt is set to the kernel priority. */
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218 _IPR( _ICU_SWINT ) = configKERNEL_INTERRUPT_PRIORITY;
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220 /* Start the first task. */
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221 prvStartFirstTask();
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224 /* Should not get here. */
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227 /*-----------------------------------------------------------*/
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229 void vPortEndScheduler( void )
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231 /* Not implemented in ports where there is nothing to return to.
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232 Artificially force an assert. */
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233 configASSERT( pxCurrentTCB == NULL );
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235 /*-----------------------------------------------------------*/
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237 static void prvStartFirstTask( void )
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241 /* When starting the scheduler there is nothing that needs moving to the
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242 interrupt stack because the function is not called from an interrupt.
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243 Just ensure the current stack is the user stack. */
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246 /* Obtain the location of the stack associated with which ever task
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247 pxCurrentTCB is currently pointing to. */
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248 "MOV.L #_pxCurrentTCB, R15 \n" \
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249 "MOV.L [R15], R15 \n" \
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250 "MOV.L [R15], R0 \n" \
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252 /* Restore the registers from the stack of the task pointed to by
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256 /* Accumulator low 32 bits. */
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257 "MVTACLO R15, A0 \n" \
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260 /* Accumulator high 32 bits. */
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261 "MVTACHI R15, A0 \n" \
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264 /* Accumulator guard. */
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265 "MVTACGU R15, A0 \n" \
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268 /* Accumulator low 32 bits. */
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269 "MVTACLO R15, A1 \n" \
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272 /* Accumulator high 32 bits. */
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273 "MVTACHI R15, A1 \n" \
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276 /* Accumulator guard. */
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277 "MVTACGU R15, A1 \n" \
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280 /* Floating point status word. */
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281 "MVTC R15, FPSW \n" \
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283 /* R1 to R15 - R0 is not included as it is the SP. */
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286 /* This pops the remaining registers. */
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292 /*-----------------------------------------------------------*/
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294 void vSoftwareInterruptISR( void )
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298 /* Re-enable interrupts. */
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301 /* Move the data that was automatically pushed onto the interrupt stack when
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302 the interrupt occurred from the interrupt stack to the user stack.
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304 R15 is saved before it is clobbered. */
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307 /* Read the user stack pointer. */
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308 "MVFC USP, R15 \n" \
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310 /* Move the address down to the data being moved. */
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311 "SUB #12, R15 \n" \
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312 "MVTC R15, USP \n" \
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314 /* Copy the data across, R15, then PC, then PSW. */
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315 "MOV.L [ R0 ], [ R15 ] \n" \
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316 "MOV.L 4[ R0 ], 4[ R15 ] \n" \
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317 "MOV.L 8[ R0 ], 8[ R15 ] \n" \
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319 /* Move the interrupt stack pointer to its new correct position. */
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322 /* All the rest of the registers are saved directly to the user stack. */
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325 /* Save the rest of the general registers (R15 has been saved already). */
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326 "PUSHM R1-R14 \n" \
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328 /* Save the FPSW and accumulator. */
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329 "MVFC FPSW, R15 \n" \
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331 "MVFACGU #0, A1, R15 \n" \
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333 "MVFACHI #0, A1, R15 \n" \
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335 /* Low order word. */
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336 "MVFACLO #0, A1, R15 \n" \
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338 "MVFACGU #0, A0, R15 \n" \
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340 "MVFACHI #0, A0, R15 \n" \
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342 /* Low order word. */
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343 "MVFACLO #0, A0, R15 \n" \
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346 /* Save the stack pointer to the TCB. */
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347 "MOV.L #_pxCurrentTCB, R15 \n" \
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348 "MOV.L [ R15 ], R15 \n" \
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349 "MOV.L R0, [ R15 ] \n" \
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351 /* Ensure the interrupt mask is set to the syscall priority while the kernel
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352 structures are being accessed. */
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355 /* Select the next task to run. */
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356 "BSR.A _vTaskSwitchContext \n" \
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358 /* Reset the interrupt mask as no more data structure access is required. */
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361 /* Load the stack pointer of the task that is now selected as the Running
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362 state task from its TCB. */
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363 "MOV.L #_pxCurrentTCB,R15 \n" \
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364 "MOV.L [ R15 ], R15 \n" \
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365 "MOV.L [ R15 ], R0 \n" \
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367 /* Restore the context of the new task. The PSW (Program Status Word) and
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368 PC will be popped by the RTE instruction. */
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371 /* Accumulator low 32 bits. */
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372 "MVTACLO R15, A0 \n" \
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375 /* Accumulator high 32 bits. */
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376 "MVTACHI R15, A0 \n" \
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379 /* Accumulator guard. */
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380 "MVTACGU R15, A0 \n" \
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383 /* Accumulator low 32 bits. */
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384 "MVTACLO R15, A1 \n" \
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387 /* Accumulator high 32 bits. */
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388 "MVTACHI R15, A1 \n" \
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391 /* Accumulator guard. */
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392 "MVTACGU R15, A1 \n" \
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394 "MVTC R15, FPSW \n" \
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399 :: "i"(configMAX_SYSCALL_INTERRUPT_PRIORITY), "i"(configKERNEL_INTERRUPT_PRIORITY)
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402 /*-----------------------------------------------------------*/
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404 void vTickISR( void )
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406 /* Re-enabled interrupts. */
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407 __asm volatile( "SETPSW I" );
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409 /* Increment the tick, and perform any processing the new tick value
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410 necessitates. Ensure IPL is at the max syscall value first. */
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411 portMASK_INTERRUPTS_FROM_KERNEL_ISR();
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413 if( xTaskIncrementTick() != pdFALSE )
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418 portUNMASK_INTERRUPTS_FROM_KERNEL_ISR();
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420 /*-----------------------------------------------------------*/
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422 uint32_t ulPortGetIPL( void )
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426 "MVFC PSW, R1 \n" \
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427 "SHLR #24, R1 \n" \
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431 /* This will never get executed, but keeps the compiler from complaining. */
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434 /*-----------------------------------------------------------*/
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436 void vPortSetIPL( uint32_t ulNewIPL )
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441 "MVFC PSW, R5 \n" \
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442 "SHLL #24, R1 \n" \
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443 "AND #-0F000001H, R5 \n" \
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445 "MVTC R5, PSW \n" \
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projects / freertos / blob