git.sur5r.net Git - freertos/blob - FreeRTOS/Source/portable/GCC/TriCore_1782/portmacro.h

   1 /*\r
   2     FreeRTOS V9.0.0rc1 - Copyright (C) 2016 Real Time Engineers Ltd.\r
   3     All rights reserved\r
   4 \r
   5     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
   6 \r
   7     This file is part of the FreeRTOS distribution.\r
   8 \r
   9     FreeRTOS is free software; you can redistribute it and/or modify it under\r
  10     the terms of the GNU General Public License (version 2) as published by the\r
  11     Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
  12 \r
  13     ***************************************************************************\r
  14     >>!   NOTE: The modification to the GPL is included to allow you to     !<<\r
  15     >>!   distribute a combined work that includes FreeRTOS without being   !<<\r
  16     >>!   obliged to provide the source code for proprietary components     !<<\r
  17     >>!   outside of the FreeRTOS kernel.                                   !<<\r
  18     ***************************************************************************\r
  19 \r
  20     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
  21     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
  22     FOR A PARTICULAR PURPOSE.  Full license text is available on the following\r
  23     link: http://www.freertos.org/a00114.html\r
  24 \r
  25     ***************************************************************************\r
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  36      *                                                                       *\r
  37     ***************************************************************************\r
  38 \r
  39     http://www.FreeRTOS.org/FAQHelp.html - Having a problem?  Start by reading\r
  40     the FAQ page "My application does not run, what could be wrong?".  Have you\r
  41     defined configASSERT()?\r
  42 \r
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  63     http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
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  66 \r
  67     1 tab == 4 spaces!\r
  68 */\r
  69 \r
  70 #ifndef PORTMACRO_H\r
  71 #define PORTMACRO_H\r
  72 \r
  73 #ifdef __cplusplus\r
  74 extern "C" {\r
  75 #endif\r
  76 \r
  77 /* System Includes. */\r
  78 #include <tc1782.h>\r
  79 #include <machine/intrinsics.h>\r
  80 \r
  81 /*-----------------------------------------------------------\r
  82  * Port specific definitions.\r
  83  *\r
  84  * The settings in this file configure FreeRTOS correctly for the\r
  85  * given hardware and compiler.\r
  86  *\r
  87  * These settings should not be altered.\r
  88  *-----------------------------------------------------------\r
  89  */\r
  90 \r
  91 /* Type definitions. */\r
  92 #define portCHAR                char\r
  93 #define portFLOAT               float\r
  94 #define portDOUBLE              double\r
  95 #define portLONG                long\r
  96 #define portSHORT               short\r
  97 #define portSTACK_TYPE  uint32_t\r
  98 #define portBASE_TYPE   long\r
  99 \r
 100 typedef portSTACK_TYPE StackType_t;\r
 101 typedef long BaseType_t;\r
 102 typedef unsigned long UBaseType_t;\r
 103 \r
 104 #if( configUSE_16_BIT_TICKS == 1 )\r
 105         typedef uint16_t TickType_t;\r
 106         #define portMAX_DELAY ( TickType_t ) 0xffff\r
 107 #else\r
 108         typedef uint32_t TickType_t;\r
 109         #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
 110 \r
 111         /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do\r
 112         not need to be guarded with a critical section. */\r
 113         #define portTICK_TYPE_IS_ATOMIC 1\r
 114 #endif\r
 115 /*---------------------------------------------------------------------------*/\r
 116 \r
 117 /* Architecture specifics. */\r
 118 #define portSTACK_GROWTH                                                        ( -1 )\r
 119 #define portTICK_PERIOD_MS                                                      ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
 120 #define portBYTE_ALIGNMENT                                                      4\r
 121 #define portNOP()                                                                       __asm volatile( " nop " )\r
 122 #define portCRITICAL_NESTING_IN_TCB                                     1\r
 123 #define portRESTORE_FIRST_TASK_PRIORITY_LEVEL           1\r
 124 \r
 125 \r
 126 /*---------------------------------------------------------------------------*/\r
 127 \r
 128 typedef struct MPU_SETTINGS { uint32_t ulNotUsed; } xMPU_SETTINGS;\r
 129 \r
 130 /* Define away the instruction from the Restore Context Macro. */\r
 131 #define portPRIVILEGE_BIT                                                       0x0UL\r
 132 \r
 133 #define portCCPN_MASK                                           ( 0x000000FFUL )\r
 134 \r
 135 extern void vTaskEnterCritical( void );\r
 136 extern void vTaskExitCritical( void );\r
 137 #define portENTER_CRITICAL()                    vTaskEnterCritical()\r
 138 #define portEXIT_CRITICAL()                             vTaskExitCritical()\r
 139 /*---------------------------------------------------------------------------*/\r
 140 \r
 141 /* CSA Manipulation. */\r
 142 #define portCSA_TO_ADDRESS( pCSA )                      ( ( uint32_t * )( ( ( ( pCSA ) & 0x000F0000 ) << 12 ) | ( ( ( pCSA ) & 0x0000FFFF ) << 6 ) ) )\r
 143 #define portADDRESS_TO_CSA( pAddress )          ( ( uint32_t )( ( ( ( (uint32_t)( pAddress ) ) & 0xF0000000 ) >> 12 ) | ( ( ( uint32_t )( pAddress ) & 0x003FFFC0 ) >> 6 ) ) )\r
 144 /*---------------------------------------------------------------------------*/\r
 145 \r
 146 #define portYIELD()                                                             _syscall( 0 )\r
 147 /* Port Restore is implicit in the platform when the function is returned from the original PSW is automatically replaced. */\r
 148 #define portSYSCALL_TASK_YIELD                                  0\r
 149 #define portSYSCALL_RAISE_PRIORITY                              1\r
 150 /*---------------------------------------------------------------------------*/\r
 151 \r
 152 /* Critical section management. */\r
 153 \r
 154 /* Set ICR.CCPN to configMAX_SYSCALL_INTERRUPT_PRIORITY. */\r
 155 #define portDISABLE_INTERRUPTS()        {                                                                                                                                                                                                       \\r
 156                                                                                 uint32_t ulICR;                                                                                                                                                 \\r
 157                                                                                 _disable();                                                                                                                                                                             \\r
 158                                                                                 ulICR = _mfcr( $ICR );          /* Get current ICR value. */                                                                            \\r
 159                                                                                 ulICR &= ~portCCPN_MASK;        /* Clear down mask bits. */                                                                                     \\r
 160                                                                                 ulICR |= configMAX_SYSCALL_INTERRUPT_PRIORITY; /* Set mask bits to required priority mask. */   \\r
 161                                                                                 _mtcr( $ICR, ulICR );           /* Write back updated ICR. */                                                                           \\r
 162                                                                                 _isync();                                                                                                                                                                               \\r
 163                                                                                 _enable();                                                                                                                                                                              \\r
 164                                                                         }\r
 165 \r
 166 /* Clear ICR.CCPN to allow all interrupt priorities. */\r
 167 #define portENABLE_INTERRUPTS()         {                                                                                                                                       \\r
 168                                                                                 uint32_t ulICR;                                                                                 \\r
 169                                                                                 _disable();                                                                                                             \\r
 170                                                                                 ulICR = _mfcr( $ICR );          /* Get current ICR value. */            \\r
 171                                                                                 ulICR &= ~portCCPN_MASK;        /* Clear down mask bits. */                     \\r
 172                                                                                 _mtcr( $ICR, ulICR );           /* Write back updated ICR. */           \\r
 173                                                                                 _isync();                                                                                                               \\r
 174                                                                                 _enable();                                                                                                              \\r
 175                                                                         }\r
 176 \r
 177 /* Set ICR.CCPN to uxSavedMaskValue. */\r
 178 #define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedMaskValue )   {                                                                                                                                                                               \\r
 179                                                                                                                                         uint32_t ulICR;                                                                                                                         \\r
 180                                                                                                                                         _disable();                                                                                                                                                     \\r
 181                                                                                                                                         ulICR = _mfcr( $ICR );          /* Get current ICR value. */                                                    \\r
 182                                                                                                                                         ulICR &= ~portCCPN_MASK;        /* Clear down mask bits. */                                                             \\r
 183                                                                                                                                         ulICR |= uxSavedMaskValue;      /* Set mask bits to previously saved mask value. */             \\r
 184                                                                                                                                         _mtcr( $ICR, ulICR );           /* Write back updated ICR. */                                                   \\r
 185                                                                                                                                         _isync();                                                                                                                                                       \\r
 186                                                                                                                                         _enable();                                                                                                                                                      \\r
 187                                                                                                                                 }\r
 188 \r
 189 \r
 190 /* Set ICR.CCPN to configMAX_SYSCALL_INTERRUPT_PRIORITY */\r
 191 extern uint32_t uxPortSetInterruptMaskFromISR( void );\r
 192 #define portSET_INTERRUPT_MASK_FROM_ISR()       uxPortSetInterruptMaskFromISR()\r
 193 \r
 194 /* Pend a priority 1 interrupt, which will take care of the context switch. */\r
 195 #define portYIELD_FROM_ISR( xHigherPriorityTaskWoken )          if( xHigherPriorityTaskWoken != pdFALSE ) {     CPU_SRC0.bits.SETR = 1; _isync(); }\r
 196 \r
 197 /*---------------------------------------------------------------------------*/\r
 198 \r
 199 /* Task function macros as described on the FreeRTOS.org WEB site. */\r
 200 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
 201 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
 202 /*---------------------------------------------------------------------------*/\r
 203 \r
 204 /*\r
 205  * Port specific clean up macro required to free the CSAs that were consumed by\r
 206  * a task that has since been deleted.\r
 207  */\r
 208 void vPortReclaimCSA( uint32_t *pxTCB );\r
 209 #define portCLEAN_UP_TCB( pxTCB )               vPortReclaimCSA( ( uint32_t * ) ( pxTCB ) )\r
 210 \r
 211 #ifdef __cplusplus\r
 212 }\r
 213 #endif\r
 214 \r
 215 #endif /* PORTMACRO_H */\r