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1 /*\r
2     FreeRTOS V7.1.1 - Copyright (C) 2012 Real Time Engineers Ltd.\r
3 \r
4 \r
5     ***************************************************************************\r
6      *                                                                       *\r
7      *    FreeRTOS tutorial books are available in pdf and paperback.        *\r
8      *    Complete, revised, and edited pdf reference manuals are also       *\r
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10      *                                                                       *\r
11      *    Purchasing FreeRTOS documentation will not only help you, by       *\r
12      *    ensuring you get running as quickly as possible and with an        *\r
13      *    in-depth knowledge of how to use FreeRTOS, it will also help       *\r
14      *    the FreeRTOS project to continue with its mission of providing     *\r
15      *    professional grade, cross platform, de facto standard solutions    *\r
16      *    for microcontrollers - completely free of charge!                  *\r
17      *                                                                       *\r
18      *    >>> See http://www.FreeRTOS.org/Documentation for details. <<<     *\r
19      *                                                                       *\r
20      *    Thank you for using FreeRTOS, and thank you for your support!      *\r
21      *                                                                       *\r
22     ***************************************************************************\r
23 \r
24 \r
25     This file is part of the FreeRTOS distribution.\r
26 \r
27     FreeRTOS is free software; you can redistribute it and/or modify it under\r
28     the terms of the GNU General Public License (version 2) as published by the\r
29     Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
30     >>>NOTE<<< The modification to the GPL is included to allow you to\r
31     distribute a combined work that includes FreeRTOS without being obliged to\r
32     provide the source code for proprietary components outside of the FreeRTOS\r
33     kernel.  FreeRTOS is distributed in the hope that it will be useful, but\r
34     WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
35     or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for\r
36     more details. You should have received a copy of the GNU General Public\r
37     License and the FreeRTOS license exception along with FreeRTOS; if not it\r
38     can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
39     by writing to Richard Barry, contact details for whom are available on the\r
40     FreeRTOS WEB site.\r
41 \r
42     1 tab == 4 spaces!\r
43     \r
44     ***************************************************************************\r
45      *                                                                       *\r
46      *    Having a problem?  Start by reading the FAQ "My application does   *\r
47      *    not run, what could be wrong?                                      *\r
48      *                                                                       *\r
49      *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
50      *                                                                       *\r
51     ***************************************************************************\r
52 \r
53     \r
54     http://www.FreeRTOS.org - Documentation, training, latest information, \r
55     license and contact details.\r
56     \r
57     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
58     including FreeRTOS+Trace - an indispensable productivity tool.\r
59 \r
60     Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell \r
61     the code with commercial support, indemnification, and middleware, under \r
62     the OpenRTOS brand: http://www.OpenRTOS.com.  High Integrity Systems also\r
63     provide a safety engineered and independently SIL3 certified version under \r
64     the SafeRTOS brand: http://www.SafeRTOS.com.\r
65 */\r
66 \r
67 #ifndef PORTMACRO_H\r
68 #define PORTMACRO_H\r
69 \r
70 #ifdef __cplusplus\r
71 extern "C" {\r
72 #endif\r
73 \r
74 /* System Includes. */\r
75 #include <tc1782.h>\r
76 #include <machine/intrinsics.h>\r
77 \r
78 /*-----------------------------------------------------------\r
79  * Port specific definitions.\r
80  *\r
81  * The settings in this file configure FreeRTOS correctly for the\r
82  * given hardware and compiler.\r
83  *\r
84  * These settings should not be altered.\r
85  *-----------------------------------------------------------\r
86  */\r
87 \r
88 /* Type definitions. */\r
89 #define portCHAR                char\r
90 #define portFLOAT               float\r
91 #define portDOUBLE              double\r
92 #define portLONG                long\r
93 #define portSHORT               short\r
94 #define portSTACK_TYPE  unsigned long\r
95 #define portBASE_TYPE   long\r
96 \r
97 #if( configUSE_16_BIT_TICKS == 1 )\r
98         typedef unsigned portSHORT portTickType;\r
99         #define portMAX_DELAY ( portTickType ) 0xffff\r
100 #else\r
101         typedef unsigned portLONG portTickType;\r
102         #define portMAX_DELAY ( portTickType ) 0xffffffff\r
103 #endif\r
104 /*---------------------------------------------------------------------------*/\r
105 \r
106 /* Architecture specifics. */\r
107 #define portSTACK_GROWTH                                                        ( -1 )\r
108 #define portTICK_RATE_MS                                                        ( ( portTickType ) 1000 / configTICK_RATE_HZ )\r
109 #define portBYTE_ALIGNMENT                                                      4\r
110 #define portNOP()                                                                       __asm volatile( " nop " )\r
111 #define portCRITICAL_NESTING_IN_TCB                                     1\r
112 #define portRESTORE_FIRST_TASK_PRIORITY_LEVEL           1\r
113 \r
114 \r
115 /*---------------------------------------------------------------------------*/\r
116 \r
117 typedef struct MPU_SETTINGS { unsigned long ulNotUsed; } xMPU_SETTINGS;\r
118 \r
119 /* Define away the instruction from the Restore Context Macro. */\r
120 #define portPRIVILEGE_BIT                                                       0x0UL\r
121 \r
122 #define portCCPN_MASK                                           ( 0x000000FFUL )\r
123 \r
124 extern void vTaskEnterCritical( void );\r
125 extern void vTaskExitCritical( void );\r
126 #define portENTER_CRITICAL()                    vTaskEnterCritical()\r
127 #define portEXIT_CRITICAL()                             vTaskExitCritical()\r
128 /*---------------------------------------------------------------------------*/\r
129 \r
130 /* CSA Manipulation. */\r
131 #define portCSA_TO_ADDRESS( pCSA )                      ( ( unsigned long * )( ( ( ( pCSA ) & 0x000F0000 ) << 12 ) | ( ( ( pCSA ) & 0x0000FFFF ) << 6 ) ) )\r
132 #define portADDRESS_TO_CSA( pAddress )          ( ( unsigned long )( ( ( ( (unsigned long)( pAddress ) ) & 0xF0000000 ) >> 12 ) | ( ( ( unsigned long )( pAddress ) & 0x003FFFC0 ) >> 6 ) ) )\r
133 /*---------------------------------------------------------------------------*/\r
134 \r
135 #define portYIELD()                                                             _syscall( 0 )\r
136 /* Port Restore is implicit in the platform when the function is returned from the original PSW is automatically replaced. */\r
137 #define portSYSCALL_TASK_YIELD                                  0\r
138 #define portSYSCALL_RAISE_PRIORITY                              1\r
139 /*---------------------------------------------------------------------------*/\r
140 \r
141 /* Critical section management. */\r
142 \r
143 /* Set ICR.CCPN to configMAX_SYSCALL_INTERRUPT_PRIORITY. */\r
144 #define portDISABLE_INTERRUPTS()        {                                                                                                                                                                                                       \\r
145                                                                                 unsigned long ulICR;                                                                                                                                                    \\r
146                                                                                 _disable();                                                                                                                                                                             \\r
147                                                                                 ulICR = _mfcr( $ICR );          /* Get current ICR value. */                                                                            \\r
148                                                                                 ulICR &= ~portCCPN_MASK;        /* Clear down mask bits. */                                                                                     \\r
149                                                                                 ulICR |= configMAX_SYSCALL_INTERRUPT_PRIORITY; /* Set mask bits to required priority mask. */   \\r
150                                                                                 _mtcr( $ICR, ulICR );           /* Write back updated ICR. */                                                                           \\r
151                                                                                 _isync();                                                                                                                                                                               \\r
152                                                                                 _enable();                                                                                                                                                                              \\r
153                                                                         }\r
154 \r
155 /* Clear ICR.CCPN to allow all interrupt priorities. */\r
156 #define portENABLE_INTERRUPTS()         {                                                                                                                                       \\r
157                                                                                 unsigned long ulICR;                                                                                    \\r
158                                                                                 _disable();                                                                                                             \\r
159                                                                                 ulICR = _mfcr( $ICR );          /* Get current ICR value. */            \\r
160                                                                                 ulICR &= ~portCCPN_MASK;        /* Clear down mask bits. */                     \\r
161                                                                                 _mtcr( $ICR, ulICR );           /* Write back updated ICR. */           \\r
162                                                                                 _isync();                                                                                                               \\r
163                                                                                 _enable();                                                                                                              \\r
164                                                                         }\r
165 \r
166 /* Set ICR.CCPN to uxSavedMaskValue. */\r
167 #define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedMaskValue )   {                                                                                                                                                                               \\r
168                                                                                                                                         unsigned long ulICR;                                                                                                                            \\r
169                                                                                                                                         _disable();                                                                                                                                                     \\r
170                                                                                                                                         ulICR = _mfcr( $ICR );          /* Get current ICR value. */                                                    \\r
171                                                                                                                                         ulICR &= ~portCCPN_MASK;        /* Clear down mask bits. */                                                             \\r
172                                                                                                                                         ulICR |= uxSavedMaskValue;      /* Set mask bits to previously saved mask value. */             \\r
173                                                                                                                                         _mtcr( $ICR, ulICR );           /* Write back updated ICR. */                                                   \\r
174                                                                                                                                         _isync();                                                                                                                                                       \\r
175                                                                                                                                         _enable();                                                                                                                                                      \\r
176                                                                                                                                 }\r
177 \r
178 \r
179 /* Set ICR.CCPN to configMAX_SYSCALL_INTERRUPT_PRIORITY */\r
180 extern unsigned long uxPortSetInterruptMaskFromISR( void );\r
181 #define portSET_INTERRUPT_MASK_FROM_ISR()       uxPortSetInterruptMaskFromISR()\r
182 \r
183 /* As this port holds a CSA address in pxTopOfStack, the assert that checks the\r
184 pxTopOfStack alignment is removed. */\r
185 #define portALIGNMENT_ASSERT_pxCurrentTCB ( void )\r
186 \r
187 /* Pend a priority 1 interrupt, which will take care of the context switch. */\r
188 #define portYIELD_FROM_ISR( xHigherPriorityTaskWoken )          if( xHigherPriorityTaskWoken != pdFALSE ) {     CPU_SRC0.bits.SETR = 1; _isync(); }\r
189 \r
190 /*---------------------------------------------------------------------------*/\r
191 \r
192 /* Task function macros as described on the FreeRTOS.org WEB site. */\r
193 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
194 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
195 /*---------------------------------------------------------------------------*/\r
196 \r
197 /*\r
198  * Port specific clean up macro required to free the CSAs that were consumed by\r
199  * a task that has since been deleted.\r
200  */\r
201 void vPortReclaimCSA( unsigned long *pxTCB );\r
202 #define portCLEAN_UP_TCB( pxTCB )               vPortReclaimCSA( ( unsigned long * ) ( pxTCB ) )\r
203 \r
204 #ifdef __cplusplus\r
205 }\r
206 #endif\r
207 \r
208 #endif /* PORTMACRO_H */\r