git.sur5r.net Git - freertos/blob - FreeRTOS/Source/portable/GCC/TriCore_1782/porttrap.c

   1 /*\r
   2     FreeRTOS V7.3.0 - Copyright (C) 2012 Real Time Engineers Ltd.\r
   3 \r
   4     FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME.  PLEASE VISIT \r
   5     http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
   6 \r
   7     ***************************************************************************\r
   8      *                                                                       *\r
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  10      *    Complete, revised, and edited pdf reference manuals are also       *\r
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  13      *    Purchasing FreeRTOS documentation will not only help you, by       *\r
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  16      *    the FreeRTOS project to continue with its mission of providing     *\r
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  23      *                                                                       *\r
  24     ***************************************************************************\r
  25 \r
  26 \r
  27     This file is part of the FreeRTOS distribution.\r
  28 \r
  29     FreeRTOS is free software; you can redistribute it and/or modify it under\r
  30     the terms of the GNU General Public License (version 2) as published by the\r
  31     Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
  32     >>>NOTE<<< The modification to the GPL is included to allow you to\r
  33     distribute a combined work that includes FreeRTOS without being obliged to\r
  34     provide the source code for proprietary components outside of the FreeRTOS\r
  35     kernel.  FreeRTOS is distributed in the hope that it will be useful, but\r
  36     WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
  37     or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for\r
  38     more details. You should have received a copy of the GNU General Public\r
  39     License and the FreeRTOS license exception along with FreeRTOS; if not it\r
  40     can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
  41     by writing to Richard Barry, contact details for whom are available on the\r
  42     FreeRTOS WEB site.\r
  43 \r
  44     1 tab == 4 spaces!\r
  45     \r
  46     ***************************************************************************\r
  47      *                                                                       *\r
  48      *    Having a problem?  Start by reading the FAQ "My application does   *\r
  49      *    not run, what could be wrong?"                                     *\r
  50      *                                                                       *\r
  51      *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
  52      *                                                                       *\r
  53     ***************************************************************************\r
  54 \r
  55     \r
  56     http://www.FreeRTOS.org - Documentation, training, latest versions, license \r
  57     and contact details.  \r
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  59     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
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  61 \r
  62     Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell \r
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  66     the SafeRTOS brand: http://www.SafeRTOS.com.\r
  67 */\r
  68 \r
  69 /* Kernel includes. */\r
  70 #include "FreeRTOS.h"\r
  71 \r
  72 /* Machine includes */\r
  73 #include <tc1782.h>\r
  74 #include <machine/intrinsics.h>\r
  75 #include <machine/cint.h>\r
  76 /*---------------------------------------------------------------------------*/\r
  77 \r
  78 /*\r
  79  * This reference is required by the Save/Restore Context Macros.\r
  80  */\r
  81 extern volatile unsigned long *pxCurrentTCB;\r
  82 /*-----------------------------------------------------------*/\r
  83 \r
  84 /*\r
  85  * This file contains base definitions for all of the possible traps in the system.\r
  86  * It is suggested to provide implementations for all of the traps but for\r
  87  * the time being they simply trigger a DEBUG instruction so that it is easy\r
  88  * to see what caused a particular trap.\r
  89  *\r
  90  * Trap Class 6, the SYSCALL, is used exclusively by the operating system.\r
  91  */\r
  92 \r
  93 /* The Trap Classes. */\r
  94 #define portMMU_TRAP                                                                            0\r
  95 #define portIPT_TRAP                                                                            1\r
  96 #define portIE_TRAP                                                                                     2\r
  97 #define portCM_TRAP                                                                                     3\r
  98 #define portSBP_TRAP                                                                            4\r
  99 #define portASSERT_TRAP                                                                         5\r
 100 #define portNMI_TRAP                                                                            7\r
 101 \r
 102 /* MMU Trap Identifications. */\r
 103 #define portTIN_MMU_VIRTUAL_ADDRESS_FILL                                        0\r
 104 #define portTIN_MMU_VIRTUAL_ADDRESS_PROTECTION                          1\r
 105 \r
 106 /* Internal Protection Trap Identifications. */\r
 107 #define portTIN_IPT_PRIVILIGED_INSTRUCTION                                      1\r
 108 #define portTIN_IPT_MEMORY_PROTECTION_READ                                      2\r
 109 #define portTIN_IPT_MEMORY_PROTECTION_WRITE                                     3\r
 110 #define portTIN_IPT_MEMORY_PROTECTION_EXECUTION                         4\r
 111 #define portTIN_IPT_MEMORY_PROTECTION_PERIPHERAL_ACCESS         5\r
 112 #define portTIN_IPT_MEMORY_PROTECTION_NULL_ADDRESS                      6\r
 113 #define portTIN_IPT_MEMORY_PROTECTION_GLOBAL_REGISTER_WRITE_PROTECTION  7\r
 114 \r
 115 /* Instruction Error Trap Identifications. */\r
 116 #define portTIN_IE_ILLEGAL_OPCODE                                                       1\r
 117 #define portTIN_IE_UNIMPLEMENTED_OPCODE                                         2\r
 118 #define portTIN_IE_INVALID_OPERAND                                                      3\r
 119 #define portTIN_IE_DATA_ADDRESS_ALIGNMENT                                       4\r
 120 #define portTIN_IE_INVALID_LOCAL_MEMORY_ADDRESS                         5\r
 121 \r
 122 /* Context Management Trap Identifications. */\r
 123 #define portTIN_CM_FREE_CONTEXT_LIST_DEPLETION                          1\r
 124 #define portTIN_CM_CALL_DEPTH_OVERFLOW                                          2\r
 125 #define portTIN_CM_CALL_DEPTH_UNDEFLOW                                          3\r
 126 #define portTIN_CM_FREE_CONTEXT_LIST_UNDERFLOW                          4\r
 127 #define portTIN_CM_CALL_STACK_UNDERFLOW                                         5\r
 128 #define portTIN_CM_CONTEXT_TYPE                                                         6\r
 129 #define portTIN_CM_NESTING_ERROR                                                        7\r
 130 \r
 131 /* System Bus and Peripherals Trap Identifications. */\r
 132 #define portTIN_SBP_PROGRAM_FETCH_SYNCHRONOUS_ERROR                     1\r
 133 #define portTIN_SBP_DATA_ACCESS_SYNCHRONOUS_ERROR                       2\r
 134 #define portTIN_SBP_DATA_ACCESS_ASYNCHRONOUS_ERROR                      3\r
 135 #define portTIN_SBP_COPROCESSOR_TRAP_ASYNCHRONOUS_ERROR         4\r
 136 #define portTIN_SBP_PROGRAM_MEMORY_INTEGRITY_ERROR                      5\r
 137 #define portTIN_SBP_DATA_MEMORY_INTEGRITY_ERROR                         6\r
 138 \r
 139 /* Assertion Trap Identifications. */\r
 140 #define portTIN_ASSERT_ARITHMETIC_OVERFLOW                                      1\r
 141 #define portTIN_ASSERT_STICKY_ARITHMETIC_OVERFLOW                       2\r
 142 \r
 143 /* Non-maskable Interrupt Trap Identifications. */\r
 144 #define portTIN_NMI_NON_MASKABLE_INTERRUPT                                      0\r
 145 /*---------------------------------------------------------------------------*/\r
 146 \r
 147 void vMMUTrap( int iTrapIdentification ) __attribute__( ( longcall, weak ) );\r
 148 void vInternalProtectionTrap( int iTrapIdentification ) __attribute__( ( longcall, weak ) );\r
 149 void vInstructionErrorTrap( int iTrapIdentification ) __attribute__( ( longcall, weak ) );\r
 150 void vContextManagementTrap( int iTrapIdentification ) __attribute__( ( longcall, weak ) );\r
 151 void vSystemBusAndPeripheralsTrap( int iTrapIdentification ) __attribute__( ( longcall, weak ) );\r
 152 void vAssertionTrap( int iTrapIdentification ) __attribute__( ( longcall, weak ) );\r
 153 void vNonMaskableInterruptTrap( int iTrapIdentification ) __attribute__( ( longcall, weak ) );\r
 154 /*---------------------------------------------------------------------------*/\r
 155 \r
 156 void vTrapInstallHandlers( void )\r
 157 {\r
 158         if( 0 == _install_trap_handler ( portMMU_TRAP, vMMUTrap ) )\r
 159         {\r
 160                 _debug();\r
 161         }\r
 162 \r
 163         if( 0 == _install_trap_handler ( portIPT_TRAP, vInternalProtectionTrap ) )\r
 164         {\r
 165                 _debug();\r
 166         }\r
 167 \r
 168         if( 0 == _install_trap_handler ( portIE_TRAP, vInstructionErrorTrap ) )\r
 169         {\r
 170                 _debug();\r
 171         }\r
 172 \r
 173         if( 0 == _install_trap_handler ( portCM_TRAP, vContextManagementTrap ) )\r
 174         {\r
 175                 _debug();\r
 176         }\r
 177 \r
 178         if( 0 == _install_trap_handler ( portSBP_TRAP, vSystemBusAndPeripheralsTrap ) )\r
 179         {\r
 180                 _debug();\r
 181         }\r
 182 \r
 183         if( 0 == _install_trap_handler ( portASSERT_TRAP, vAssertionTrap ) )\r
 184         {\r
 185                 _debug();\r
 186         }\r
 187 \r
 188         if( 0 == _install_trap_handler ( portNMI_TRAP, vNonMaskableInterruptTrap ) )\r
 189         {\r
 190                 _debug();\r
 191         }\r
 192 }\r
 193 /*-----------------------------------------------------------*/\r
 194 \r
 195 void vMMUTrap( int iTrapIdentification )\r
 196 {\r
 197         switch( iTrapIdentification )\r
 198         {\r
 199         case portTIN_MMU_VIRTUAL_ADDRESS_FILL:\r
 200         case portTIN_MMU_VIRTUAL_ADDRESS_PROTECTION:\r
 201         default:\r
 202                 _debug();\r
 203                 break;\r
 204         }\r
 205 }\r
 206 /*---------------------------------------------------------------------------*/\r
 207 \r
 208 void vInternalProtectionTrap( int iTrapIdentification )\r
 209 {\r
 210         /* Deliberate fall through to default. */\r
 211         switch( iTrapIdentification )\r
 212         {\r
 213                 case portTIN_IPT_PRIVILIGED_INSTRUCTION:\r
 214                         /* Instruction is not allowed at current execution level, eg DISABLE at User-0. */\r
 215 \r
 216                 case portTIN_IPT_MEMORY_PROTECTION_READ:\r
 217                         /* Load word using invalid address. */\r
 218                         \r
 219                 case portTIN_IPT_MEMORY_PROTECTION_WRITE:\r
 220                         /* Store Word using invalid address. */\r
 221                         \r
 222                 case portTIN_IPT_MEMORY_PROTECTION_EXECUTION:\r
 223                         /* PC jumped to an address outside of the valid range. */\r
 224                         \r
 225                 case portTIN_IPT_MEMORY_PROTECTION_PERIPHERAL_ACCESS:\r
 226                         /* Access to a peripheral denied at current execution level. */\r
 227                         \r
 228                 case portTIN_IPT_MEMORY_PROTECTION_NULL_ADDRESS:\r
 229                         /* NULL Pointer. */\r
 230                         \r
 231                 case portTIN_IPT_MEMORY_PROTECTION_GLOBAL_REGISTER_WRITE_PROTECTION:\r
 232                         /* Tried to modify a global address pointer register. */\r
 233                         \r
 234                 default:\r
 235                 \r
 236                         pxCurrentTCB[ 0 ] = _mfcr( $PCXI );\r
 237                         _debug();\r
 238                         break;\r
 239         }\r
 240 }\r
 241 /*---------------------------------------------------------------------------*/\r
 242 \r
 243 void vInstructionErrorTrap( int iTrapIdentification )\r
 244 {\r
 245         /* Deliberate fall through to default. */\r
 246         switch( iTrapIdentification )\r
 247         {\r
 248                 case portTIN_IE_ILLEGAL_OPCODE:\r
 249                 case portTIN_IE_UNIMPLEMENTED_OPCODE:\r
 250                 case portTIN_IE_INVALID_OPERAND:\r
 251                 case portTIN_IE_DATA_ADDRESS_ALIGNMENT:\r
 252                 case portTIN_IE_INVALID_LOCAL_MEMORY_ADDRESS:\r
 253                 default:\r
 254                         _debug();\r
 255                         break;\r
 256         }\r
 257 }\r
 258 /*---------------------------------------------------------------------------*/\r
 259 \r
 260 void vContextManagementTrap( int iTrapIdentification )\r
 261 {\r
 262         /* Deliberate fall through to default. */\r
 263         switch( iTrapIdentification )\r
 264         {\r
 265                 case portTIN_CM_FREE_CONTEXT_LIST_DEPLETION:\r
 266                 case portTIN_CM_CALL_DEPTH_OVERFLOW:\r
 267                 case portTIN_CM_CALL_DEPTH_UNDEFLOW:\r
 268                 case portTIN_CM_FREE_CONTEXT_LIST_UNDERFLOW:\r
 269                 case portTIN_CM_CALL_STACK_UNDERFLOW:\r
 270                 case portTIN_CM_CONTEXT_TYPE:\r
 271                 case portTIN_CM_NESTING_ERROR:\r
 272                 default:\r
 273                         _debug();\r
 274                         break;\r
 275         }\r
 276 }\r
 277 /*---------------------------------------------------------------------------*/\r
 278 \r
 279 void vSystemBusAndPeripheralsTrap( int iTrapIdentification )\r
 280 {\r
 281         /* Deliberate fall through to default. */\r
 282         switch( iTrapIdentification )\r
 283         {\r
 284                 case portTIN_SBP_PROGRAM_FETCH_SYNCHRONOUS_ERROR:\r
 285                 case portTIN_SBP_DATA_ACCESS_SYNCHRONOUS_ERROR:\r
 286                 case portTIN_SBP_DATA_ACCESS_ASYNCHRONOUS_ERROR:\r
 287                 case portTIN_SBP_COPROCESSOR_TRAP_ASYNCHRONOUS_ERROR:\r
 288                 case portTIN_SBP_PROGRAM_MEMORY_INTEGRITY_ERROR:\r
 289                 case portTIN_SBP_DATA_MEMORY_INTEGRITY_ERROR:\r
 290                 default:\r
 291                         _debug();\r
 292                         break;\r
 293         }\r
 294 }\r
 295 /*---------------------------------------------------------------------------*/\r
 296 \r
 297 void vAssertionTrap( int iTrapIdentification )\r
 298 {\r
 299         /* Deliberate fall through to default. */\r
 300         switch( iTrapIdentification )\r
 301         {\r
 302                 case portTIN_ASSERT_ARITHMETIC_OVERFLOW:\r
 303                 case portTIN_ASSERT_STICKY_ARITHMETIC_OVERFLOW:\r
 304                 default:\r
 305                         _debug();\r
 306                         break;\r
 307         }\r
 308 }\r
 309 /*---------------------------------------------------------------------------*/\r
 310 \r
 311 void vNonMaskableInterruptTrap( int iTrapIdentification )\r
 312 {\r
 313         /* Deliberate fall through to default. */\r
 314         switch( iTrapIdentification )\r
 315         {\r
 316                 case portTIN_NMI_NON_MASKABLE_INTERRUPT:\r
 317                 default:\r
 318                         _debug();\r
 319                         break;\r
 320         }\r
 321 }\r
 322 /*---------------------------------------------------------------------------*/\r