2 FreeRTOS V7.4.1 - Copyright (C) 2013 Real Time Engineers Ltd.
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4 FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
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5 http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 ***************************************************************************
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9 * FreeRTOS tutorial books are available in pdf and paperback. *
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10 * Complete, revised, and edited pdf reference manuals are also *
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13 * Purchasing FreeRTOS documentation will not only help you, by *
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14 * ensuring you get running as quickly as possible and with an *
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15 * in-depth knowledge of how to use FreeRTOS, it will also help *
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16 * the FreeRTOS project to continue with its mission of providing *
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17 * professional grade, cross platform, de facto standard solutions *
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18 * for microcontrollers - completely free of charge! *
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20 * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
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22 * Thank you for using FreeRTOS, and thank you for your support! *
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24 ***************************************************************************
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27 This file is part of the FreeRTOS distribution.
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29 FreeRTOS is free software; you can redistribute it and/or modify it under
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30 the terms of the GNU General Public License (version 2) as published by the
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31 Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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33 >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to
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34 distribute a combined work that includes FreeRTOS without being obliged to
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35 provide the source code for proprietary components outside of the FreeRTOS
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38 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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39 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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40 FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
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41 details. You should have received a copy of the GNU General Public License
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42 and the FreeRTOS license exception along with FreeRTOS; if not it can be
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43 viewed here: http://www.freertos.org/a00114.html and also obtained by
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44 writing to Real Time Engineers Ltd., contact details for whom are available
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45 on the FreeRTOS WEB site.
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49 ***************************************************************************
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51 * Having a problem? Start by reading the FAQ "My application does *
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52 * not run, what could be wrong?" *
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54 * http://www.FreeRTOS.org/FAQHelp.html *
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56 ***************************************************************************
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59 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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60 license and Real Time Engineers Ltd. contact details.
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62 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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63 including FreeRTOS+Trace - an indispensable productivity tool, and our new
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64 fully thread aware and reentrant UDP/IP stack.
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66 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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67 Integrity Systems, who sell the code with commercial support,
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68 indemnification and middleware, under the OpenRTOS brand.
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70 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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71 engineered and independently SIL3 certified version for use in safety and
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72 mission critical applications that require provable dependability.
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75 /* Kernel includes. */
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76 #include "FreeRTOS.h"
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78 /* Machine includes */
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80 #include <machine/intrinsics.h>
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81 #include <machine/cint.h>
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82 /*---------------------------------------------------------------------------*/
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85 * This reference is required by the Save/Restore Context Macros.
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87 extern volatile unsigned long *pxCurrentTCB;
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88 /*-----------------------------------------------------------*/
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91 * This file contains base definitions for all of the possible traps in the system.
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92 * It is suggested to provide implementations for all of the traps but for
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93 * the time being they simply trigger a DEBUG instruction so that it is easy
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94 * to see what caused a particular trap.
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96 * Trap Class 6, the SYSCALL, is used exclusively by the operating system.
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99 /* The Trap Classes. */
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100 #define portMMU_TRAP 0
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101 #define portIPT_TRAP 1
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102 #define portIE_TRAP 2
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103 #define portCM_TRAP 3
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104 #define portSBP_TRAP 4
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105 #define portASSERT_TRAP 5
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106 #define portNMI_TRAP 7
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108 /* MMU Trap Identifications. */
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109 #define portTIN_MMU_VIRTUAL_ADDRESS_FILL 0
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110 #define portTIN_MMU_VIRTUAL_ADDRESS_PROTECTION 1
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112 /* Internal Protection Trap Identifications. */
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113 #define portTIN_IPT_PRIVILIGED_INSTRUCTION 1
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114 #define portTIN_IPT_MEMORY_PROTECTION_READ 2
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115 #define portTIN_IPT_MEMORY_PROTECTION_WRITE 3
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116 #define portTIN_IPT_MEMORY_PROTECTION_EXECUTION 4
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117 #define portTIN_IPT_MEMORY_PROTECTION_PERIPHERAL_ACCESS 5
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118 #define portTIN_IPT_MEMORY_PROTECTION_NULL_ADDRESS 6
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119 #define portTIN_IPT_MEMORY_PROTECTION_GLOBAL_REGISTER_WRITE_PROTECTION 7
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121 /* Instruction Error Trap Identifications. */
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122 #define portTIN_IE_ILLEGAL_OPCODE 1
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123 #define portTIN_IE_UNIMPLEMENTED_OPCODE 2
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124 #define portTIN_IE_INVALID_OPERAND 3
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125 #define portTIN_IE_DATA_ADDRESS_ALIGNMENT 4
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126 #define portTIN_IE_INVALID_LOCAL_MEMORY_ADDRESS 5
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128 /* Context Management Trap Identifications. */
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129 #define portTIN_CM_FREE_CONTEXT_LIST_DEPLETION 1
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130 #define portTIN_CM_CALL_DEPTH_OVERFLOW 2
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131 #define portTIN_CM_CALL_DEPTH_UNDEFLOW 3
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132 #define portTIN_CM_FREE_CONTEXT_LIST_UNDERFLOW 4
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133 #define portTIN_CM_CALL_STACK_UNDERFLOW 5
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134 #define portTIN_CM_CONTEXT_TYPE 6
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135 #define portTIN_CM_NESTING_ERROR 7
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137 /* System Bus and Peripherals Trap Identifications. */
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138 #define portTIN_SBP_PROGRAM_FETCH_SYNCHRONOUS_ERROR 1
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139 #define portTIN_SBP_DATA_ACCESS_SYNCHRONOUS_ERROR 2
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140 #define portTIN_SBP_DATA_ACCESS_ASYNCHRONOUS_ERROR 3
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141 #define portTIN_SBP_COPROCESSOR_TRAP_ASYNCHRONOUS_ERROR 4
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142 #define portTIN_SBP_PROGRAM_MEMORY_INTEGRITY_ERROR 5
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143 #define portTIN_SBP_DATA_MEMORY_INTEGRITY_ERROR 6
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145 /* Assertion Trap Identifications. */
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146 #define portTIN_ASSERT_ARITHMETIC_OVERFLOW 1
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147 #define portTIN_ASSERT_STICKY_ARITHMETIC_OVERFLOW 2
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149 /* Non-maskable Interrupt Trap Identifications. */
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150 #define portTIN_NMI_NON_MASKABLE_INTERRUPT 0
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151 /*---------------------------------------------------------------------------*/
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153 void vMMUTrap( int iTrapIdentification ) __attribute__( ( longcall, weak ) );
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154 void vInternalProtectionTrap( int iTrapIdentification ) __attribute__( ( longcall, weak ) );
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155 void vInstructionErrorTrap( int iTrapIdentification ) __attribute__( ( longcall, weak ) );
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156 void vContextManagementTrap( int iTrapIdentification ) __attribute__( ( longcall, weak ) );
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157 void vSystemBusAndPeripheralsTrap( int iTrapIdentification ) __attribute__( ( longcall, weak ) );
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158 void vAssertionTrap( int iTrapIdentification ) __attribute__( ( longcall, weak ) );
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159 void vNonMaskableInterruptTrap( int iTrapIdentification ) __attribute__( ( longcall, weak ) );
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160 /*---------------------------------------------------------------------------*/
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162 void vTrapInstallHandlers( void )
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164 if( 0 == _install_trap_handler ( portMMU_TRAP, vMMUTrap ) )
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169 if( 0 == _install_trap_handler ( portIPT_TRAP, vInternalProtectionTrap ) )
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174 if( 0 == _install_trap_handler ( portIE_TRAP, vInstructionErrorTrap ) )
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179 if( 0 == _install_trap_handler ( portCM_TRAP, vContextManagementTrap ) )
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184 if( 0 == _install_trap_handler ( portSBP_TRAP, vSystemBusAndPeripheralsTrap ) )
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189 if( 0 == _install_trap_handler ( portASSERT_TRAP, vAssertionTrap ) )
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194 if( 0 == _install_trap_handler ( portNMI_TRAP, vNonMaskableInterruptTrap ) )
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199 /*-----------------------------------------------------------*/
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201 void vMMUTrap( int iTrapIdentification )
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203 switch( iTrapIdentification )
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205 case portTIN_MMU_VIRTUAL_ADDRESS_FILL:
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206 case portTIN_MMU_VIRTUAL_ADDRESS_PROTECTION:
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212 /*---------------------------------------------------------------------------*/
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214 void vInternalProtectionTrap( int iTrapIdentification )
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216 /* Deliberate fall through to default. */
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217 switch( iTrapIdentification )
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219 case portTIN_IPT_PRIVILIGED_INSTRUCTION:
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220 /* Instruction is not allowed at current execution level, eg DISABLE at User-0. */
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222 case portTIN_IPT_MEMORY_PROTECTION_READ:
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223 /* Load word using invalid address. */
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225 case portTIN_IPT_MEMORY_PROTECTION_WRITE:
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226 /* Store Word using invalid address. */
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228 case portTIN_IPT_MEMORY_PROTECTION_EXECUTION:
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229 /* PC jumped to an address outside of the valid range. */
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231 case portTIN_IPT_MEMORY_PROTECTION_PERIPHERAL_ACCESS:
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232 /* Access to a peripheral denied at current execution level. */
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234 case portTIN_IPT_MEMORY_PROTECTION_NULL_ADDRESS:
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235 /* NULL Pointer. */
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237 case portTIN_IPT_MEMORY_PROTECTION_GLOBAL_REGISTER_WRITE_PROTECTION:
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238 /* Tried to modify a global address pointer register. */
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242 pxCurrentTCB[ 0 ] = _mfcr( $PCXI );
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247 /*---------------------------------------------------------------------------*/
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249 void vInstructionErrorTrap( int iTrapIdentification )
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251 /* Deliberate fall through to default. */
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252 switch( iTrapIdentification )
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254 case portTIN_IE_ILLEGAL_OPCODE:
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255 case portTIN_IE_UNIMPLEMENTED_OPCODE:
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256 case portTIN_IE_INVALID_OPERAND:
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257 case portTIN_IE_DATA_ADDRESS_ALIGNMENT:
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258 case portTIN_IE_INVALID_LOCAL_MEMORY_ADDRESS:
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264 /*---------------------------------------------------------------------------*/
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266 void vContextManagementTrap( int iTrapIdentification )
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268 /* Deliberate fall through to default. */
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269 switch( iTrapIdentification )
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271 case portTIN_CM_FREE_CONTEXT_LIST_DEPLETION:
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272 case portTIN_CM_CALL_DEPTH_OVERFLOW:
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273 case portTIN_CM_CALL_DEPTH_UNDEFLOW:
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274 case portTIN_CM_FREE_CONTEXT_LIST_UNDERFLOW:
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275 case portTIN_CM_CALL_STACK_UNDERFLOW:
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276 case portTIN_CM_CONTEXT_TYPE:
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277 case portTIN_CM_NESTING_ERROR:
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283 /*---------------------------------------------------------------------------*/
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285 void vSystemBusAndPeripheralsTrap( int iTrapIdentification )
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287 /* Deliberate fall through to default. */
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288 switch( iTrapIdentification )
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290 case portTIN_SBP_PROGRAM_FETCH_SYNCHRONOUS_ERROR:
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291 case portTIN_SBP_DATA_ACCESS_SYNCHRONOUS_ERROR:
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292 case portTIN_SBP_DATA_ACCESS_ASYNCHRONOUS_ERROR:
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293 case portTIN_SBP_COPROCESSOR_TRAP_ASYNCHRONOUS_ERROR:
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294 case portTIN_SBP_PROGRAM_MEMORY_INTEGRITY_ERROR:
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295 case portTIN_SBP_DATA_MEMORY_INTEGRITY_ERROR:
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301 /*---------------------------------------------------------------------------*/
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303 void vAssertionTrap( int iTrapIdentification )
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305 /* Deliberate fall through to default. */
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306 switch( iTrapIdentification )
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308 case portTIN_ASSERT_ARITHMETIC_OVERFLOW:
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309 case portTIN_ASSERT_STICKY_ARITHMETIC_OVERFLOW:
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315 /*---------------------------------------------------------------------------*/
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317 void vNonMaskableInterruptTrap( int iTrapIdentification )
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319 /* Deliberate fall through to default. */
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320 switch( iTrapIdentification )
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322 case portTIN_NMI_NON_MASKABLE_INTERRUPT:
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328 /*---------------------------------------------------------------------------*/
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