]> git.sur5r.net Git - freertos/blob - FreeRTOS/Source/portable/IAR/ARM_CM0/portasm.s
Add additional critical section to the default tickless implementations.
[freertos] / FreeRTOS / Source / portable / IAR / ARM_CM0 / portasm.s
1 /*\r
2     FreeRTOS V7.5.2 - Copyright (C) 2013 Real Time Engineers Ltd.\r
3 \r
4     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
5 \r
6     ***************************************************************************\r
7      *                                                                       *\r
8      *    FreeRTOS provides completely free yet professionally developed,    *\r
9      *    robust, strictly quality controlled, supported, and cross          *\r
10      *    platform software that has become a de facto standard.             *\r
11      *                                                                       *\r
12      *    Help yourself get started quickly and support the FreeRTOS         *\r
13      *    project by purchasing a FreeRTOS tutorial book, reference          *\r
14      *    manual, or both from: http://www.FreeRTOS.org/Documentation        *\r
15      *                                                                       *\r
16      *    Thank you!                                                         *\r
17      *                                                                       *\r
18     ***************************************************************************\r
19 \r
20     This file is part of the FreeRTOS distribution.\r
21 \r
22     FreeRTOS is free software; you can redistribute it and/or modify it under\r
23     the terms of the GNU General Public License (version 2) as published by the\r
24     Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
25 \r
26     >>! NOTE: The modification to the GPL is included to allow you to distribute\r
27     >>! a combined work that includes FreeRTOS without being obliged to provide\r
28     >>! the source code for proprietary components outside of the FreeRTOS\r
29     >>! kernel.\r
30 \r
31     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
32     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
33     FOR A PARTICULAR PURPOSE.  Full license text is available from the following\r
34     link: http://www.freertos.org/a00114.html\r
35 \r
36     1 tab == 4 spaces!\r
37 \r
38     ***************************************************************************\r
39      *                                                                       *\r
40      *    Having a problem?  Start by reading the FAQ "My application does   *\r
41      *    not run, what could be wrong?"                                     *\r
42      *                                                                       *\r
43      *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
44      *                                                                       *\r
45     ***************************************************************************\r
46 \r
47     http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
48     license and Real Time Engineers Ltd. contact details.\r
49 \r
50     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
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52     compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
53 \r
54     http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
55     Integrity Systems to sell under the OpenRTOS brand.  Low cost OpenRTOS\r
56     licenses offer ticketed support, indemnification and middleware.\r
57 \r
58     http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
59     engineered and independently SIL3 certified version for use in safety and\r
60     mission critical applications that require provable dependability.\r
61 \r
62     1 tab == 4 spaces!\r
63 */\r
64 \r
65 #include <FreeRTOSConfig.h>\r
66 \r
67 /* For backward compatibility, ensure configKERNEL_INTERRUPT_PRIORITY is\r
68 defined.  The value zero should also ensure backward compatibility.\r
69 FreeRTOS.org versions prior to V4.3.0 did not include this definition. */\r
70 #ifndef configKERNEL_INTERRUPT_PRIORITY\r
71         #define configKERNEL_INTERRUPT_PRIORITY 0\r
72 #endif\r
73 \r
74         \r
75         RSEG    CODE:CODE(2)\r
76         thumb\r
77 \r
78         EXTERN vPortYieldFromISR\r
79         EXTERN pxCurrentTCB\r
80         EXTERN vTaskSwitchContext\r
81 \r
82         PUBLIC vSetMSP\r
83         PUBLIC xPortPendSVHandler\r
84         PUBLIC vPortSVCHandler\r
85         PUBLIC vPortStartFirstTask\r
86 \r
87 \r
88 /*-----------------------------------------------------------*/\r
89 \r
90 vSetMSP\r
91         msr msp, r0\r
92         bx lr\r
93         \r
94 /*-----------------------------------------------------------*/\r
95 \r
96 xPortPendSVHandler:\r
97         mrs r0, psp                                                     \r
98                                                                                         \r
99         ldr     r3, =pxCurrentTCB       /* Get the location of the current TCB. */\r
100         ldr     r2, [r3]                                                \r
101                                                                                         \r
102         subs r0, r0, #32                /* Make space for the remaining low registers. */\r
103         str r0, [r2]                    /* Save the new top of stack. */\r
104         stmia r0!, {r4-r7}              /* Store the low registers that are not saved automatically. */\r
105         mov r4, r8                              /* Store the high registers. */\r
106         mov r5, r9                                                      \r
107         mov r6, r10                                                     \r
108         mov r7, r11                                                     \r
109         stmia r0!, {r4-r7}                      \r
110                                                                                         \r
111         push {r3, r14}                                          \r
112         cpsid i                                                         \r
113         bl vTaskSwitchContext                           \r
114         cpsie i                                                         \r
115         pop {r2, r3}                    /* lr goes in r3. r2 now holds tcb pointer. */\r
116                                                                                         \r
117         ldr r1, [r2]                                            \r
118         ldr r0, [r1]                    /* The first item in pxCurrentTCB is the task top of stack. */\r
119         adds r0, r0, #16                /* Move to the high registers. */\r
120         ldmia r0!, {r4-r7}              /* Pop the high registers. */\r
121         mov r8, r4                                                      \r
122         mov r9, r5                                                      \r
123         mov r10, r6                                                     \r
124         mov r11, r7                                                     \r
125                                                                                         \r
126         msr psp, r0                             /* Remember the new top of stack for the task. */\r
127                                                                                         \r
128         subs r0, r0, #32                /* Go back for the low registers that are not automatically restored. */\r
129         ldmia r0!, {r4-r7}              /* Pop low registers.  */\r
130                                                                                         \r
131         bx r3                                                           \r
132 \r
133 /*-----------------------------------------------------------*/\r
134 \r
135 vPortSVCHandler;\r
136         ldr     r3, =pxCurrentTCB       /* Restore the context. */\r
137         ldr r1, [r3]                    /* Get the pxCurrentTCB address. */\r
138         ldr r0, [r1]                    /* The first item in pxCurrentTCB is the task top of stack. */\r
139         adds r0, r0, #16                /* Move to the high registers. */\r
140         ldmia r0!, {r4-r7}              /* Pop the high registers. */\r
141         mov r8, r4                                              \r
142         mov r9, r5                                              \r
143         mov r10, r6                                             \r
144         mov r11, r7                                             \r
145                                                                                 \r
146         msr psp, r0                             /* Remember the new top of stack for the task. */\r
147                                                                                 \r
148         subs r0, r0, #32                /* Go back for the low registers that are not automatically restored. */\r
149         ldmia r0!, {r4-r7}              /* Pop low registers.  */\r
150         mov r1, r14                             /* OR R14 with 0x0d. */\r
151         movs r0, #0x0d                                  \r
152         orrs r1, r0                                             \r
153         bx r1                                                   \r
154 \r
155 /*-----------------------------------------------------------*/\r
156 \r
157 vPortStartFirstTask\r
158         movs r0, #0x00                  /* Locate the top of stack. */\r
159         ldr r0, [r0]            \r
160         msr msp, r0                             /* Set the msp back to the start of the stack. */\r
161         cpsie i                                 /* Globally enable interrupts. */\r
162         svc 0                                   /* System call to start first task. */\r
163         nop                             \r
164         \r
165         END\r
166