2 * FreeRTOS Kernel V10.2.1
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3 * Copyright (C) 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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5 * Permission is hereby granted, free of charge, to any person obtaining a copy of
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6 * this software and associated documentation files (the "Software"), to deal in
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7 * the Software without restriction, including without limitation the rights to
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8 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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9 * the Software, and to permit persons to whom the Software is furnished to do so,
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10 * subject to the following conditions:
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12 * The above copyright notice and this permission notice shall be included in all
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13 * copies or substantial portions of the Software.
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15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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17 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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18 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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19 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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20 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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22 * http://www.FreeRTOS.org
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23 * http://aws.amazon.com/freertos
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25 * 1 tab == 4 spaces!
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35 /*------------------------------------------------------------------------------
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36 * Port specific definitions.
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38 * The settings in this file configure FreeRTOS correctly for the given hardware
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41 * These settings should not be altered.
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42 *------------------------------------------------------------------------------
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45 #ifndef configENABLE_FPU
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46 #error configENABLE_FPU must be defined in FreeRTOSConfig.h. Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
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47 #endif /* configENABLE_FPU */
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49 #ifndef configENABLE_MPU
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50 #error configENABLE_MPU must be defined in FreeRTOSConfig.h. Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
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51 #endif /* configENABLE_MPU */
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53 #ifndef configENABLE_TRUSTZONE
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54 #error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h. Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
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55 #endif /* configENABLE_TRUSTZONE */
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57 /*-----------------------------------------------------------*/
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60 * @brief Type definitions.
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62 #define portCHAR char
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63 #define portFLOAT float
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64 #define portDOUBLE double
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65 #define portLONG long
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66 #define portSHORT short
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67 #define portSTACK_TYPE uint32_t
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68 #define portBASE_TYPE long
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70 typedef portSTACK_TYPE StackType_t;
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71 typedef long BaseType_t;
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72 typedef unsigned long UBaseType_t;
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74 #if( configUSE_16_BIT_TICKS == 1 )
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75 typedef uint16_t TickType_t;
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76 #define portMAX_DELAY ( TickType_t ) 0xffff
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78 typedef uint32_t TickType_t;
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79 #define portMAX_DELAY ( TickType_t ) 0xffffffffUL
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81 /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
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82 * not need to be guarded with a critical section. */
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83 #define portTICK_TYPE_IS_ATOMIC 1
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85 /*-----------------------------------------------------------*/
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88 * Architecture specifics.
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90 #define portARCH_NAME "Cortex-M33"
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91 #define portSTACK_GROWTH ( -1 )
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92 #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
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93 #define portBYTE_ALIGNMENT 8
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95 #define portINLINE __inline
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96 #ifndef portFORCE_INLINE
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97 #define portFORCE_INLINE inline __attribute__(( always_inline ))
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99 #define portHAS_STACK_OVERFLOW_CHECKING 1
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100 #define portDONT_DISCARD __root
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101 /*-----------------------------------------------------------*/
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104 * @brief Extern declarations.
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106 extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
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108 extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
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109 extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
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111 extern uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
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112 extern void vClearInterruptMaskFromISR( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
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114 #if( configENABLE_TRUSTZONE == 1 )
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115 extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
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116 extern void vPortFreeSecureContext( uint32_t *pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
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117 #endif /* configENABLE_TRUSTZONE */
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119 #if( configENABLE_MPU == 1 )
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120 extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
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121 extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
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122 #endif /* configENABLE_MPU */
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123 /*-----------------------------------------------------------*/
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126 * @brief MPU specific constants.
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128 #if( configENABLE_MPU == 1 )
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129 #define portUSING_MPU_WRAPPERS 1
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130 #define portPRIVILEGE_BIT ( 0x80000000UL )
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132 #define portPRIVILEGE_BIT ( 0x0UL )
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133 #endif /* configENABLE_MPU */
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137 #define portPRIVILEGED_FLASH_REGION ( 0UL )
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138 #define portUNPRIVILEGED_FLASH_REGION ( 1UL )
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139 #define portUNPRIVILEGED_SYSCALLS_REGION ( 2UL )
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140 #define portPRIVILEGED_RAM_REGION ( 3UL )
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141 #define portSTACK_REGION ( 4UL )
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142 #define portFIRST_CONFIGURABLE_REGION ( 5UL )
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143 #define portLAST_CONFIGURABLE_REGION ( 7UL )
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144 #define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
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145 #define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
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147 /* Device memory attributes used in MPU_MAIR registers.
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149 * 8-bit values encoded as follows:
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150 * Bit[7:4] - 0000 - Device Memory
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151 * Bit[3:2] - 00 --> Device-nGnRnE
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152 * 01 --> Device-nGnRE
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153 * 10 --> Device-nGRE
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154 * 11 --> Device-GRE
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155 * Bit[1:0] - 00, Reserved.
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157 #define portMPU_DEVICE_MEMORY_nGnRnE ( 0x00 ) /* 0000 0000 */
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158 #define portMPU_DEVICE_MEMORY_nGnRE ( 0x04 ) /* 0000 0100 */
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159 #define portMPU_DEVICE_MEMORY_nGRE ( 0x08 ) /* 0000 1000 */
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160 #define portMPU_DEVICE_MEMORY_GRE ( 0x0C ) /* 0000 1100 */
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162 /* Normal memory attributes used in MPU_MAIR registers. */
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163 #define portMPU_NORMAL_MEMORY_NON_CACHEABLE ( 0x44 ) /* Non-cacheable. */
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164 #define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE ( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
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166 /* Attributes used in MPU_RBAR registers. */
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167 #define portMPU_REGION_NON_SHAREABLE ( 0UL << 3UL )
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168 #define portMPU_REGION_INNER_SHAREABLE ( 1UL << 3UL )
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169 #define portMPU_REGION_OUTER_SHAREABLE ( 2UL << 3UL )
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171 #define portMPU_REGION_PRIVILEGED_READ_WRITE ( 0UL << 1UL )
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172 #define portMPU_REGION_READ_WRITE ( 1UL << 1UL )
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173 #define portMPU_REGION_PRIVILEGED_READ_ONLY ( 2UL << 1UL )
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174 #define portMPU_REGION_READ_ONLY ( 3UL << 1UL )
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176 #define portMPU_REGION_EXECUTE_NEVER ( 1UL )
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177 /*-----------------------------------------------------------*/
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180 * @brief Settings to define an MPU region.
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182 typedef struct MPURegionSettings
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184 uint32_t ulRBAR; /**< RBAR for the region. */
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185 uint32_t ulRLAR; /**< RLAR for the region. */
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186 } MPURegionSettings_t;
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189 * @brief MPU settings as stored in the TCB.
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191 typedef struct MPU_SETTINGS
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193 uint32_t ulMAIR0; /**< MAIR0 for the task containing attributes for all the 4 per task regions. */
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194 MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
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196 /*-----------------------------------------------------------*/
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199 * @brief SVC numbers.
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201 #define portSVC_ALLOCATE_SECURE_CONTEXT 0
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202 #define portSVC_FREE_SECURE_CONTEXT 1
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203 #define portSVC_START_SCHEDULER 2
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204 #define portSVC_RAISE_PRIVILEGE 3
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205 /*-----------------------------------------------------------*/
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208 * @brief Scheduler utilities.
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210 #define portYIELD() vPortYield()
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211 #define portNVIC_INT_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
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212 #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
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213 #define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
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214 #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
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215 /*-----------------------------------------------------------*/
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218 * @brief Critical section management.
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220 #define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMaskFromISR()
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221 #define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vClearInterruptMaskFromISR( x )
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222 #define portDISABLE_INTERRUPTS() __asm volatile ( " cpsid i " ::: "memory" )
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223 #define portENABLE_INTERRUPTS() __asm volatile ( " cpsie i " ::: "memory" )
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224 #define portENTER_CRITICAL() vPortEnterCritical()
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225 #define portEXIT_CRITICAL() vPortExitCritical()
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226 /*-----------------------------------------------------------*/
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229 * @brief Task function macros as described on the FreeRTOS.org WEB site.
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231 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
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232 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
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233 /*-----------------------------------------------------------*/
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235 #if( configENABLE_TRUSTZONE == 1 )
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237 * @brief Allocate a secure context for the task.
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239 * Tasks are not created with a secure context. Any task that is going to call
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240 * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
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241 * secure context before it calls any secure function.
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243 * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
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245 #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize ) vPortAllocateSecureContext( ulSecureStackSize )
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248 * @brief Called when a task is deleted to delete the task's secure context,
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251 * @param[in] pxTCB The TCB of the task being deleted.
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253 #define portCLEAN_UP_TCB( pxTCB ) vPortFreeSecureContext( ( uint32_t * ) pxTCB )
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255 #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
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256 #define portCLEAN_UP_TCB( pxTCB )
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257 #endif /* configENABLE_TRUSTZONE */
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258 /*-----------------------------------------------------------*/
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260 #if( configENABLE_MPU == 1 )
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262 * @brief Checks whether or not the processor is privileged.
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264 * @return 1 if the processor is already privileged, 0 otherwise.
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266 #define portIS_PRIVILEGED() xIsPrivileged()
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269 * @brief Raise an SVC request to raise privilege.
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271 * The SVC handler checks that the SVC was raised from a system call and only
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272 * then it raises the privilege. If this is called from any other place,
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273 * the privilege is not raised.
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275 #define portRAISE_PRIVILEGE() __asm volatile ( "svc %0 \n" :: "i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
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278 * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
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281 #define portRESET_PRIVILEGE() vResetPrivilege()
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283 #define portIS_PRIVILEGED()
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284 #define portRAISE_PRIVILEGE()
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285 #define portRESET_PRIVILEGE()
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286 #endif /* configENABLE_MPU */
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287 /*-----------------------------------------------------------*/
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292 #define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )
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293 /*-----------------------------------------------------------*/
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295 /* Suppress warnings that are generated by the IAR tools, but cannot be fixed in
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296 * the source code because to do so would cause other compilers to generate
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298 #pragma diag_suppress=Be006
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299 #pragma diag_suppress=Pa082
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300 /*-----------------------------------------------------------*/
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306 #endif /* PORTMACRO_H */
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