2 * FreeRTOS Kernel V10.2.1
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3 * Copyright (C) 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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5 * Permission is hereby granted, free of charge, to any person obtaining a copy of
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6 * this software and associated documentation files (the "Software"), to deal in
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7 * the Software without restriction, including without limitation the rights to
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8 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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9 * the Software, and to permit persons to whom the Software is furnished to do so,
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10 * subject to the following conditions:
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12 * The above copyright notice and this permission notice shall be included in all
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13 * copies or substantial portions of the Software.
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15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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17 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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18 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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19 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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20 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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22 * http://www.FreeRTOS.org
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23 * http://aws.amazon.com/freertos
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25 * 1 tab == 4 spaces!
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28 #include <FreeRTOSConfig.h>
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34 EXTERN vTaskSwitchContext
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35 EXTERN vPortSVCHandler_C
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37 PUBLIC xPortPendSVHandler
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38 PUBLIC vPortSVCHandler
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39 PUBLIC vPortStartFirstTask
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40 PUBLIC vPortEnableVFP
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41 PUBLIC vPortRestoreContextOfFirstTask
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42 PUBLIC xIsPrivileged
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43 PUBLIC vResetPrivilege
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45 /*-----------------------------------------------------------*/
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50 /* Get the location of the current TCB. */
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51 ldr r3, =pxCurrentTCB
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54 /* Is the task using the FPU context? If so, push high vfp registers. */
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57 vstmdbeq r0!, {s16-s31}
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59 /* Save the core registers. */
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61 stmdb r0!, {r1, r4-r11, r14}
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63 /* Save the new top of stack into the first member of the TCB. */
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67 mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY
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71 bl vTaskSwitchContext
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76 /* The first item in pxCurrentTCB is the task top of stack. */
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79 /* Move onto the second item in the TCB... */
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81 /* Region Base Address register. */
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83 /* Read 4 sets of MPU registers. */
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85 /* Write 4 sets of MPU registers. */
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87 /* Pop the registers that are not automatically saved on exception entry. */
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88 ldmia r0!, {r3-r11, r14}
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91 /* Is the task using the FPU context? If so, pop the high vfp registers
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95 vldmiaeq r0!, {s16-s31}
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103 /*-----------------------------------------------------------*/
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106 #ifndef USE_PROCESS_STACK /* Code should not be required if a main() is using the process stack. */
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114 b vPortSVCHandler_C
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116 /*-----------------------------------------------------------*/
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118 vPortStartFirstTask:
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119 /* Use the NVIC offset register to locate the stack. */
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120 ldr r0, =0xE000ED08
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123 /* Set the msp back to the start of the stack. */
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125 /* Clear the bit that indicates the FPU is in use in case the FPU was used
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126 before the scheduler was started - which would otherwise result in the
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127 unnecessary leaving of space in the SVC stack for lazy saving of FPU
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131 /* Call SVC to start the first task. */
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138 /*-----------------------------------------------------------*/
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140 vPortRestoreContextOfFirstTask:
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141 /* Use the NVIC offset register to locate the stack. */
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142 ldr r0, =0xE000ED08
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145 /* Set the msp back to the start of the stack. */
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147 /* Restore the context. */
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148 ldr r3, =pxCurrentTCB
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150 /* The first item in the TCB is the task top of stack. */
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152 /* Move onto the second item in the TCB... */
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154 /* Region Base Address register. */
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155 ldr r2, =0xe000ed9c
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156 /* Read 4 sets of MPU registers. */
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157 ldmia r1!, {r4-r11}
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158 /* Write 4 sets of MPU registers. */
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159 stmia r2!, {r4-r11}
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160 /* Pop the registers that are not automatically saved on exception entry. */
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161 ldmia r0!, {r3-r11, r14}
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163 /* Restore the task stack pointer. */
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169 /*-----------------------------------------------------------*/
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172 /* The FPU enable bits are in the CPACR. */
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173 ldr.w r0, =0xE000ED88
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176 /* Enable CP10 and CP11 coprocessors, then save back. */
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177 orr r1, r1, #( 0xf << 20 )
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181 /*-----------------------------------------------------------*/
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184 mrs r0, control /* r0 = CONTROL. */
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185 tst r0, #1 /* Perform r0 & 1 (bitwise AND) and update the conditions flag. */
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187 movne r0, #0 /* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
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188 moveq r0, #1 /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
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189 bx lr /* Return. */
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190 /*-----------------------------------------------------------*/
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193 mrs r0, control /* r0 = CONTROL. */
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194 orr r0, r0, #1 /* r0 = r0 | 1. */
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195 msr control, r0 /* CONTROL = r0. */
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196 bx lr /* Return to the caller. */
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197 /*-----------------------------------------------------------*/
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