1 /*This file has been prepared for Doxygen automatic documentation generation.*/
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2 /*! \file *********************************************************************
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4 * \brief FreeRTOS port source for AVR32 UC3.
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6 * - Compiler: IAR EWAVR32
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7 * - Supported devices: All AVR32 devices can be used.
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10 * \author Atmel Corporation: http://www.atmel.com \n
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11 * Support and FAQ: http://support.atmel.no/
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13 *****************************************************************************/
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16 FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.
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19 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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21 This file is part of the FreeRTOS distribution.
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23 FreeRTOS is free software; you can redistribute it and/or modify it under
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24 the terms of the GNU General Public License (version 2) as published by the
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25 Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
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27 ***************************************************************************
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28 >>! NOTE: The modification to the GPL is included to allow you to !<<
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29 >>! distribute a combined work that includes FreeRTOS without being !<<
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30 >>! obliged to provide the source code for proprietary components !<<
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31 >>! outside of the FreeRTOS kernel. !<<
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32 ***************************************************************************
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34 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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35 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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36 FOR A PARTICULAR PURPOSE. Full license text is available on the following
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37 link: http://www.freertos.org/a00114.html
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39 ***************************************************************************
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41 * FreeRTOS provides completely free yet professionally developed, *
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42 * robust, strictly quality controlled, supported, and cross *
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43 * platform software that is more than just the market leader, it *
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44 * is the industry's de facto standard. *
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46 * Help yourself get started quickly while simultaneously helping *
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47 * to support the FreeRTOS project by purchasing a FreeRTOS *
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48 * tutorial book, reference manual, or both: *
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49 * http://www.FreeRTOS.org/Documentation *
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51 ***************************************************************************
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53 http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
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54 the FAQ page "My application does not run, what could be wrong?". Have you
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55 defined configASSERT()?
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57 http://www.FreeRTOS.org/support - In return for receiving this top quality
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58 embedded software for free we request you assist our global community by
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59 participating in the support forum.
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61 http://www.FreeRTOS.org/training - Investing in training allows your team to
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62 be as productive as possible as early as possible. Now you can receive
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63 FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
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64 Ltd, and the world's leading authority on the world's leading RTOS.
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66 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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67 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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68 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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70 http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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71 Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
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73 http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
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74 Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
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75 licenses offer ticketed support, indemnification and commercial middleware.
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77 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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78 engineered and independently SIL3 certified version for use in safety and
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79 mission critical applications that require provable dependability.
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85 /* Scheduler includes. */
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86 #include "FreeRTOS.h"
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89 /* AVR32 UC3 includes. */
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90 #include <avr32/io.h>
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91 #include <intrinsics.h>
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98 #if( configTICK_USE_TC==1 )
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103 /* Constants required to setup the task context. */
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104 #define portINITIAL_SR ( ( StackType_t ) 0x00400000 ) /* AVR32 : [M2:M0]=001 I1M=0 I0M=0, GM=0 */
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105 #define portINSTRUCTION_SIZE ( ( StackType_t ) 0 )
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107 /* Each task maintains its own critical nesting variable. */
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108 #define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
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109 volatile uint32_t ulCriticalNesting = 9999UL;
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111 #if( configTICK_USE_TC==0 )
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112 static void prvScheduleNextTick( void );
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114 static void prvClearTcInt( void );
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117 /* Setup the timer to generate the tick interrupts. */
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118 static void prvSetupTimerInterrupt( void );
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120 /*-----------------------------------------------------------*/
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123 * Low-level initialization routine called during startup, before the main
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126 int __low_level_init(void)
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128 #if configHEAP_INIT
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129 #pragma segment = "HEAP"
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133 /* Enable exceptions. */
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134 ENABLE_ALL_EXCEPTIONS();
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136 /* Initialize interrupt handling. */
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137 INTC_init_interrupts();
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139 #if configHEAP_INIT
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141 /* Initialize the heap used by malloc. */
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142 for( pxMem = __segment_begin( "HEAP" ); pxMem < ( BaseType_t * ) __segment_end( "HEAP" ); )
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144 *pxMem++ = 0xA5A5A5A5;
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149 /* Code section present if and only if the debug trace is activated. */
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152 static const gpio_map_t DBG_USART_GPIO_MAP =
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154 { configDBG_USART_RX_PIN, configDBG_USART_RX_FUNCTION },
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155 { configDBG_USART_TX_PIN, configDBG_USART_TX_FUNCTION }
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158 static const usart_options_t DBG_USART_OPTIONS =
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160 .baudrate = configDBG_USART_BAUDRATE,
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162 .paritytype = USART_NO_PARITY,
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163 .stopbits = USART_1_STOPBIT,
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164 .channelmode = USART_NORMAL_CHMODE
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167 /* Initialize the USART used for the debug trace with the configured parameters. */
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168 extern volatile avr32_usart_t *volatile stdio_usart_base;
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169 stdio_usart_base = configDBG_USART;
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170 gpio_enable_module( DBG_USART_GPIO_MAP,
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171 sizeof( DBG_USART_GPIO_MAP ) / sizeof( DBG_USART_GPIO_MAP[0] ) );
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172 usart_init_rs232(configDBG_USART, &DBG_USART_OPTIONS, configCPU_CLOCK_HZ);
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176 /* Request initialization of data segments. */
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179 /*-----------------------------------------------------------*/
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181 /* Added as there is no such function in FreeRTOS. */
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182 void *pvPortRealloc( void *pv, size_t xWantedSize )
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188 pvReturn = realloc( pv, xWantedSize );
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194 /*-----------------------------------------------------------*/
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196 /* The cooperative scheduler requires a normal IRQ service routine to
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197 simply increment the system tick. */
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198 /* The preemptive scheduler is defined as "naked" as the full context is saved
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199 on entry as part of the context switch. */
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200 #pragma shadow_registers = full // Naked.
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201 static void vTick( void )
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203 /* Save the context of the interrupted task. */
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204 portSAVE_CONTEXT_OS_INT();
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206 #if( configTICK_USE_TC==1 )
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207 /* Clear the interrupt flag. */
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210 /* Schedule the COUNT&COMPARE match interrupt in (configCPU_CLOCK_HZ/configTICK_RATE_HZ)
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211 clock cycles from now. */
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212 prvScheduleNextTick();
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215 /* Because FreeRTOS is not supposed to run with nested interrupts, put all OS
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216 calls in a critical section . */
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217 portENTER_CRITICAL();
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218 xTaskIncrementTick();
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219 portEXIT_CRITICAL();
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221 /* Restore the context of the "elected task". */
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222 portRESTORE_CONTEXT_OS_INT();
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224 /*-----------------------------------------------------------*/
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226 #pragma shadow_registers = full // Naked.
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227 void SCALLYield( void )
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229 /* Save the context of the interrupted task. */
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230 portSAVE_CONTEXT_SCALL();
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231 vTaskSwitchContext();
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232 portRESTORE_CONTEXT_SCALL();
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234 /*-----------------------------------------------------------*/
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236 /* The code generated by the GCC compiler uses the stack in different ways at
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237 different optimisation levels. The interrupt flags can therefore not always
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238 be saved to the stack. Instead the critical section nesting level is stored
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239 in a variable, which is then saved as part of the stack context. */
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240 #pragma optimize = no_inline
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241 void vPortEnterCritical( void )
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243 /* Disable interrupts */
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244 portDISABLE_INTERRUPTS();
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246 /* Now interrupts are disabled ulCriticalNesting can be accessed
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247 directly. Increment ulCriticalNesting to keep a count of how many times
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248 portENTER_CRITICAL() has been called. */
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249 ulCriticalNesting++;
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251 /*-----------------------------------------------------------*/
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253 #pragma optimize = no_inline
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254 void vPortExitCritical( void )
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256 if(ulCriticalNesting > portNO_CRITICAL_NESTING)
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258 ulCriticalNesting--;
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259 if( ulCriticalNesting == portNO_CRITICAL_NESTING )
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261 /* Enable all interrupt/exception. */
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262 portENABLE_INTERRUPTS();
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266 /*-----------------------------------------------------------*/
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269 * Initialise the stack of a task to look exactly as if a call to
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270 * portSAVE_CONTEXT had been called.
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272 * See header file for description.
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274 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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276 /* Setup the initial stack of the task. The stack is set exactly as
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277 expected by the portRESTORE_CONTEXT() macro. */
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279 /* When the task starts, it will expect to find the function parameter in R12. */
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281 *pxTopOfStack-- = ( StackType_t ) 0x08080808; /* R8 */
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282 *pxTopOfStack-- = ( StackType_t ) 0x09090909; /* R9 */
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283 *pxTopOfStack-- = ( StackType_t ) 0x0A0A0A0A; /* R10 */
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284 *pxTopOfStack-- = ( StackType_t ) 0x0B0B0B0B; /* R11 */
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285 *pxTopOfStack-- = ( StackType_t ) pvParameters; /* R12 */
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286 *pxTopOfStack-- = ( StackType_t ) 0xDEADBEEF; /* R14/LR */
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287 *pxTopOfStack-- = ( StackType_t ) pxCode + portINSTRUCTION_SIZE; /* R15/PC */
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288 *pxTopOfStack-- = ( StackType_t ) portINITIAL_SR; /* SR */
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289 *pxTopOfStack-- = ( StackType_t ) 0xFF0000FF; /* R0 */
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290 *pxTopOfStack-- = ( StackType_t ) 0x01010101; /* R1 */
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291 *pxTopOfStack-- = ( StackType_t ) 0x02020202; /* R2 */
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292 *pxTopOfStack-- = ( StackType_t ) 0x03030303; /* R3 */
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293 *pxTopOfStack-- = ( StackType_t ) 0x04040404; /* R4 */
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294 *pxTopOfStack-- = ( StackType_t ) 0x05050505; /* R5 */
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295 *pxTopOfStack-- = ( StackType_t ) 0x06060606; /* R6 */
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296 *pxTopOfStack-- = ( StackType_t ) 0x07070707; /* R7 */
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297 *pxTopOfStack = ( StackType_t ) portNO_CRITICAL_NESTING; /* ulCriticalNesting */
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299 return pxTopOfStack;
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301 /*-----------------------------------------------------------*/
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303 BaseType_t xPortStartScheduler( void )
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305 /* Start the timer that generates the tick ISR. Interrupts are disabled
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307 prvSetupTimerInterrupt();
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309 /* Start the first task. */
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310 portRESTORE_CONTEXT();
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312 /* Should not get here! */
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315 /*-----------------------------------------------------------*/
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317 void vPortEndScheduler( void )
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319 /* It is unlikely that the AVR32 port will require this function as there
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320 is nothing to return to. */
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322 /*-----------------------------------------------------------*/
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324 /* Schedule the COUNT&COMPARE match interrupt in (configCPU_CLOCK_HZ/configTICK_RATE_HZ)
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325 clock cycles from now. */
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326 #if( configTICK_USE_TC==0 )
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327 static void prvScheduleFirstTick(void)
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331 lCycles = Get_system_register(AVR32_COUNT);
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332 lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
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333 // If lCycles ends up to be 0, make it 1 so that the COMPARE and exception
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334 // generation feature does not get disabled.
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339 Set_system_register(AVR32_COMPARE, lCycles);
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342 #pragma optimize = no_inline
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343 static void prvScheduleNextTick(void)
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345 uint32_t lCycles, lCount;
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347 lCycles = Get_system_register(AVR32_COMPARE);
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348 lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
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349 // If lCycles ends up to be 0, make it 1 so that the COMPARE and exception
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350 // generation feature does not get disabled.
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355 lCount = Get_system_register(AVR32_COUNT);
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356 if( lCycles < lCount )
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357 { // We missed a tick, recover for the next.
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358 lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
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360 Set_system_register(AVR32_COMPARE, lCycles);
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363 #pragma optimize = no_inline
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364 static void prvClearTcInt(void)
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366 AVR32_TC.channel[configTICK_TC_CHANNEL].sr;
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369 /*-----------------------------------------------------------*/
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371 /* Setup the timer to generate the tick interrupts. */
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372 static void prvSetupTimerInterrupt(void)
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374 #if( configTICK_USE_TC==1 )
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376 volatile avr32_tc_t *tc = &AVR32_TC;
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378 // Options for waveform genration.
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379 tc_waveform_opt_t waveform_opt =
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381 .channel = configTICK_TC_CHANNEL, /* Channel selection. */
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383 .bswtrg = TC_EVT_EFFECT_NOOP, /* Software trigger effect on TIOB. */
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384 .beevt = TC_EVT_EFFECT_NOOP, /* External event effect on TIOB. */
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385 .bcpc = TC_EVT_EFFECT_NOOP, /* RC compare effect on TIOB. */
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386 .bcpb = TC_EVT_EFFECT_NOOP, /* RB compare effect on TIOB. */
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388 .aswtrg = TC_EVT_EFFECT_NOOP, /* Software trigger effect on TIOA. */
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389 .aeevt = TC_EVT_EFFECT_NOOP, /* External event effect on TIOA. */
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390 .acpc = TC_EVT_EFFECT_NOOP, /* RC compare effect on TIOA: toggle. */
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391 .acpa = TC_EVT_EFFECT_NOOP, /* RA compare effect on TIOA: toggle (other possibilities are none, set and clear). */
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393 .wavsel = TC_WAVEFORM_SEL_UP_MODE_RC_TRIGGER,/* Waveform selection: Up mode without automatic trigger on RC compare. */
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394 .enetrg = FALSE, /* External event trigger enable. */
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395 .eevt = 0, /* External event selection. */
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396 .eevtedg = TC_SEL_NO_EDGE, /* External event edge selection. */
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397 .cpcdis = FALSE, /* Counter disable when RC compare. */
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398 .cpcstop = FALSE, /* Counter clock stopped with RC compare. */
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400 .burst = FALSE, /* Burst signal selection. */
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401 .clki = FALSE, /* Clock inversion. */
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402 .tcclks = TC_CLOCK_SOURCE_TC2 /* Internal source clock 2. */
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405 tc_interrupt_t tc_interrupt =
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419 /* Disable all interrupt/exception. */
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420 portDISABLE_INTERRUPTS();
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422 /* Register the compare interrupt handler to the interrupt controller and
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423 enable the compare interrupt. */
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425 #if( configTICK_USE_TC==1 )
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427 INTC_register_interrupt((__int_handler)&vTick, configTICK_TC_IRQ, INT0);
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429 /* Initialize the timer/counter. */
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430 tc_init_waveform(tc, &waveform_opt);
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432 /* Set the compare triggers.
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433 Remember TC counter is 16-bits, so counting second is not possible!
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434 That's why we configure it to count ms. */
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435 tc_write_rc( tc, configTICK_TC_CHANNEL, ( configPBA_CLOCK_HZ / 4) / configTICK_RATE_HZ );
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437 tc_configure_interrupts( tc, configTICK_TC_CHANNEL, &tc_interrupt );
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439 /* Start the timer/counter. */
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440 tc_start(tc, configTICK_TC_CHANNEL);
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444 INTC_register_interrupt((__int_handler)&vTick, AVR32_CORE_COMPARE_IRQ, INT0);
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445 prvScheduleFirstTick();
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