2 FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 ***************************************************************************
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9 * FreeRTOS provides completely free yet professionally developed, *
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10 * robust, strictly quality controlled, supported, and cross *
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11 * platform software that has become a de facto standard. *
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13 * Help yourself get started quickly and support the FreeRTOS *
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14 * project by purchasing a FreeRTOS tutorial book, reference *
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15 * manual, or both from: http://www.FreeRTOS.org/Documentation *
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19 ***************************************************************************
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21 This file is part of the FreeRTOS distribution.
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23 FreeRTOS is free software; you can redistribute it and/or modify it under
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24 the terms of the GNU General Public License (version 2) as published by the
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25 Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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27 >>! NOTE: The modification to the GPL is included to allow you to distribute
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28 >>! a combined work that includes FreeRTOS without being obliged to provide
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29 >>! the source code for proprietary components outside of the FreeRTOS
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32 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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33 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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34 FOR A PARTICULAR PURPOSE. Full license text is available from the following
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35 link: http://www.freertos.org/a00114.html
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39 ***************************************************************************
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41 * Having a problem? Start by reading the FAQ "My application does *
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42 * not run, what could be wrong?" *
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44 * http://www.FreeRTOS.org/FAQHelp.html *
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46 ***************************************************************************
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48 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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49 license and Real Time Engineers Ltd. contact details.
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51 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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52 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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53 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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55 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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56 Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
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57 licenses offer ticketed support, indemnification and middleware.
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59 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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60 engineered and independently SIL3 certified version for use in safety and
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61 mission critical applications that require provable dependability.
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66 /*-----------------------------------------------------------
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67 * Implementation of functions defined in portable.h for the Atmel ARM7 port.
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68 *----------------------------------------------------------*/
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71 /* Standard includes. */
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74 /* Scheduler includes. */
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75 #include "FreeRTOS.h"
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78 /* Hardware includes. */
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80 #include <pio/pio.h>
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81 #include <pio/pio_it.h>
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82 #include <pit/pit.h>
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83 #include <aic/aic.h>
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85 #include <utility/led.h>
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86 #include <utility/trace.h>
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88 /*-----------------------------------------------------------*/
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90 /* Constants required to setup the initial stack. */
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91 #define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
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92 #define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
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93 #define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )
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95 /* Constants required to setup the PIT. */
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96 #define port1MHz_IN_Hz ( 1000000ul )
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97 #define port1SECOND_IN_uS ( 1000000.0 )
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99 /* Constants required to handle critical sections. */
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100 #define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
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103 #define portINT_LEVEL_SENSITIVE 0
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104 #define portPIT_ENABLE ( ( uint16_t ) 0x1 << 24 )
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105 #define portPIT_INT_ENABLE ( ( uint16_t ) 0x1 << 25 )
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106 /*-----------------------------------------------------------*/
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108 /* Setup the PIT to generate the tick interrupts. */
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109 static void prvSetupTimerInterrupt( void );
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111 /* The PIT interrupt handler - the RTOS tick. */
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112 static void vPortTickISR( void );
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114 /* ulCriticalNesting will get set to zero when the first task starts. It
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115 cannot be initialised to 0 as this will cause interrupts to be enabled
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116 during the kernel initialisation process. */
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117 uint32_t ulCriticalNesting = ( uint32_t ) 9999;
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119 /*-----------------------------------------------------------*/
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122 * Initialise the stack of a task to look exactly as if a call to
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123 * portSAVE_CONTEXT had been called.
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125 * See header file for description.
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127 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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129 StackType_t *pxOriginalTOS;
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131 pxOriginalTOS = pxTopOfStack;
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133 /* To ensure asserts in tasks.c don't fail, although in this case the assert
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134 is not really required. */
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137 /* Setup the initial stack of the task. The stack is set exactly as
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138 expected by the portRESTORE_CONTEXT() macro. */
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140 /* First on the stack is the return address - which in this case is the
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141 start of the task. The offset is added to make the return address appear
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142 as it would within an IRQ ISR. */
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143 *pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
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146 *pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */
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148 *pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
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150 *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
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152 *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
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154 *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
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156 *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
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158 *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
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160 *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
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162 *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
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164 *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
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166 *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
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168 *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
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170 *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
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172 *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
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175 /* When the task starts is will expect to find the function parameter in
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177 *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
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180 /* The status register is set for system mode, with interrupts enabled. */
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181 *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
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183 #ifdef THUMB_INTERWORK
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185 /* We want the task to start in thumb mode. */
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186 *pxTopOfStack |= portTHUMB_MODE_BIT;
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192 /* Interrupt flags cannot always be stored on the stack and will
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193 instead be stored in a variable, which is then saved as part of the
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195 *pxTopOfStack = portNO_CRITICAL_NESTING;
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197 return pxTopOfStack;
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199 /*-----------------------------------------------------------*/
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201 BaseType_t xPortStartScheduler( void )
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203 extern void vPortStartFirstTask( void );
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205 /* Start the timer that generates the tick ISR. Interrupts are disabled
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207 prvSetupTimerInterrupt();
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209 /* Start the first task. */
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210 vPortStartFirstTask();
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212 /* Should not get here! */
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215 /*-----------------------------------------------------------*/
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217 void vPortEndScheduler( void )
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219 /* It is unlikely that the ARM port will require this function as there
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220 is nothing to return to. */
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222 /*-----------------------------------------------------------*/
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224 static __arm void vPortTickISR( void )
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226 volatile uint32_t ulDummy;
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228 /* Increment the tick count - which may wake some tasks but as the
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229 preemptive scheduler is not being used any woken task is not given
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230 processor time no matter what its priority. */
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231 if( xTaskIncrementTick() != pdFALSE )
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233 vTaskSwitchContext();
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236 /* Clear the PIT interrupt. */
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237 ulDummy = AT91C_BASE_PITC->PITC_PIVR;
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239 /* To remove compiler warning. */
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242 /* The AIC is cleared in the asm wrapper, outside of this function. */
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244 /*-----------------------------------------------------------*/
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246 static void prvSetupTimerInterrupt( void )
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248 const uint32_t ulPeriodIn_uS = ( 1.0 / ( double ) configTICK_RATE_HZ ) * port1SECOND_IN_uS;
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250 /* Setup the PIT for the required frequency. */
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251 PIT_Init( ulPeriodIn_uS, BOARD_MCK / port1MHz_IN_Hz );
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253 /* Setup the PIT interrupt. */
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254 AIC_DisableIT( AT91C_ID_SYS );
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255 AIC_ConfigureIT( AT91C_ID_SYS, AT91C_AIC_PRIOR_LOWEST, vPortTickISR );
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256 AIC_EnableIT( AT91C_ID_SYS );
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259 /*-----------------------------------------------------------*/
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261 void vPortEnterCritical( void )
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263 /* Disable interrupts first! */
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266 /* Now interrupts are disabled ulCriticalNesting can be accessed
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267 directly. Increment ulCriticalNesting to keep a count of how many times
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268 portENTER_CRITICAL() has been called. */
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269 ulCriticalNesting++;
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271 /*-----------------------------------------------------------*/
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273 void vPortExitCritical( void )
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275 if( ulCriticalNesting > portNO_CRITICAL_NESTING )
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277 /* Decrement the nesting count as we are leaving a critical section. */
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278 ulCriticalNesting--;
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280 /* If the nesting level has reached zero then interrupts should be
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282 if( ulCriticalNesting == portNO_CRITICAL_NESTING )
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288 /*-----------------------------------------------------------*/
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