2 * FreeRTOS Kernel V10.3.0
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3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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5 * Permission is hereby granted, free of charge, to any person obtaining a copy of
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6 * this software and associated documentation files (the "Software"), to deal in
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7 * the Software without restriction, including without limitation the rights to
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8 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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9 * the Software, and to permit persons to whom the Software is furnished to do so,
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10 * subject to the following conditions:
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12 * The above copyright notice and this permission notice shall be included in all
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13 * copies or substantial portions of the Software.
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15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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17 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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18 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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19 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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20 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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22 * http://www.FreeRTOS.org
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23 * http://aws.amazon.com/freertos
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25 * 1 tab == 4 spaces!
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28 /*-----------------------------------------------------------
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29 * Implementation of functions defined in portable.h for the Philips ARM7 port.
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30 *----------------------------------------------------------*/
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35 + Bug fix - The prescale value for the timer setup is now written to T0PR
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36 instead of T0PC. This bug would have had no effect unless a prescale
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37 value was actually used.
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40 /* Standard includes. */
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42 #include <intrinsics.h>
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44 /* Scheduler includes. */
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45 #include "FreeRTOS.h"
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48 /* Constants required to setup the tick ISR. */
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49 #define portENABLE_TIMER ( ( uint8_t ) 0x01 )
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50 #define portPRESCALE_VALUE 0x00
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51 #define portINTERRUPT_ON_MATCH ( ( uint32_t ) 0x01 )
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52 #define portRESET_COUNT_ON_MATCH ( ( uint32_t ) 0x02 )
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54 /* Constants required to setup the initial stack. */
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55 #define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
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56 #define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
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57 #define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )
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59 /* Constants required to setup the PIT. */
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60 #define portPIT_CLOCK_DIVISOR ( ( uint32_t ) 16 )
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61 #define portPIT_COUNTER_VALUE ( ( ( configCPU_CLOCK_HZ / portPIT_CLOCK_DIVISOR ) / 1000UL ) * portTICK_PERIOD_MS )
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63 /* Constants required to handle interrupts. */
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64 #define portTIMER_MATCH_ISR_BIT ( ( uint8_t ) 0x01 )
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65 #define portCLEAR_VIC_INTERRUPT ( ( uint32_t ) 0 )
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67 /* Constants required to handle critical sections. */
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68 #define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
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71 #define portINT_LEVEL_SENSITIVE 0
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72 #define portPIT_ENABLE ( ( uint16_t ) 0x1 << 24 )
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73 #define portPIT_INT_ENABLE ( ( uint16_t ) 0x1 << 25 )
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75 /* Constants required to setup the VIC for the tick ISR. */
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76 #define portTIMER_VIC_CHANNEL ( ( uint32_t ) 0x0004 )
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77 #define portTIMER_VIC_CHANNEL_BIT ( ( uint32_t ) 0x0010 )
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78 #define portTIMER_VIC_ENABLE ( ( uint32_t ) 0x0020 )
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80 /*-----------------------------------------------------------*/
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82 /* Setup the PIT to generate the tick interrupts. */
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83 static void prvSetupTimerInterrupt( void );
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85 /* ulCriticalNesting will get set to zero when the first task starts. It
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86 cannot be initialised to 0 as this will cause interrupts to be enabled
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87 during the kernel initialisation process. */
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88 uint32_t ulCriticalNesting = ( uint32_t ) 9999;
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90 /*-----------------------------------------------------------*/
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93 * Initialise the stack of a task to look exactly as if a call to
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94 * portSAVE_CONTEXT had been called.
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96 * See header file for description.
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98 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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100 StackType_t *pxOriginalTOS;
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102 pxOriginalTOS = pxTopOfStack;
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104 /* Setup the initial stack of the task. The stack is set exactly as
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105 expected by the portRESTORE_CONTEXT() macro. */
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107 /* First on the stack is the return address - which in this case is the
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108 start of the task. The offset is added to make the return address appear
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109 as it would within an IRQ ISR. */
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110 *pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
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113 *pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */
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115 *pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
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117 *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
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119 *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
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121 *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
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123 *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
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125 *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
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127 *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
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129 *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
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131 *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
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133 *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
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135 *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
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137 *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
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139 *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
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142 /* When the task starts is will expect to find the function parameter in
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144 *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
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147 /* The status register is set for system mode, with interrupts enabled. */
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148 *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
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150 if( ( ( uint32_t ) pxCode & 0x01UL ) != 0x00UL )
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152 /* We want the task to start in thumb mode. */
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153 *pxTopOfStack |= portTHUMB_MODE_BIT;
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158 /* Interrupt flags cannot always be stored on the stack and will
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159 instead be stored in a variable, which is then saved as part of the
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161 *pxTopOfStack = portNO_CRITICAL_NESTING;
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163 return pxTopOfStack;
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165 /*-----------------------------------------------------------*/
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167 BaseType_t xPortStartScheduler( void )
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169 extern void vPortStartFirstTask( void );
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171 /* Start the timer that generates the tick ISR. Interrupts are disabled
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173 prvSetupTimerInterrupt();
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175 /* Start the first task. */
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176 vPortStartFirstTask();
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178 /* Should not get here! */
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181 /*-----------------------------------------------------------*/
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183 void vPortEndScheduler( void )
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185 /* It is unlikely that the ARM port will require this function as there
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186 is nothing to return to. */
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188 /*-----------------------------------------------------------*/
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190 #if configUSE_PREEMPTION == 0
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192 /* The cooperative scheduler requires a normal IRQ service routine to
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193 simply increment the system tick. */
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194 static __arm __irq void vPortNonPreemptiveTick( void );
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195 static __arm __irq void vPortNonPreemptiveTick( void )
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197 /* Increment the tick count - which may wake some tasks but as the
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198 preemptive scheduler is not being used any woken task is not given
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199 processor time no matter what its priority. */
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200 xTaskIncrementTick();
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202 /* Ready for the next interrupt. */
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203 T0IR = portTIMER_MATCH_ISR_BIT;
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204 VICVectAddr = portCLEAR_VIC_INTERRUPT;
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209 /* This function is called from an asm wrapper, so does not require the __irq
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211 void vPortPreemptiveTick( void );
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212 void vPortPreemptiveTick( void )
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214 /* Increment the tick counter. */
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215 if( xTaskIncrementTick() != pdFALSE )
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217 /* The new tick value might unblock a task. Ensure the highest task that
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218 is ready to execute is the task that will execute when the tick ISR
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220 vTaskSwitchContext();
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223 /* Ready for the next interrupt. */
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224 T0IR = portTIMER_MATCH_ISR_BIT;
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225 VICVectAddr = portCLEAR_VIC_INTERRUPT;
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230 /*-----------------------------------------------------------*/
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232 static void prvSetupTimerInterrupt( void )
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234 uint32_t ulCompareMatch;
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236 /* A 1ms tick does not require the use of the timer prescale. This is
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237 defaulted to zero but can be used if necessary. */
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238 T0PR = portPRESCALE_VALUE;
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240 /* Calculate the match value required for our wanted tick rate. */
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241 ulCompareMatch = configCPU_CLOCK_HZ / configTICK_RATE_HZ;
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243 /* Protect against divide by zero. Using an if() statement still results
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244 in a warning - hence the #if. */
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245 #if portPRESCALE_VALUE != 0
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247 ulCompareMatch /= ( portPRESCALE_VALUE + 1 );
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251 T0MR0 = ulCompareMatch;
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253 /* Generate tick with timer 0 compare match. */
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254 T0MCR = portRESET_COUNT_ON_MATCH | portINTERRUPT_ON_MATCH;
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256 /* Setup the VIC for the timer. */
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257 VICIntSelect &= ~( portTIMER_VIC_CHANNEL_BIT );
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258 VICIntEnable |= portTIMER_VIC_CHANNEL_BIT;
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260 /* The ISR installed depends on whether the preemptive or cooperative
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261 scheduler is being used. */
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262 #if configUSE_PREEMPTION == 1
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264 extern void ( vPortPreemptiveTickEntry )( void );
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266 VICVectAddr0 = ( uint32_t ) vPortPreemptiveTickEntry;
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270 extern void ( vNonPreemptiveTick )( void );
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272 VICVectAddr0 = ( int32_t ) vPortNonPreemptiveTick;
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276 VICVectCntl0 = portTIMER_VIC_CHANNEL | portTIMER_VIC_ENABLE;
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278 /* Start the timer - interrupts are disabled when this function is called
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279 so it is okay to do this here. */
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280 T0TCR = portENABLE_TIMER;
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282 /*-----------------------------------------------------------*/
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284 void vPortEnterCritical( void )
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286 /* Disable interrupts first! */
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287 __disable_interrupt();
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289 /* Now interrupts are disabled ulCriticalNesting can be accessed
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290 directly. Increment ulCriticalNesting to keep a count of how many times
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291 portENTER_CRITICAL() has been called. */
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292 ulCriticalNesting++;
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294 /*-----------------------------------------------------------*/
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296 void vPortExitCritical( void )
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298 if( ulCriticalNesting > portNO_CRITICAL_NESTING )
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300 /* Decrement the nesting count as we are leaving a critical section. */
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301 ulCriticalNesting--;
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303 /* If the nesting level has reached zero then interrupts should be
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305 if( ulCriticalNesting == portNO_CRITICAL_NESTING )
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307 __enable_interrupt();
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311 /*-----------------------------------------------------------*/
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