2 FreeRTOS V7.5.3 - Copyright (C) 2013 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 ***************************************************************************
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9 * FreeRTOS provides completely free yet professionally developed, *
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10 * robust, strictly quality controlled, supported, and cross *
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11 * platform software that has become a de facto standard. *
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13 * Help yourself get started quickly and support the FreeRTOS *
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14 * project by purchasing a FreeRTOS tutorial book, reference *
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15 * manual, or both from: http://www.FreeRTOS.org/Documentation *
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19 ***************************************************************************
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21 This file is part of the FreeRTOS distribution.
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23 FreeRTOS is free software; you can redistribute it and/or modify it under
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24 the terms of the GNU General Public License (version 2) as published by the
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25 Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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27 >>! NOTE: The modification to the GPL is included to allow you to distribute
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28 >>! a combined work that includes FreeRTOS without being obliged to provide
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29 >>! the source code for proprietary components outside of the FreeRTOS
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32 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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33 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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34 FOR A PARTICULAR PURPOSE. Full license text is available from the following
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35 link: http://www.freertos.org/a00114.html
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39 ***************************************************************************
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41 * Having a problem? Start by reading the FAQ "My application does *
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42 * not run, what could be wrong?" *
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44 * http://www.FreeRTOS.org/FAQHelp.html *
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46 ***************************************************************************
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48 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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49 license and Real Time Engineers Ltd. contact details.
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51 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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52 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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53 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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55 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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56 Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
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57 licenses offer ticketed support, indemnification and middleware.
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59 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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60 engineered and independently SIL3 certified version for use in safety and
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61 mission critical applications that require provable dependability.
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66 /*-----------------------------------------------------------
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67 * Implementation of functions defined in portable.h for the SH2A port.
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68 *----------------------------------------------------------*/
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70 /* Standard C includes. */
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73 /* Scheduler includes. */
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74 #include "FreeRTOS.h"
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77 /* Library includes. */
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80 /* Hardware specifics. */
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81 #include "iorx111.h"
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83 /*-----------------------------------------------------------*/
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85 /* Tasks should start with interrupts enabled and in Supervisor mode, therefore
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86 PSW is set with U and I set, and PM and IPL clear. */
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87 #define portINITIAL_PSW ( ( portSTACK_TYPE ) 0x00030000 )
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89 /* The peripheral clock is divided by this value before being supplying the
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91 #if ( configUSE_TICKLESS_IDLE == 0 )
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92 /* If tickless idle is not used then the divisor can be fixed. */
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93 #define portCLOCK_DIVISOR 8UL
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94 #elif ( configPERIPHERAL_CLOCK_HZ >= 12000000 )
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95 #define portCLOCK_DIVISOR 512UL
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96 #elif ( configPERIPHERAL_CLOCK_HZ >= 6000000 )
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97 #define portCLOCK_DIVISOR 128UL
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98 #elif ( configPERIPHERAL_CLOCK_HZ >= 1000000 )
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99 #define portCLOCK_DIVISOR 32UL
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101 #define portCLOCK_DIVISOR 8UL
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105 /* Keys required to lock and unlock access to certain system registers
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107 #define portUNLOCK_KEY 0xA50B
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108 #define portLOCK_KEY 0xA500
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110 /*-----------------------------------------------------------*/
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113 * Function to start the first task executing - written in asm code as direct
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114 * access to registers is required.
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116 extern void prvStartFirstTask( void );
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119 * The tick ISR handler. The peripheral used is configured by the application
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120 * via a hook/callback function.
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122 __interrupt static void prvTickISR( void );
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125 * Sets up the periodic ISR used for the RTOS tick using the CMT.
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126 * The application writer can define configSETUP_TICK_INTERRUPT() (in
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127 * FreeRTOSConfig.h) such that their own tick interrupt configuration is used
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128 * in place of prvSetupTimerInterrupt().
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130 static void prvSetupTimerInterrupt( void );
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131 #ifndef configSETUP_TICK_INTERRUPT
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132 /* The user has not provided their own tick interrupt configuration so use
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133 the definition in this file (which uses the interval timer). */
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134 #define configSETUP_TICK_INTERRUPT() prvSetupTimerInterrupt()
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135 #endif /* configSETUP_TICK_INTERRUPT */
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138 * Called after the sleep mode registers have been configured, prvSleep()
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139 * executes the pre and post sleep macros, and actually calls the wait
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142 #if configUSE_TICKLESS_IDLE == 1
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143 static void prvSleep( portTickType xExpectedIdleTime );
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144 #endif /* configUSE_TICKLESS_IDLE */
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146 /*-----------------------------------------------------------*/
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148 extern void *pxCurrentTCB;
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150 /*-----------------------------------------------------------*/
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152 /* Calculate how many clock increments make up a single tick period. */
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153 static const unsigned long ulMatchValueForOneTick = ( ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) / configTICK_RATE_HZ );
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155 #if configUSE_TICKLESS_IDLE == 1
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157 /* Holds the maximum number of ticks that can be suppressed - which is
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158 basically how far into the future an interrupt can be generated. Set
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159 during initialisation. This is the maximum possible value that the
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160 compare match register can hold divided by ulMatchValueForOneTick. */
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161 static const portTickType xMaximumPossibleSuppressedTicks = USHRT_MAX / ( ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) / configTICK_RATE_HZ );
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163 /* Flag set from the tick interrupt to allow the sleep processing to know if
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164 sleep mode was exited because of a tick interrupt, or an interrupt
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165 generated by something else. */
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166 static volatile uint32_t ulTickFlag = pdFALSE;
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168 /* The CMT counter is stopped temporarily each time it is re-programmed.
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169 The following constant offsets the CMT counter match value by the number of
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170 CMT counts that would typically be missed while the counter was stopped to
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171 compensate for the lost time. The large difference between the divided CMT
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172 clock and the CPU clock means it is likely ulStoppedTimerCompensation will
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173 equal zero - and be optimised away. */
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174 static const unsigned long ulStoppedTimerCompensation = 100UL / ( configCPU_CLOCK_HZ / ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) );
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178 /*-----------------------------------------------------------*/
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181 * See header file for description.
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183 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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185 /* Offset to end up on 8 byte boundary. */
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188 /* R0 is not included as it is the stack pointer. */
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189 *pxTopOfStack = 0x00;
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191 *pxTopOfStack = 0x00;
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193 *pxTopOfStack = portINITIAL_PSW;
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195 *pxTopOfStack = ( portSTACK_TYPE ) pxCode;
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197 /* When debugging it can be useful if every register is set to a known
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198 value. Otherwise code space can be saved by just setting the registers
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199 that need to be set. */
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200 #ifdef USE_FULL_REGISTER_INITIALISATION
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203 *pxTopOfStack = 0x12345678; /* r15. */
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205 *pxTopOfStack = 0xaaaabbbb;
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207 *pxTopOfStack = 0xdddddddd;
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209 *pxTopOfStack = 0xcccccccc;
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211 *pxTopOfStack = 0xbbbbbbbb;
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213 *pxTopOfStack = 0xaaaaaaaa;
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215 *pxTopOfStack = 0x99999999;
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217 *pxTopOfStack = 0x88888888;
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219 *pxTopOfStack = 0x77777777;
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221 *pxTopOfStack = 0x66666666;
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223 *pxTopOfStack = 0x55555555;
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225 *pxTopOfStack = 0x44444444;
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227 *pxTopOfStack = 0x33333333;
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229 *pxTopOfStack = 0x22222222;
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234 /* Leave space for the registers that will get popped from the stack
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235 when the task first starts executing. */
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236 pxTopOfStack -= 15;
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240 *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R1 */
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242 *pxTopOfStack = 0x12345678; /* Accumulator. */
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244 *pxTopOfStack = 0x87654321; /* Accumulator. */
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246 return pxTopOfStack;
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248 /*-----------------------------------------------------------*/
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250 portBASE_TYPE xPortStartScheduler( void )
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252 /* Use pxCurrentTCB just so it does not get optimised away. */
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253 if( pxCurrentTCB != NULL )
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255 /* Call an application function to set up the timer that will generate
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256 the tick interrupt. This way the application can decide which
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257 peripheral to use. If tickless mode is used then the default
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258 implementation defined in this file (which uses CMT0) should not be
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260 configSETUP_TICK_INTERRUPT();
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262 /* Enable the software interrupt. */
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263 _IEN( _ICU_SWINT ) = 1;
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265 /* Ensure the software interrupt is clear. */
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266 _IR( _ICU_SWINT ) = 0;
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268 /* Ensure the software interrupt is set to the kernel priority. */
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269 _IPR( _ICU_SWINT ) = configKERNEL_INTERRUPT_PRIORITY;
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271 /* Start the first task. */
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272 prvStartFirstTask();
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275 /* Execution should not reach here as the tasks are now running!
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276 prvSetupTimerInterrupt() is called here to prevent the compiler outputting
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277 a warning about a statically declared function not being referenced in the
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278 case that the application writer has provided their own tick interrupt
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279 configuration routine (and defined configSETUP_TICK_INTERRUPT() such that
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280 their own routine will be called in place of prvSetupTimerInterrupt()). */
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281 prvSetupTimerInterrupt();
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283 /* Should not get here. */
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286 /*-----------------------------------------------------------*/
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288 #pragma vector = configTICK_VECTOR
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289 __interrupt static void prvTickISR( void )
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291 /* Re-enable interrupts. */
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292 __enable_interrupt();
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294 /* Increment the tick, and perform any processing the new tick value
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296 __set_interrupt_level( configMAX_SYSCALL_INTERRUPT_PRIORITY );
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298 if( xTaskIncrementTick() != pdFALSE )
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303 __set_interrupt_level( configKERNEL_INTERRUPT_PRIORITY );
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305 #if configUSE_TICKLESS_IDLE == 1
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307 /* The CPU woke because of a tick. */
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308 ulTickFlag = pdTRUE;
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310 /* If this is the first tick since exiting tickless mode then the CMT
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311 compare match value needs resetting. */
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312 CMT0.CMCOR = ( unsigned short ) ulMatchValueForOneTick;
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316 /*-----------------------------------------------------------*/
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318 void vPortEndScheduler( void )
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320 /* Not implemented as there is nothing to return to. */
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322 /*-----------------------------------------------------------*/
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324 static void prvSetupTimerInterrupt( void )
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327 SYSTEM.PRCR.WORD = portUNLOCK_KEY;
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333 SYSTEM.PRCR.WORD = portLOCK_KEY;
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335 /* Interrupt on compare match. */
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336 CMT0.CMCR.BIT.CMIE = 1;
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338 /* Set the compare match value. */
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339 CMT0.CMCOR = ( unsigned short ) ulMatchValueForOneTick;
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341 /* Divide the PCLK. */
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342 #if portCLOCK_DIVISOR == 512
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344 CMT0.CMCR.BIT.CKS = 3;
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346 #elif portCLOCK_DIVISOR == 128
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348 CMT0.CMCR.BIT.CKS = 2;
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350 #elif portCLOCK_DIVISOR == 32
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352 CMT0.CMCR.BIT.CKS = 1;
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354 #elif portCLOCK_DIVISOR == 8
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356 CMT0.CMCR.BIT.CKS = 0;
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360 #error Invalid portCLOCK_DIVISOR setting
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365 /* Enable the interrupt... */
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366 _IEN( _CMT0_CMI0 ) = 1;
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368 /* ...and set its priority to the application defined kernel priority. */
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369 _IPR( _CMT0_CMI0 ) = configKERNEL_INTERRUPT_PRIORITY;
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371 /* Start the timer. */
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372 CMT.CMSTR0.BIT.STR0 = 1;
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374 /*-----------------------------------------------------------*/
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376 #if configUSE_TICKLESS_IDLE == 1
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378 static void prvSleep( portTickType xExpectedIdleTime )
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380 /* Allow the application to define some pre-sleep processing. */
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381 configPRE_SLEEP_PROCESSING( xExpectedIdleTime );
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383 /* xExpectedIdleTime being set to 0 by configPRE_SLEEP_PROCESSING()
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384 means the application defined code has already executed the WAIT
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386 if( xExpectedIdleTime > 0 )
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388 __wait_for_interrupt();
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391 /* Allow the application to define some post sleep processing. */
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392 configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
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395 #endif /* configUSE_TICKLESS_IDLE */
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396 /*-----------------------------------------------------------*/
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398 #if configUSE_TICKLESS_IDLE == 1
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400 void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime )
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402 unsigned long ulMatchValue, ulCompleteTickPeriods, ulCurrentCount;
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403 eSleepModeStatus eSleepAction;
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405 /* THIS FUNCTION IS CALLED WITH THE SCHEDULER SUSPENDED. */
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407 /* Make sure the CMT reload value does not overflow the counter. */
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408 if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
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410 xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
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413 /* Calculate the reload value required to wait xExpectedIdleTime tick
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415 ulMatchValue = ulMatchValueForOneTick * xExpectedIdleTime;
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416 if( ulMatchValue > ulStoppedTimerCompensation )
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418 /* Compensate for the fact that the CMT is going to be stopped
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420 ulMatchValue -= ulStoppedTimerCompensation;
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423 /* Stop the CMT momentarily. The time the CMT is stopped for is
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424 accounted for as best it can be, but using the tickless mode will
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425 inevitably result in some tiny drift of the time maintained by the
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426 kernel with respect to calendar time. */
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427 CMT.CMSTR0.BIT.STR0 = 0;
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428 while( CMT.CMSTR0.BIT.STR0 == 1 )
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430 /* Nothing to do here. */
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433 /* Critical section using the global interrupt bit as the i bit is
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434 automatically reset by the WAIT instruction. */
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435 __disable_interrupt();
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437 /* The tick flag is set to false before sleeping. If it is true when
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438 sleep mode is exited then sleep mode was probably exited because the
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439 tick was suppressed for the entire xExpectedIdleTime period. */
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440 ulTickFlag = pdFALSE;
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442 /* If a context switch is pending then abandon the low power entry as
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443 the context switch might have been pended by an external interrupt that
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444 requires processing. */
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445 eSleepAction = eTaskConfirmSleepModeStatus();
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446 if( eSleepAction == eAbortSleep )
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448 /* Restart tick. */
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449 CMT.CMSTR0.BIT.STR0 = 1;
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450 __enable_interrupt();
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452 else if( eSleepAction == eNoTasksWaitingTimeout )
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454 /* Protection off. */
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455 SYSTEM.PRCR.WORD = portUNLOCK_KEY;
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457 /* Ready for software standby with all clocks stopped. */
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458 SYSTEM.SBYCR.BIT.SSBY = 1;
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460 /* Protection on. */
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461 SYSTEM.PRCR.WORD = portLOCK_KEY;
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463 /* Sleep until something happens. Calling prvSleep() will
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464 automatically reset the i bit in the PSW. */
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465 prvSleep( xExpectedIdleTime );
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467 /* Restart the CMT. */
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468 CMT.CMSTR0.BIT.STR0 = 1;
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472 /* Protection off. */
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473 SYSTEM.PRCR.WORD = portUNLOCK_KEY;
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475 /* Ready for deep sleep mode. */
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476 SYSTEM.MSTPCRC.BIT.DSLPE = 1;
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477 SYSTEM.MSTPCRA.BIT.MSTPA28 = 1;
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478 SYSTEM.SBYCR.BIT.SSBY = 0;
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480 /* Protection on. */
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481 SYSTEM.PRCR.WORD = portLOCK_KEY;
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483 /* Adjust the match value to take into account that the current
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484 time slice is already partially complete. */
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485 ulMatchValue -= ( unsigned long ) CMT0.CMCNT;
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486 CMT0.CMCOR = ( unsigned short ) ulMatchValue;
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488 /* Restart the CMT to count up to the new match value. */
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490 CMT.CMSTR0.BIT.STR0 = 1;
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492 /* Sleep until something happens. Calling prvSleep() will
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493 automatically reset the i bit in the PSW. */
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494 prvSleep( xExpectedIdleTime );
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496 /* Stop CMT. Again, the time the SysTick is stopped for is
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497 accounted for as best it can be, but using the tickless mode will
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498 inevitably result in some tiny drift of the time maintained by the
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499 kernel with respect to calendar time. */
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500 CMT.CMSTR0.BIT.STR0 = 0;
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501 while( CMT.CMSTR0.BIT.STR0 == 1 )
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503 /* Nothing to do here. */
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506 ulCurrentCount = ( unsigned long ) CMT0.CMCNT;
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508 if( ulTickFlag != pdFALSE )
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510 /* The tick interrupt has already executed, although because
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511 this function is called with the scheduler suspended the actual
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512 tick processing will not occur until after this function has
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513 exited. Reset the match value with whatever remains of this
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515 ulMatchValue = ulMatchValueForOneTick - ulCurrentCount;
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516 CMT0.CMCOR = ( unsigned short ) ulMatchValue;
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518 /* The tick interrupt handler will already have pended the tick
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519 processing in the kernel. As the pending tick will be
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520 processed as soon as this function exits, the tick value
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521 maintained by the tick is stepped forward by one less than the
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522 time spent sleeping. The actual stepping of the tick appears
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523 later in this function. */
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524 ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
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528 /* Something other than the tick interrupt ended the sleep.
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529 How many complete tick periods passed while the processor was
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531 ulCompleteTickPeriods = ulCurrentCount / ulMatchValueForOneTick;
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533 /* The match value is set to whatever fraction of a single tick
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535 ulMatchValue = ulCurrentCount - ( ulCompleteTickPeriods * ulMatchValueForOneTick );
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536 CMT0.CMCOR = ( unsigned short ) ulMatchValue;
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539 /* Restart the CMT so it runs up to the match value. The match value
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540 will get set to the value required to generate exactly one tick period
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541 the next time the CMT interrupt executes. */
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543 CMT.CMSTR0.BIT.STR0 = 1;
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545 /* Wind the tick forward by the number of tick periods that the CPU
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546 remained in a low power state. */
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547 vTaskStepTick( ulCompleteTickPeriods );
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551 #endif /* configUSE_TICKLESS_IDLE */
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