2 FreeRTOS V8.2.0rc1 - Copyright (C) 2014 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 This file is part of the FreeRTOS distribution.
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9 FreeRTOS is free software; you can redistribute it and/or modify it under
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10 the terms of the GNU General Public License (version 2) as published by the
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11 Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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13 >>! NOTE: The modification to the GPL is included to allow you to !<<
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14 >>! distribute a combined work that includes FreeRTOS without being !<<
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15 >>! obliged to provide the source code for proprietary components !<<
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16 >>! outside of the FreeRTOS kernel. !<<
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18 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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19 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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20 FOR A PARTICULAR PURPOSE. Full license text is available on the following
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21 link: http://www.freertos.org/a00114.html
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25 ***************************************************************************
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27 * Having a problem? Start by reading the FAQ "My application does *
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28 * not run, what could be wrong?". Have you defined configASSERT()? *
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30 * http://www.FreeRTOS.org/FAQHelp.html *
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32 ***************************************************************************
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34 ***************************************************************************
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36 * FreeRTOS provides completely free yet professionally developed, *
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37 * robust, strictly quality controlled, supported, and cross *
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38 * platform software that is more than just the market leader, it *
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39 * is the industry's de facto standard. *
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41 * Help yourself get started quickly while simultaneously helping *
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42 * to support the FreeRTOS project by purchasing a FreeRTOS *
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43 * tutorial book, reference manual, or both: *
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44 * http://www.FreeRTOS.org/Documentation *
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46 ***************************************************************************
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48 ***************************************************************************
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50 * Investing in training allows your team to be as productive as *
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51 * possible as early as possible, lowering your overall development *
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52 * cost, and enabling you to bring a more robust product to market *
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53 * earlier than would otherwise be possible. Richard Barry is both *
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54 * the architect and key author of FreeRTOS, and so also the world's *
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55 * leading authority on what is the world's most popular real time *
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56 * kernel for deeply embedded MCU designs. Obtaining your training *
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57 * from Richard ensures your team will gain directly from his in-depth *
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58 * product knowledge and years of usage experience. Contact Real Time *
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59 * Engineers Ltd to enquire about the FreeRTOS Masterclass, presented *
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60 * by Richard Barry: http://www.FreeRTOS.org/contact
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62 ***************************************************************************
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64 ***************************************************************************
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66 * You are receiving this top quality software for free. Please play *
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67 * fair and reciprocate by reporting any suspected issues and *
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68 * participating in the community forum: *
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69 * http://www.FreeRTOS.org/support *
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73 ***************************************************************************
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75 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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76 license and Real Time Engineers Ltd. contact details.
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78 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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79 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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80 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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82 http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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83 Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
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85 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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86 Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
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87 licenses offer ticketed support, indemnification and commercial middleware.
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89 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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90 engineered and independently SIL3 certified version for use in safety and
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91 mission critical applications that require provable dependability.
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96 /*-----------------------------------------------------------
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97 * Implementation of functions defined in portable.h for the ST STR71x ARM7
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99 *----------------------------------------------------------*/
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101 /* Library includes. */
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105 /* Standard includes. */
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106 #include <stdlib.h>
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108 /* Scheduler includes. */
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109 #include "FreeRTOS.h"
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112 /* Constants required to setup the initial stack. */
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113 #define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
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114 #define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
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115 #define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )
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117 /* Constants required to handle critical sections. */
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118 #define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
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120 #define portMICROS_PER_SECOND 1000000
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122 /*-----------------------------------------------------------*/
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124 /* Setup the watchdog to generate the tick interrupts. */
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125 static void prvSetupTimerInterrupt( void );
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127 /* ulCriticalNesting will get set to zero when the first task starts. It
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128 cannot be initialised to 0 as this will cause interrupts to be enabled
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129 during the kernel initialisation process. */
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130 uint32_t ulCriticalNesting = ( uint32_t ) 9999;
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132 /* Tick interrupt routines for cooperative and preemptive operation
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133 respectively. The preemptive version is not defined as __irq as it is called
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134 from an asm wrapper function. */
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135 __arm __irq void vPortNonPreemptiveTick( void );
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136 void vPortPreemptiveTick( void );
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138 /*-----------------------------------------------------------*/
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141 * Initialise the stack of a task to look exactly as if a call to
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142 * portSAVE_CONTEXT had been called.
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144 * See header file for description.
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146 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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148 StackType_t *pxOriginalTOS;
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150 pxOriginalTOS = pxTopOfStack;
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152 /* To ensure asserts in tasks.c don't fail, although in this case the assert
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153 is not really required. */
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156 /* Setup the initial stack of the task. The stack is set exactly as
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157 expected by the portRESTORE_CONTEXT() macro. */
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159 /* First on the stack is the return address - which in this case is the
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160 start of the task. The offset is added to make the return address appear
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161 as it would within an IRQ ISR. */
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162 *pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
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165 *pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */
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167 *pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
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169 *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
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171 *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
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173 *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
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175 *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
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177 *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
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179 *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
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181 *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
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183 *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
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185 *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
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187 *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
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189 *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
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191 *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
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194 /* When the task starts is will expect to find the function parameter in
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196 *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
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199 /* The status register is set for system mode, with interrupts enabled. */
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200 *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
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202 if( ( ( uint32_t ) pxCode & 0x01UL ) != 0x00UL )
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204 /* We want the task to start in thumb mode. */
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205 *pxTopOfStack |= portTHUMB_MODE_BIT;
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210 /* Interrupt flags cannot always be stored on the stack and will
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211 instead be stored in a variable, which is then saved as part of the
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213 *pxTopOfStack = portNO_CRITICAL_NESTING;
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215 return pxTopOfStack;
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217 /*-----------------------------------------------------------*/
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219 BaseType_t xPortStartScheduler( void )
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221 extern void vPortStartFirstTask( void );
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223 /* Start the timer that generates the tick ISR. Interrupts are disabled
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225 prvSetupTimerInterrupt();
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227 /* Start the first task. */
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228 vPortStartFirstTask();
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230 /* Should not get here! */
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233 /*-----------------------------------------------------------*/
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235 void vPortEndScheduler( void )
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237 /* It is unlikely that the ARM port will require this function as there
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238 is nothing to return to. */
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240 /*-----------------------------------------------------------*/
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242 /* The cooperative scheduler requires a normal IRQ service routine to
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243 simply increment the system tick. */
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244 __arm __irq void vPortNonPreemptiveTick( void )
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246 /* Increment the tick count - which may wake some tasks but as the
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247 preemptive scheduler is not being used any woken task is not given
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248 processor time no matter what its priority. */
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249 xTaskIncrementTick();
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251 /* Clear the interrupt in the watchdog and EIC. */
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255 /*-----------------------------------------------------------*/
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257 /* This function is called from an asm wrapper, so does not require the __irq
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259 void vPortPreemptiveTick( void )
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261 /* Increment the tick counter. */
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262 if( xTaskIncrementTick() != pdFALSE )
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264 /* Select a new task to execute. */
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265 vTaskSwitchContext();
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268 /* Clear the interrupt in the watchdog and EIC. */
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272 /*-----------------------------------------------------------*/
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274 static void prvSetupTimerInterrupt( void )
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276 /* Set the watchdog up to generate a periodic tick. */
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277 WDG_ECITConfig( DISABLE );
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278 WDG_CntOnOffConfig( DISABLE );
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279 WDG_PeriodValueConfig( portMICROS_PER_SECOND / configTICK_RATE_HZ );
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281 /* Setup the tick interrupt in the EIC. */
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282 EIC_IRQChannelPriorityConfig( WDG_IRQChannel, 1 );
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283 EIC_IRQChannelConfig( WDG_IRQChannel, ENABLE );
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284 EIC_IRQConfig( ENABLE );
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285 WDG_ECITConfig( ENABLE );
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287 /* Start the timer - interrupts are actually disabled at this point so
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288 it is safe to do this here. */
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289 WDG_CntOnOffConfig( ENABLE );
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291 /*-----------------------------------------------------------*/
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293 __arm __interwork void vPortEnterCritical( void )
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295 /* Disable interrupts first! */
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296 __disable_interrupt();
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298 /* Now interrupts are disabled ulCriticalNesting can be accessed
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299 directly. Increment ulCriticalNesting to keep a count of how many times
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300 portENTER_CRITICAL() has been called. */
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301 ulCriticalNesting++;
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303 /*-----------------------------------------------------------*/
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305 __arm __interwork void vPortExitCritical( void )
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307 if( ulCriticalNesting > portNO_CRITICAL_NESTING )
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309 /* Decrement the nesting count as we are leaving a critical section. */
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310 ulCriticalNesting--;
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312 /* If the nesting level has reached zero then interrupts should be
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314 if( ulCriticalNesting == portNO_CRITICAL_NESTING )
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316 __enable_interrupt();
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320 /*-----------------------------------------------------------*/
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