2 FreeRTOS V7.3.0 - Copyright (C) 2012 Real Time Engineers Ltd.
\r
4 FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
\r
5 http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
\r
7 ***************************************************************************
\r
9 * FreeRTOS tutorial books are available in pdf and paperback. *
\r
10 * Complete, revised, and edited pdf reference manuals are also *
\r
13 * Purchasing FreeRTOS documentation will not only help you, by *
\r
14 * ensuring you get running as quickly as possible and with an *
\r
15 * in-depth knowledge of how to use FreeRTOS, it will also help *
\r
16 * the FreeRTOS project to continue with its mission of providing *
\r
17 * professional grade, cross platform, de facto standard solutions *
\r
18 * for microcontrollers - completely free of charge! *
\r
20 * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
\r
22 * Thank you for using FreeRTOS, and thank you for your support! *
\r
24 ***************************************************************************
\r
27 This file is part of the FreeRTOS distribution.
\r
29 FreeRTOS is free software; you can redistribute it and/or modify it under
\r
30 the terms of the GNU General Public License (version 2) as published by the
\r
31 Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
\r
32 >>>NOTE<<< The modification to the GPL is included to allow you to
\r
33 distribute a combined work that includes FreeRTOS without being obliged to
\r
34 provide the source code for proprietary components outside of the FreeRTOS
\r
35 kernel. FreeRTOS is distributed in the hope that it will be useful, but
\r
36 WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
\r
37 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
\r
38 more details. You should have received a copy of the GNU General Public
\r
39 License and the FreeRTOS license exception along with FreeRTOS; if not it
\r
40 can be viewed here: http://www.freertos.org/a00114.html and also obtained
\r
41 by writing to Richard Barry, contact details for whom are available on the
\r
46 ***************************************************************************
\r
48 * Having a problem? Start by reading the FAQ "My application does *
\r
49 * not run, what could be wrong?" *
\r
51 * http://www.FreeRTOS.org/FAQHelp.html *
\r
53 ***************************************************************************
\r
56 http://www.FreeRTOS.org - Documentation, training, latest versions, license
\r
57 and contact details.
\r
59 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
\r
60 including FreeRTOS+Trace - an indispensable productivity tool.
\r
62 Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell
\r
63 the code with commercial support, indemnification, and middleware, under
\r
64 the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also
\r
65 provide a safety engineered and independently SIL3 certified version under
\r
66 the SafeRTOS brand: http://www.SafeRTOS.com.
\r
69 /*-----------------------------------------------------------
\r
70 * Implementation of functions defined in portable.h for the ST STR71x ARM7
\r
72 *----------------------------------------------------------*/
\r
74 /* Library includes. */
\r
78 /* Standard includes. */
\r
81 /* Scheduler includes. */
\r
82 #include "FreeRTOS.h"
\r
85 /* Constants required to setup the initial stack. */
\r
86 #define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
\r
87 #define portTHUMB_MODE_BIT ( ( portSTACK_TYPE ) 0x20 )
\r
88 #define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 )
\r
90 /* Constants required to handle critical sections. */
\r
91 #define portNO_CRITICAL_NESTING ( ( unsigned long ) 0 )
\r
93 #define portMICROS_PER_SECOND 1000000
\r
95 /*-----------------------------------------------------------*/
\r
97 /* Setup the watchdog to generate the tick interrupts. */
\r
98 static void prvSetupTimerInterrupt( void );
\r
100 /* ulCriticalNesting will get set to zero when the first task starts. It
\r
101 cannot be initialised to 0 as this will cause interrupts to be enabled
\r
102 during the kernel initialisation process. */
\r
103 unsigned long ulCriticalNesting = ( unsigned long ) 9999;
\r
105 /* Tick interrupt routines for cooperative and preemptive operation
\r
106 respectively. The preemptive version is not defined as __irq as it is called
\r
107 from an asm wrapper function. */
\r
108 __arm __irq void vPortNonPreemptiveTick( void );
\r
109 void vPortPreemptiveTick( void );
\r
111 /*-----------------------------------------------------------*/
\r
114 * Initialise the stack of a task to look exactly as if a call to
\r
115 * portSAVE_CONTEXT had been called.
\r
117 * See header file for description.
\r
119 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
\r
121 portSTACK_TYPE *pxOriginalTOS;
\r
123 pxOriginalTOS = pxTopOfStack;
\r
125 /* To ensure asserts in tasks.c don't fail, although in this case the assert
\r
126 is not really required. */
\r
129 /* Setup the initial stack of the task. The stack is set exactly as
\r
130 expected by the portRESTORE_CONTEXT() macro. */
\r
132 /* First on the stack is the return address - which in this case is the
\r
133 start of the task. The offset is added to make the return address appear
\r
134 as it would within an IRQ ISR. */
\r
135 *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE;
\r
138 *pxTopOfStack = ( portSTACK_TYPE ) 0xaaaaaaaa; /* R14 */
\r
140 *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
\r
142 *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */
\r
144 *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */
\r
146 *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */
\r
148 *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */
\r
150 *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */
\r
152 *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */
\r
154 *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */
\r
156 *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */
\r
158 *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */
\r
160 *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */
\r
162 *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */
\r
164 *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */
\r
167 /* When the task starts is will expect to find the function parameter in
\r
169 *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
\r
172 /* The status register is set for system mode, with interrupts enabled. */
\r
173 *pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;
\r
175 if( ( ( unsigned long ) pxCode & 0x01UL ) != 0x00UL )
\r
177 /* We want the task to start in thumb mode. */
\r
178 *pxTopOfStack |= portTHUMB_MODE_BIT;
\r
183 /* Interrupt flags cannot always be stored on the stack and will
\r
184 instead be stored in a variable, which is then saved as part of the
\r
186 *pxTopOfStack = portNO_CRITICAL_NESTING;
\r
188 return pxTopOfStack;
\r
190 /*-----------------------------------------------------------*/
\r
192 portBASE_TYPE xPortStartScheduler( void )
\r
194 extern void vPortStartFirstTask( void );
\r
196 /* Start the timer that generates the tick ISR. Interrupts are disabled
\r
198 prvSetupTimerInterrupt();
\r
200 /* Start the first task. */
\r
201 vPortStartFirstTask();
\r
203 /* Should not get here! */
\r
206 /*-----------------------------------------------------------*/
\r
208 void vPortEndScheduler( void )
\r
210 /* It is unlikely that the ARM port will require this function as there
\r
211 is nothing to return to. */
\r
213 /*-----------------------------------------------------------*/
\r
215 /* The cooperative scheduler requires a normal IRQ service routine to
\r
216 simply increment the system tick. */
\r
217 __arm __irq void vPortNonPreemptiveTick( void )
\r
219 /* Increment the tick count - which may wake some tasks but as the
\r
220 preemptive scheduler is not being used any woken task is not given
\r
221 processor time no matter what its priority. */
\r
222 vTaskIncrementTick();
\r
224 /* Clear the interrupt in the watchdog and EIC. */
\r
228 /*-----------------------------------------------------------*/
\r
230 /* This function is called from an asm wrapper, so does not require the __irq
\r
232 void vPortPreemptiveTick( void )
\r
234 /* Increment the tick counter. */
\r
235 vTaskIncrementTick();
\r
237 /* The new tick value might unblock a task. Ensure the highest task that
\r
238 is ready to execute is the task that will execute when the tick ISR
\r
240 vTaskSwitchContext();
\r
242 /* Clear the interrupt in the watchdog and EIC. */
\r
246 /*-----------------------------------------------------------*/
\r
248 static void prvSetupTimerInterrupt( void )
\r
250 /* Set the watchdog up to generate a periodic tick. */
\r
251 WDG_ECITConfig( DISABLE );
\r
252 WDG_CntOnOffConfig( DISABLE );
\r
253 WDG_PeriodValueConfig( portMICROS_PER_SECOND / configTICK_RATE_HZ );
\r
255 /* Setup the tick interrupt in the EIC. */
\r
256 EIC_IRQChannelPriorityConfig( WDG_IRQChannel, 1 );
\r
257 EIC_IRQChannelConfig( WDG_IRQChannel, ENABLE );
\r
258 EIC_IRQConfig( ENABLE );
\r
259 WDG_ECITConfig( ENABLE );
\r
261 /* Start the timer - interrupts are actually disabled at this point so
\r
262 it is safe to do this here. */
\r
263 WDG_CntOnOffConfig( ENABLE );
\r
265 /*-----------------------------------------------------------*/
\r
267 __arm __interwork void vPortEnterCritical( void )
\r
269 /* Disable interrupts first! */
\r
270 __disable_interrupt();
\r
272 /* Now interrupts are disabled ulCriticalNesting can be accessed
\r
273 directly. Increment ulCriticalNesting to keep a count of how many times
\r
274 portENTER_CRITICAL() has been called. */
\r
275 ulCriticalNesting++;
\r
277 /*-----------------------------------------------------------*/
\r
279 __arm __interwork void vPortExitCritical( void )
\r
281 if( ulCriticalNesting > portNO_CRITICAL_NESTING )
\r
283 /* Decrement the nesting count as we are leaving a critical section. */
\r
284 ulCriticalNesting--;
\r
286 /* If the nesting level has reached zero then interrupts should be
\r
288 if( ulCriticalNesting == portNO_CRITICAL_NESTING )
\r
290 __enable_interrupt();
\r
294 /*-----------------------------------------------------------*/
\r